Mirrors/opensbi
4
0
Fork 1
mirror of https://github.com/riscv-software-src/opensbi.git synced 2026-02-28 02:01:50 +00:00
Code Issues Packages Projects Releases Wiki Activity

platform: generic/andes: add CSR save and restore functions for AE350 platform

Browse Source 
Implement a save and restore mechanism for Andes-specific CSRs to support
hardware power-saving modes, such as CPU hotplug or suspend to RAM.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Link: https://lore.kernel.org/r/20251229071914.1451587-3-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Ben Zong-You Xie
2025-12-29 15:19:11 +08:00
committed by Anup Patel
parent 9ffacc8ae1
commit 85bff9cc16
3 changed files with 77 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

55
platform/generic/andes/ae350.c
View File

@@ -8,18 +8,73 @@
#include <andes/andes_pmu.h>
#include <andes/andes_sbi.h>
#include <platform_override.h>
#include <sbi/sbi_init.h>
#include <sbi/sbi_scratch.h>
#include <sbi_utils/fdt/fdt_helper.h>
static unsigned long andes_hart_data_offset;
extern void _start_warm(void);
void ae350_non_ret_save(struct sbi_scratch *scratch)
{
struct andes_hart_data *andes_hdata = sbi_scratch_offset_ptr(scratch,
andes_hart_data_offset);
andes_hdata->mcache_ctl = csr_read(CSR_MCACHE_CTL);
andes_hdata->mmisc_ctl = csr_read(CSR_MMISC_CTL);
andes_hdata->mpft_ctl = csr_read(CSR_MPFT_CTL);
andes_hdata->mslideleg = csr_read(CSR_MSLIDELEG);
andes_hdata->mxstatus = csr_read(CSR_MXSTATUS);
andes_hdata->slie = csr_read(CSR_SLIE);
andes_hdata->slip = csr_read(CSR_SLIP);
andes_hdata->pmacfg0 = csr_read(CSR_PMACFG0);
andes_hdata->pmacfg2 = csr_read_num(CSR_PMACFG0 + 2);
for (int i = 0; i < 16; i++)
andes_hdata->pmaaddrX[i] = csr_read_num(CSR_PMAADDR0 + i);
}
void ae350_non_ret_restore(struct sbi_scratch *scratch)
{
struct andes_hart_data *andes_hdata = sbi_scratch_offset_ptr(scratch,
andes_hart_data_offset);
csr_write(CSR_MCACHE_CTL, andes_hdata->mcache_ctl);
csr_write(CSR_MMISC_CTL, andes_hdata->mmisc_ctl);
csr_write(CSR_MPFT_CTL, andes_hdata->mpft_ctl);
csr_write(CSR_MSLIDELEG, andes_hdata->mslideleg);
csr_write(CSR_MXSTATUS, andes_hdata->mxstatus);
csr_write(CSR_SLIE, andes_hdata->slie);
csr_write(CSR_SLIP, andes_hdata->slip);
csr_write(CSR_PMACFG0, andes_hdata->pmacfg0);
csr_write_num(CSR_PMACFG0 + 2, andes_hdata->pmacfg2);
for (int i = 0; i < 16; i++)
csr_write_num(CSR_PMAADDR0 + i, andes_hdata->pmaaddrX[i]);
}
void ae350_enable_coherency_warmboot(void)
{
ae350_enable_coherency();
_start_warm();
}
static int ae350_early_init(bool cold_boot)
{
if (cold_boot) {
andes_hart_data_offset = sbi_scratch_alloc_offset(sizeof(struct andes_hart_data));
if (!andes_hart_data_offset)
return SBI_ENOMEM;
}
/* Don't restore Andes CSRs during boot */
if (sbi_init_count(current_hartindex()))
ae350_non_ret_restore(sbi_scratch_thishart_ptr());
return generic_early_init(cold_boot);
}
static int ae350_platform_init(const void *fdt, int nodeoff, const struct fdt_match *match)
{
generic_platform_ops.early_init = ae350_early_init;
generic_platform_ops.extensions_init = andes_pmu_extensions_init;
generic_platform_ops.pmu_init = andes_pmu_init;
generic_platform_ops.vendor_ext_provider = andes_sbi_vendor_ext_provider;