mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 23:41:23 +01:00
lib: sbi: fix DBTR_SHMEM_MAKE_PHYS for RV64
Obtaining a 64-bit address under rv64 does not require combining 32-bit registers Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
This commit is contained in:
@@ -48,7 +48,7 @@ static unsigned long hart_state_ptr_offset;
|
|||||||
_idx++, _entry = ((_etype *)_base + _idx))
|
_idx++, _entry = ((_etype *)_base + _idx))
|
||||||
|
|
||||||
#if __riscv_xlen == 64
|
#if __riscv_xlen == 64
|
||||||
#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
|
#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (_p_lo)
|
||||||
#elif __riscv_xlen == 32
|
#elif __riscv_xlen == 32
|
||||||
#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
|
#define DBTR_SHMEM_MAKE_PHYS(_p_hi, _p_lo) (((u64)(_p_hi) << 32) | (_p_lo))
|
||||||
#else
|
#else
|
||||||
|
Reference in New Issue
Block a user