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include: sbi: set FS dirty in vsstatus when V=1

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According to Privileged ISA 19.2.11:

Modifying the floating-point state when V=1 causes both fields
(vsstatus.FS and the HS-level sstatus.FS) to be set to 3 (Dirty)

Fixes: 130e65dd9d ("lib: sbi: Implement SET_FS_DIRTY() to make sure the mstatus FS dirty is set")
Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>
Link: https://lore.kernel.org/r/20260605113214.242-5-ganboing@gmail.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Bo Gan
2026-06-05 04:32:10 -07:00
committed by Anup Patel
parent 1b3424d5c0
commit 7dfaa46782
1 changed files with 5 additions and 1 deletions
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include/sbi/riscv_fp.h
+5 -1
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@@ -83,7 +83,11 @@
#define GET_FFLAGS() csr_read(CSR_FFLAGS) #define GET_FFLAGS() csr_read(CSR_FFLAGS)
#define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value)) #define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value))
#define SET_FS_DIRTY(regs) (regs->mstatus |= MSTATUS_FS) #define SET_FS_DIRTY(regs) do { \
if (sbi_regs_from_virt(regs)) \
csr_set(CSR_VSSTATUS, MSTATUS_FS); \
regs->mstatus |= MSTATUS_FS; \
} while(0)
#define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs)) #define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs))
#define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs)) #define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs))