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lib: utils/timer: Add a separate compatible for the D1 CLINT

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The CLINT in the Allwinner D1 SoC apparently does not support 64-bit
MMIO access. A property was added to support this quirk (and that
property was copied to the ACLINT MTIMER code). However, since this
difference in behavior makes the D1 CLINT incompatible with the SiFive
CLINT's programming interface, a better solution is to use a separate
compatible string.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Samuel Holland authored and Anup Patel committed 2022-06-21 09:20:59 +05:30
1 parent c6530012d4
commit 7738345396
3 files changed
+27 -17
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docs/platform/thead-c9xx.md
+1 -3
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@@ -52,12 +52,11 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906)
ranges;
clint0: clint@14000000 {
compatible = "riscv,clint0";
compatible = "allwinner,sun20i-d1-clint";
interrupts-extended = <
&cpu0_intc 3 &cpu0_intc 7
>;
reg = <0x0 0x14000000 0x0 0x04000000>;
clint,has-no-64bit-mmio;
};
intc: interrupt-controller@10000000 {
@@ -163,7 +162,6 @@ DTS Example2: (Multi cores with soc reset-regs)
&cpu4_intc 3 &cpu4_intc 7
>;
reg = <0xff 0xdc000000 0x0 0x04000000>;
clint,has-no-64bit-mmio;
};
intc: interrupt-controller@ffd8000000 {