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https://github.com/riscv-software-src/opensbi.git
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lib: utils: Add SiFive test device
This patch factor-out SiFive test device related stuff into it's own source file from qemu/virt platform. In future, we can find SiFive test device address from device tree as well. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
19
include/sbi_utils/sys/sifive_test.h
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19
include/sbi_utils/sys/sifive_test.h
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@@ -0,0 +1,19 @@
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __SYS_SIFIVE_TEST_H__
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#define __SYS_SIFIVE_TEST_H__
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#include <sbi/sbi_types.h>
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int sifive_test_system_reset(u32 type);
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int sifive_test_init(unsigned long base);
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#endif
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@@ -9,3 +9,4 @@
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libsbiutils-objs-y += sys/clint.o
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libsbiutils-objs-y += sys/clint.o
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libsbiutils-objs-y += sys/htif.o
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libsbiutils-objs-y += sys/htif.o
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libsbiutils-objs-y += sys/sifive_test.o
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44
lib/utils/sys/sifive_test.c
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44
lib/utils/sys/sifive_test.c
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/*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/sys/sifive_test.h>
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#define FINISHER_FAIL 0x3333
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#define FINISHER_PASS 0x5555
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#define FINISHER_RESET 0x7777
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static void *sifive_test_base;
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int sifive_test_system_reset(u32 type)
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{
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/*
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* Tell the "finisher" that the simulation
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* was successful so that QEMU exits
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*/
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switch (type) {
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case SBI_PLATFORM_RESET_SHUTDOWN:
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writew(FINISHER_PASS, sifive_test_base);
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break;
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case SBI_PLATFORM_RESET_COLD:
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case SBI_PLATFORM_RESET_WARM:
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writew(FINISHER_RESET, sifive_test_base);
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break;
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}
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return 0;
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}
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int sifive_test_init(unsigned long base)
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{
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sifive_test_base = (void *)base;
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return 0;
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}
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@@ -18,14 +18,13 @@
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/sys/sifive_test.h>
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/* clang-format off */
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/* clang-format off */
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#define VIRT_HART_COUNT 8
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#define VIRT_HART_COUNT 8
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#define VIRT_TEST_ADDR 0x100000
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#define VIRT_TEST_ADDR 0x100000
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#define VIRT_TEST_FINISHER_FAIL 0x3333
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#define VIRT_TEST_FINISHER_PASS 0x5555
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#define VIRT_CLINT_ADDR 0x2000000
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#define VIRT_CLINT_ADDR 0x2000000
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@@ -39,6 +38,14 @@
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/* clang-format on */
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/* clang-format on */
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static int virt_early_init(bool cold_boot)
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{
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if (!cold_boot)
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return 0;
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return sifive_test_init(VIRT_TEST_ADDR);
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}
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static int virt_final_init(bool cold_boot)
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static int virt_final_init(bool cold_boot)
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{
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{
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void *fdt;
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void *fdt;
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@@ -100,17 +107,8 @@ static int virt_timer_init(bool cold_boot)
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return clint_warm_timer_init();
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return clint_warm_timer_init();
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}
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}
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static int virt_system_reset(u32 type)
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{
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/* Tell the "finisher" that the simulation
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* was successful so that QEMU exits
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*/
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writew(VIRT_TEST_FINISHER_PASS, (void *)VIRT_TEST_ADDR);
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return 0;
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}
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const struct sbi_platform_operations platform_ops = {
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const struct sbi_platform_operations platform_ops = {
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.early_init = virt_early_init,
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.final_init = virt_final_init,
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.final_init = virt_final_init,
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.console_putc = uart8250_putc,
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.console_putc = uart8250_putc,
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.console_getc = uart8250_getc,
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.console_getc = uart8250_getc,
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@@ -123,7 +121,7 @@ const struct sbi_platform_operations platform_ops = {
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.timer_event_stop = clint_timer_event_stop,
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.timer_event_stop = clint_timer_event_stop,
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.timer_event_start = clint_timer_event_start,
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.timer_event_start = clint_timer_event_start,
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.timer_init = virt_timer_init,
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.timer_init = virt_timer_init,
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.system_reset = virt_system_reset,
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.system_reset = sifive_test_system_reset,
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};
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};
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const struct sbi_platform platform = {
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const struct sbi_platform platform = {
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