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docs: firmware: document the OpenSBI firmware header

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Add docs/firmware/fw_header.md describing the layout of the 128-byte
OpenSBI firmware header, the a0/a1/a2 override flags, what a previous
booting stage is expected to put in each register, and an example of how
to patch the header. Also point at it from fw.md, next to the
description of the registers the previous booting stage passes.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260918081313.659655-4-zong.li@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Zong Li
2026-09-18 16:52:39 +05:30
committed by Anup Patel
parent f83d6a730b
commit 5a17501726
2 changed files with 146 additions and 0 deletions
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docs/firmware/fw.md
+9
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@@ -16,6 +16,11 @@ of RISC-V CPU:
* device tree blob address in memory via *a1* register. The address must
be aligned to 8 bytes.
A previous booting stage which cannot set up these registers can instead pass
the same information by patching the OpenSBI firmware header, which is present
at the beginning of every OpenSBI firmware image. See *[FW_HEADER]* for
details.
OpenSBI currently supports three different types of firmwares.
Firmware with Dynamic Information (*FW_DYNAMIC*)
@@ -82,9 +87,13 @@ following documents.
* *[FW_PAYLOAD]*: The *Firmware with Payload (FW_PAYLOAD)* is described in more
details in the file *fw_payload.md*.
The *OpenSBI firmware header*, which is common to all firmware types, is
described in *[FW_HEADER]*.
[FW_DYNAMIC]: fw_dynamic.md
[FW_JUMP]: fw_jump.md
[FW_PAYLOAD]: fw_payload.md
[FW_HEADER]: fw_header.md
Providing different payloads to OpenSBI Firmware
------------------------------------------------