Mirrors/opensbi
5
0
Fork 1
mirror of https://github.com/riscv-software-src/opensbi.git synced 2025-08-30 09:56:33 +01:00
Code Issues Packages Projects Releases Wiki Activity

platform: Move ariane standalone fpga project to its own project

Browse Source 
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Atish Patra
2020-03-23 12:48:54 -07:00
committed by Anup Patel
parent 9a74a64ae0
commit 5968894842
6 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
platform/fpga/ariane/config.mk Normal file
View File

@@ -0,0 +1,36 @@
#
# SPDX-License-Identifier: BSD-2-Clause
#
# Copyright (C) 2019 FORTH-ICS/CARV
# Panagiotis Peristerakis <perister@ics.forth.gr>
#
#for more infos, check out /platform/template/config.mk
PLATFORM_RISCV_XLEN = 64
# Blobs to build
FW_TEXT_START=0x80000000
FW_JUMP=n
ifeq ($(PLATFORM_RISCV_XLEN), 32)
# This needs to be 4MB aligned for 32-bit support
FW_JUMP_ADDR=0x80400000
else
# This needs to be 2MB aligned for 64-bit support
FW_JUMP_ADDR=0x80200000
endif
FW_JUMP_FDT_ADDR=0x82200000
# Firmware with payload configuration.
FW_PAYLOAD=y
ifeq ($(PLATFORM_RISCV_XLEN), 32)
# This needs to be 4MB aligned for 32-bit support
FW_PAYLOAD_OFFSET=0x400000
else
# This needs to be 2MB aligned for 64-bit support
FW_PAYLOAD_OFFSET=0x200000
endif
FW_PAYLOAD_FDT_ADDR=0x82200000
FW_PAYLOAD_ALIGN=0x1000