platform: Update Nuclei ux600 platform support

Changes are made to support our FPGA evaluation board,
it has DDR memory(0xA0000000-0xB0000000).

* Adapt the config.mk to match FPGA evaluation board DDR memory address
* Since the RISC-V CPU core frequency of FPGA might change, so we use the
  fixed TIMER frequency to measure the real CPU core frequency.
* And the UART baudrate has to set to 57600bps for Nuclei FPGA evaluation
  board when CPU core frequency is about 8MHz, otherwise the UART input
  will not work correctly.

Signed-off-by: Huaqi Fang <578567190@qq.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Huaqi Fang
2020-06-12 17:01:49 +08:00
committed by Anup Patel
parent 6966ad0abe
commit 518e85cccb
2 changed files with 79 additions and 9 deletions

View File

@@ -19,12 +19,12 @@ platform-runcmd = xl_spike \
$(build_dir)/platform/nuclei/ux600/firmware/fw_payload.elf
# Blobs to build
FW_TEXT_START=0x80000000
FW_TEXT_START=0xA0000000
FW_DYNAMIC=y
FW_JUMP=y
FW_JUMP_ADDR=0x80200000
FW_JUMP_FDT_ADDR=0x88000000
FW_JUMP_ADDR=0xA0200000
FW_JUMP_FDT_ADDR=0xA8000000
FW_PAYLOAD=y
FW_PAYLOAD_OFFSET=0x200000
FW_PAYLOAD_FDT_ADDR=0x88000000
FW_PAYLOAD_FDT_ADDR=0xA8000000