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lib: sbi: Implement SBI PMU extension
RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor mode to start/stop/configure pmu related events. This patch implements all of the functionality defined in the specification. Reviewed-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
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@@ -39,6 +39,7 @@ extern struct sbi_ecall_extension ecall_ipi;
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extern struct sbi_ecall_extension ecall_vendor;
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extern struct sbi_ecall_extension ecall_vendor;
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extern struct sbi_ecall_extension ecall_hsm;
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extern struct sbi_ecall_extension ecall_hsm;
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extern struct sbi_ecall_extension ecall_srst;
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extern struct sbi_ecall_extension ecall_srst;
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extern struct sbi_ecall_extension ecall_pmu;
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u16 sbi_ecall_version_major(void);
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u16 sbi_ecall_version_major(void);
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@@ -20,6 +20,7 @@ libsbi-objs-y += sbi_ecall.o
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libsbi-objs-y += sbi_ecall_base.o
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libsbi-objs-y += sbi_ecall_base.o
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libsbi-objs-y += sbi_ecall_hsm.o
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libsbi-objs-y += sbi_ecall_hsm.o
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libsbi-objs-y += sbi_ecall_legacy.o
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libsbi-objs-y += sbi_ecall_legacy.o
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libsbi-objs-y += sbi_ecall_pmu.o
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libsbi-objs-y += sbi_ecall_replace.o
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libsbi-objs-y += sbi_ecall_replace.o
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libsbi-objs-y += sbi_ecall_vendor.o
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libsbi-objs-y += sbi_ecall_vendor.o
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libsbi-objs-y += sbi_emulate_csr.o
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libsbi-objs-y += sbi_emulate_csr.o
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@@ -162,6 +162,9 @@ int sbi_ecall_init(void)
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if (ret)
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if (ret)
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return ret;
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return ret;
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ret = sbi_ecall_register_extension(&ecall_srst);
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ret = sbi_ecall_register_extension(&ecall_srst);
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if (ret)
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return ret;
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ret = sbi_ecall_register_extension(&ecall_pmu);
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if (ret)
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if (ret)
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return ret;
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return ret;
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ret = sbi_ecall_register_extension(&ecall_legacy);
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ret = sbi_ecall_register_extension(&ecall_legacy);
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93
lib/sbi/sbi_ecall_pmu.c
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93
lib/sbi/sbi_ecall_pmu.c
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@@ -0,0 +1,93 @@
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Atish Patra <atish.patra@wdc.com>
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*/
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#include <sbi/sbi_ecall.h>
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#include <sbi/sbi_ecall_interface.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_trap.h>
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#include <sbi/sbi_version.h>
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#include <sbi/sbi_pmu.h>
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#include <sbi/sbi_scratch.h>
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#include <sbi/riscv_asm.h>
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static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
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const struct sbi_trap_regs *regs,
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unsigned long *out_val,
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struct sbi_trap_info *out_trap)
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{
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int ret = 0;
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uint64_t temp;
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switch (funcid) {
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case SBI_EXT_PMU_NUM_COUNTERS:
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ret = sbi_pmu_num_ctr();
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if (ret >= 0) {
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*out_val = ret;
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ret = 0;
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}
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break;
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case SBI_EXT_PMU_COUNTER_GET_INFO:
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ret = sbi_pmu_ctr_get_info(regs->a0, out_val);
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break;
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case SBI_EXT_PMU_COUNTER_CFG_MATCH:
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#if __riscv_xlen == 32
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temp = ((uint64_t)regs->a5 << 32) | regs->a4;
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#else
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temp = regs->a4;
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#endif
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ret = sbi_pmu_ctr_cfg_match(regs->a0, regs->a1, regs->a2,
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regs->a3, temp);
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if (ret >= 0) {
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*out_val = ret;
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ret = 0;
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}
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break;
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case SBI_EXT_PMU_COUNTER_FW_READ:
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ret = sbi_pmu_ctr_read(regs->a0, out_val);
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break;
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case SBI_EXT_PMU_COUNTER_START:
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#if __riscv_xlen == 32
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temp = ((uint64_t)regs->a4 << 32) | regs->a3;
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#else
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temp = regs->a3;
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#endif
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ret = sbi_pmu_ctr_start(regs->a0, regs->a1, regs->a2, temp);
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break;
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case SBI_EXT_PMU_COUNTER_STOP:
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ret = sbi_pmu_ctr_stop(regs->a0, regs->a1, regs->a2);
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break;
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default:
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ret = SBI_ENOTSUPP;
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};
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return ret;
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}
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static int sbi_ecall_pmu_probe(unsigned long extid, unsigned long *out_val)
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{
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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/* SBI PMU extension is useless without mcount inhibit features */
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if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTINHIBIT))
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*out_val = 1;
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else
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*out_val = 0;
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return 0;
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}
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struct sbi_ecall_extension ecall_pmu = {
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.extid_start = SBI_EXT_PMU,
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.extid_end = SBI_EXT_PMU,
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.handle = sbi_ecall_pmu_handler,
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.probe = sbi_ecall_pmu_probe,
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};
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@@ -375,7 +375,7 @@ static int pmu_update_hw_mhpmevent(struct sbi_pmu_hw_event *hw_evt, int ctr_idx,
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if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
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if (!mhpmevent_val || ctr_idx < 3 || ctr_idx >= SBI_PMU_HW_CTR_MAX)
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return SBI_EFAIL;
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return SBI_EFAIL;
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/* TODO: The upper 8 bits of mhpmevent is reserved by sscofpmf extension.
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/* TODO: The upper 16 bits of mhpmevent is reserved by sscofpmf extension.
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* Update those bits based on the flags received from supervisor.
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* Update those bits based on the flags received from supervisor.
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* The OVF bit also should be cleared here in case it was not cleared
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* The OVF bit also should be cleared here in case it was not cleared
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* during event stop.
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* during event stop.
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