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docs: platform: Add documentation for Spike platform
This patch adds documentation to build and run OpenSBI on Spike simulator and QEMU Spike machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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@@ -23,6 +23,8 @@ OpenSBI currently supports the following virtual and hardware platforms:
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* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
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* **T-HEAD C910**: Platform support for the T-HEAD C910 Processor.
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* **Spike**: Platform support for the Spike emulator.
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The code for these supported platforms can be used as example to implement
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The code for these supported platforms can be used as example to implement
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support for other platforms. The *platform/template* directory also provides
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support for other platforms. The *platform/template* directory also provides
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template files for implementing support for a new platform. The *object.mk*,
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template files for implementing support for a new platform. The *object.mk*,
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@@ -34,3 +36,4 @@ facilitate the implementation.
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[ariane-fpga.md]: ariane-fpga.md
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[ariane-fpga.md]: ariane-fpga.md
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[andes_ae350.md]: andes-ae350.md
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[andes_ae350.md]: andes-ae350.md
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[thead-c910.md]: thead-c910.md
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[thead-c910.md]: thead-c910.md
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[spike.md]: spike.md
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89
docs/platform/spike.md
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89
docs/platform/spike.md
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@@ -0,0 +1,89 @@
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Spike Simulator Platform
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========================
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The **Spike** is a RISC-V ISA simulator which implements a functional model
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of one or more RISC-V harts. The **Spike** compatible virtual platform is
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also available on QEMU. In fact, we can use same OpenSBI firmware binaries
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on **Spike** simulator and QEMU Spike machine.
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For more details, refer [Spike on GitHub](https://github.com/riscv/riscv-isa-sim)
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To build the platform-specific library and firmware images, provide the
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*PLATFORM=spike* parameter to the top level `make` command.
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Platform Options
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----------------
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The *Spike* platform does not have any platform-specific options.
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Execution on Spike Simulator
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----------------------------
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**No Payload Case**
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Build:
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```
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make PLATFORM=spike
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```
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Run:
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```
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spike build/platform/spike/firmware/fw_payload.elf
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```
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**Linux Kernel Payload**
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Note: We assume that the Linux kernel is compiled using
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*arch/riscv/configs/defconfig*.
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Build:
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```
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make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
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```
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Run:
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```
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spike --initrd <path_to_cpio_ramdisk> build/platform/spike/firmware/fw_payload.elf
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```
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Execution on QEMU RISC-V 64-bit
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-------------------------------
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**No Payload Case**
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Build:
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```
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make PLATFORM=spike
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```
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Run:
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```
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qemu-system-riscv64 -M spike -m 256M -nographic \
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-kernel build/platform/spike/firmware/fw_payload.elf
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```
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**Linux Kernel Payload**
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Note: We assume that the Linux kernel is compiled using
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*arch/riscv/configs/defconfig*.
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Build:
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```
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make PLATFORM=spike FW_PAYLOAD_PATH=<linux_build_directory>/arch/riscv/boot/Image
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```
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Run:
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```
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qemu-system-riscv64 -M spike -m 256M -nographic \
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-kernel build/platform/spike/firmware/fw_payload.elf \
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-initrd <path_to_cpio_ramdisk> \
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-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
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```
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or
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```
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qemu-system-riscv64 -M spike -m 256M -nographic \
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-bios build/platform/spike/firmware/fw_jump.elf \
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-kernel <linux_build_directory>/arch/riscv/boot/Image \
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-initrd <path_to_cpio_ramdisk> \
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-append "root=/dev/ram rw console=hvc0 earlycon=sbi"
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```
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