Mirrors/opensbi
1
0
Fork 1
mirror of https://github.com/riscv-software-src/opensbi.git synced 2025-08-24 23:41:23 +01:00
Code Issues Packages Projects Releases Wiki Activity

lib: Add RISC-V hypervisor v0.6.1 support

Browse Source 
To support RISC-V hypervisor v0.6.1, we:
1. Don't need to explicitly forward WFI traps from VS/VU-mode
2. Have to delegate virtual instruction trap to HS-mode
3. Have to update trap redirection for changes in HSTATUS CSR

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel
2020-05-28 08:37:42 +05:30
committed by Anup Patel
parent 51f0e4a053
commit 1b8c0128f1
4 changed files with 17 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
include/sbi/riscv_encoding.h
View File

@@ -61,12 +61,20 @@
#define SSTATUS64_UXL MSTATUS_UXL
#define SSTATUS64_SD MSTATUS64_SD
#if __riscv_xlen == 64
#define HSTATUS_VSXL _UL(0x300000000)
#define HSTATUS_VSXL_SHIFT 32
#endif
#define HSTATUS_VTSR _UL(0x00400000)
#define HSTATUS_VTW _UL(0x00200000)
#define HSTATUS_VTVM _UL(0x00100000)
#define HSTATUS_SP2V _UL(0x00000200)
#define HSTATUS_SP2P _UL(0x00000100)
#define HSTATUS_VGEIN _UL(0x0003f000)
#define HSTATUS_VGEIN_SHIFT 12
#define HSTATUS_HU _UL(0x00000200)
#define HSTATUS_SPVP _UL(0x00000100)
#define HSTATUS_SPV _UL(0x00000080)
#define HSTATUS_SPRV _UL(0x00000001)
#define HSTATUS_GVA _UL(0x00000040)
#define HSTATUS_VSBE _UL(0x00000020)
#define IRQ_S_SOFT 1
#define IRQ_VS_SOFT 2
@@ -424,6 +432,7 @@
#define CAUSE_STORE_PAGE_FAULT 0xf
#define CAUSE_FETCH_GUEST_PAGE_FAULT 0x14
#define CAUSE_LOAD_GUEST_PAGE_FAULT 0x15
#define CAUSE_VIRTUAL_INST_FAULT 0x16
#define CAUSE_STORE_GUEST_PAGE_FAULT 0x17
#define INSN_MATCH_LB 0x3