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lib: Remove source_hart and hartid parameter from IPI callbacks

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The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Anup patel
2019-01-22 14:20:59 +05:30
committed by Anup Patel
parent fea9e2b5f3
commit 18ec89e46e
13 changed files with 52 additions and 55 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
include/sbi/sbi_ipi.h
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@@ -20,12 +20,12 @@
struct sbi_scratch; struct sbi_scratch;
int sbi_ipi_send_many(struct sbi_scratch *scratch, int sbi_ipi_send_many(struct sbi_scratch *scratch,
u32 hartid, ulong *pmask, u32 event); ulong *pmask, u32 event);
void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid); void sbi_ipi_clear_smode(struct sbi_scratch *scratch);
void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid); void sbi_ipi_process(struct sbi_scratch *scratch);
int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot); int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot);
#endif #endif

20
include/sbi/sbi_platform.h
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@@ -85,13 +85,13 @@ struct sbi_platform {
int (*irqchip_init)(u32 hartid, bool cold_boot); int (*irqchip_init)(u32 hartid, bool cold_boot);
/** Inject IPI to a target HART */ /** Inject IPI to a target HART */
void (*ipi_inject)(u32 target_hart, u32 source_hart); void (*ipi_inject)(u32 target_hart);
/** Wait for target HART to acknowledge IPI */ /** Wait for target HART to acknowledge IPI */
void (*ipi_sync)(u32 target_hart, u32 source_hart); void (*ipi_sync)(u32 target_hart);
/** Clear IPI for a target HART */ /** Clear IPI for a target HART */
void (*ipi_clear)(u32 target_hart); void (*ipi_clear)(u32 target_hart);
/** Initialize IPI for given HART */ /** Initialize IPI for given HART */
int (*ipi_init)(u32 hartid, bool cold_boot); int (*ipi_init)(bool cold_boot);
/** Get MMIO timer value */ /** Get MMIO timer value */
u64 (*timer_value)(void); u64 (*timer_value)(void);
@@ -328,10 +328,10 @@ static inline int sbi_platform_irqchip_init(struct sbi_platform *plat,
* @param target_hart HART ID of IPI target * @param target_hart HART ID of IPI target
*/ */
static inline void sbi_platform_ipi_inject(struct sbi_platform *plat, static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
u32 target_hart, u32 source_hart) u32 target_hart)
{ {
if (plat && plat->ipi_inject) if (plat && plat->ipi_inject)
plat->ipi_inject(target_hart, source_hart); plat->ipi_inject(target_hart);
} }
/** /**
@@ -339,13 +339,12 @@ static inline void sbi_platform_ipi_inject(struct sbi_platform *plat,
* *
* @param plat pointer to struct sbi_platform * @param plat pointer to struct sbi_platform
* @param target_hart HART ID of IPI target * @param target_hart HART ID of IPI target
* @param source_hart HART ID of IPI source
*/ */
static inline void sbi_platform_ipi_sync(struct sbi_platform *plat, static inline void sbi_platform_ipi_sync(struct sbi_platform *plat,
u32 target_hart, u32 source_hart) u32 target_hart)
{ {
if (plat && plat->ipi_sync) if (plat && plat->ipi_sync)
plat->ipi_sync(target_hart, source_hart); plat->ipi_sync(target_hart);
} }
/** /**
@@ -365,16 +364,15 @@ static inline void sbi_platform_ipi_clear(struct sbi_platform *plat,
* Initialize the platform IPI support for given HART * Initialize the platform IPI support for given HART
* *
* @param plat pointer to struct sbi_platform * @param plat pointer to struct sbi_platform
* @param hartid HART ID
* @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE) * @param cold_boot whether cold boot (TRUE) or warm_boot (FALSE)
* *
* @return 0 on success and negative error code on failure * @return 0 on success and negative error code on failure
*/ */
static inline int sbi_platform_ipi_init(struct sbi_platform *plat, static inline int sbi_platform_ipi_init(struct sbi_platform *plat,
u32 hartid, bool cold_boot) bool cold_boot)
{ {
if (plat && plat->ipi_init) if (plat && plat->ipi_init)
return plat->ipi_init(hartid, cold_boot); return plat->ipi_init(cold_boot);
return 0; return 0;
} }

11
lib/sbi_ecall.c
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@@ -54,23 +54,20 @@ int sbi_ecall_handler(u32 hartid, ulong mcause,
ret = 0; ret = 0;
break; break;
case SBI_ECALL_CLEAR_IPI: case SBI_ECALL_CLEAR_IPI:
sbi_ipi_clear_smode(scratch, hartid); sbi_ipi_clear_smode(scratch);
ret = 0; ret = 0;
break; break;
case SBI_ECALL_SEND_IPI: case SBI_ECALL_SEND_IPI:
ret = sbi_ipi_send_many(scratch, hartid, ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
(ulong *)regs->a0,
SBI_IPI_EVENT_SOFT); SBI_IPI_EVENT_SOFT);
break; break;
case SBI_ECALL_REMOTE_FENCE_I: case SBI_ECALL_REMOTE_FENCE_I:
ret = sbi_ipi_send_many(scratch, hartid, ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
(ulong *)regs->a0,
SBI_IPI_EVENT_FENCE_I); SBI_IPI_EVENT_FENCE_I);
break; break;
case SBI_ECALL_REMOTE_SFENCE_VMA: case SBI_ECALL_REMOTE_SFENCE_VMA:
case SBI_ECALL_REMOTE_SFENCE_VMA_ASID: case SBI_ECALL_REMOTE_SFENCE_VMA_ASID:
ret = sbi_ipi_send_many(scratch, hartid, ret = sbi_ipi_send_many(scratch, (ulong *)regs->a0,
(ulong *)regs->a0,
SBI_IPI_EVENT_SFENCE_VMA); SBI_IPI_EVENT_SFENCE_VMA);
break; break;
case SBI_ECALL_SHUTDOWN: case SBI_ECALL_SHUTDOWN:

2
lib/sbi_hart.c
View File

@@ -331,7 +331,7 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
/* send an IPI to every other hart */ /* send an IPI to every other hart */
spin_lock(&coldboot_wait_bitmap_lock); spin_lock(&coldboot_wait_bitmap_lock);
if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i))) if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
sbi_platform_ipi_inject(plat, i, hartid); sbi_platform_ipi_inject(plat, i);
spin_unlock(&coldboot_wait_bitmap_lock); spin_unlock(&coldboot_wait_bitmap_lock);
} }
} }

4
lib/sbi_init.c
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@@ -49,7 +49,7 @@ static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
if (rc) if (rc)
sbi_hart_hang(); sbi_hart_hang();
rc = sbi_ipi_init(scratch, hartid, TRUE); rc = sbi_ipi_init(scratch, TRUE);
if (rc) if (rc)
sbi_hart_hang(); sbi_hart_hang();
@@ -115,7 +115,7 @@ static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
if (rc) if (rc)
sbi_hart_hang(); sbi_hart_hang();
rc = sbi_ipi_init(scratch, hartid, FALSE); rc = sbi_ipi_init(scratch, FALSE);
if (rc) if (rc)
sbi_hart_hang(); sbi_hart_hang();

17
lib/sbi_ipi.c
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@@ -19,7 +19,7 @@
#include <sbi/sbi_unpriv.h> #include <sbi/sbi_unpriv.h>
int sbi_ipi_send_many(struct sbi_scratch *scratch, int sbi_ipi_send_many(struct sbi_scratch *scratch,
u32 hartid, ulong *pmask, u32 event) ulong *pmask, u32 event)
{ {
ulong i, m; ulong i, m;
struct sbi_scratch *oth; struct sbi_scratch *oth;
@@ -31,29 +31,30 @@ int sbi_ipi_send_many(struct sbi_scratch *scratch,
/* send IPIs to everyone */ /* send IPIs to everyone */
for (i = 0, m = mask; m; i++, m >>= 1) { for (i = 0, m = mask; m; i++, m >>= 1) {
if ((m & 1) && !sbi_platform_hart_disabled(plat, hartid)) { if ((m & 1) && !sbi_platform_hart_disabled(plat, i)) {
oth = sbi_hart_id_to_scratch(scratch, i); oth = sbi_hart_id_to_scratch(scratch, i);
atomic_raw_set_bit(event, &oth->ipi_type); atomic_raw_set_bit(event, &oth->ipi_type);
mb(); mb();
sbi_platform_ipi_inject(plat, i, hartid); sbi_platform_ipi_inject(plat, i);
if (event != SBI_IPI_EVENT_SOFT) if (event != SBI_IPI_EVENT_SOFT)
sbi_platform_ipi_sync(plat, i, hartid); sbi_platform_ipi_sync(plat, i);
} }
} }
return 0; return 0;
} }
void sbi_ipi_clear_smode(struct sbi_scratch *scratch, u32 hartid) void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
{ {
csr_clear(mip, MIP_SSIP); csr_clear(mip, MIP_SSIP);
} }
void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid) void sbi_ipi_process(struct sbi_scratch *scratch)
{ {
struct sbi_platform *plat = sbi_platform_ptr(scratch); struct sbi_platform *plat = sbi_platform_ptr(scratch);
volatile unsigned long ipi_type; volatile unsigned long ipi_type;
unsigned int ipi_event; unsigned int ipi_event;
u32 hartid = sbi_current_hartid();
sbi_platform_ipi_clear(plat, hartid); sbi_platform_ipi_clear(plat, hartid);
@@ -79,11 +80,11 @@ void sbi_ipi_process(struct sbi_scratch *scratch, u32 hartid)
} while(ipi_type > 0); } while(ipi_type > 0);
} }
int sbi_ipi_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot) int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
{ {
/* Enable software interrupts */ /* Enable software interrupts */
csr_set(mie, MIP_MSIP); csr_set(mie, MIP_MSIP);
return sbi_platform_ipi_init(sbi_platform_ptr(scratch), return sbi_platform_ipi_init(sbi_platform_ptr(scratch),
hartid, cold_boot); cold_boot);
} }

2
lib/sbi_trap.c
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@@ -150,7 +150,7 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
sbi_timer_process(scratch, hartid); sbi_timer_process(scratch, hartid);
break; break;
case IRQ_M_SOFT: case IRQ_M_SOFT:
sbi_ipi_process(scratch, hartid); sbi_ipi_process(scratch);
break; break;
default: default:
msg = "unhandled external interrupt"; msg = "unhandled external interrupt";

6
platform/common/include/plat/sys/clint.h
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@@ -12,13 +12,13 @@
#include <sbi/sbi_types.h> #include <sbi/sbi_types.h>
void clint_ipi_inject(u32 target_hart, u32 source_hart); void clint_ipi_inject(u32 target_hart);
void clint_ipi_sync(u32 target_hart, u32 source_hart); void clint_ipi_sync(u32 target_hart);
void clint_ipi_clear(u32 target_hart); void clint_ipi_clear(u32 target_hart);
int clint_warm_ipi_init(u32 target_hart); int clint_warm_ipi_init(void);
int clint_cold_ipi_init(unsigned long base, u32 hart_count); int clint_cold_ipi_init(unsigned long base, u32 hart_count);

21
platform/common/sys/clint.c
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@@ -9,28 +9,28 @@
#include <sbi/riscv_io.h> #include <sbi/riscv_io.h>
#include <sbi/riscv_atomic.h> #include <sbi/riscv_atomic.h>
#include <sbi/sbi_hart.h>
#include <plat/sys/clint.h> #include <plat/sys/clint.h>
static u32 clint_ipi_hart_count; static u32 clint_ipi_hart_count;
static volatile void *clint_ipi_base; static volatile void *clint_ipi_base;
static volatile u32 *clint_ipi; static volatile u32 *clint_ipi;
void clint_ipi_inject(u32 target_hart, u32 source_hart) void clint_ipi_inject(u32 target_hart)
{ {
if ((clint_ipi_hart_count <= target_hart) || if (clint_ipi_hart_count <= target_hart)
(clint_ipi_hart_count <= source_hart))
return; return;
/* Set CLINT IPI */ /* Set CLINT IPI */
writel(1, &clint_ipi[target_hart]); writel(1, &clint_ipi[target_hart]);
} }
void clint_ipi_sync(u32 target_hart, u32 source_hart) void clint_ipi_sync(u32 target_hart)
{ {
u32 target_ipi, incoming_ipi; u32 target_ipi, incoming_ipi;
u32 source_hart = sbi_current_hartid();
if ((clint_ipi_hart_count <= target_hart) || if (clint_ipi_hart_count <= target_hart)
(clint_ipi_hart_count <= source_hart))
return; return;
/* Wait until target HART has handled IPI */ /* Wait until target HART has handled IPI */
@@ -57,14 +57,15 @@ void clint_ipi_clear(u32 target_hart)
writel(0, &clint_ipi[target_hart]); writel(0, &clint_ipi[target_hart]);
} }
int clint_warm_ipi_init(u32 target_hart) int clint_warm_ipi_init(void)
{ {
if (clint_ipi_hart_count <= target_hart || u32 hartid = sbi_current_hartid();
!clint_ipi_base)
if (!clint_ipi_base)
return -1; return -1;
/* Clear CLINT IPI */ /* Clear CLINT IPI */
clint_ipi_clear(target_hart); clint_ipi_clear(hartid);
return 0; return 0;
} }

4
platform/kendryte/k210/platform.c
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@@ -52,7 +52,7 @@ static int k210_irqchip_init(u32 hartid, bool cold_boot)
(2 * hartid + 1)); (2 * hartid + 1));
} }
static int k210_ipi_init(u32 hartid, bool cold_boot) static int k210_ipi_init(bool cold_boot)
{ {
int rc; int rc;
@@ -63,7 +63,7 @@ static int k210_ipi_init(u32 hartid, bool cold_boot)
return rc; return rc;
} }
return clint_warm_ipi_init(hartid); return clint_warm_ipi_init();
} }
static int k210_timer_init(u32 hartid, bool cold_boot) static int k210_timer_init(u32 hartid, bool cold_boot)

4
platform/qemu/sifive_u/platform.c
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@@ -89,7 +89,7 @@ static int sifive_u_irqchip_init(u32 hartid, bool cold_boot)
(2 * hartid + 1)); (2 * hartid + 1));
} }
static int sifive_u_ipi_init(u32 hartid, bool cold_boot) static int sifive_u_ipi_init(bool cold_boot)
{ {
int rc; int rc;
@@ -100,7 +100,7 @@ static int sifive_u_ipi_init(u32 hartid, bool cold_boot)
return rc; return rc;
} }
return clint_warm_ipi_init(hartid); return clint_warm_ipi_init();
} }
static int sifive_u_timer_init(u32 hartid, bool cold_boot) static int sifive_u_timer_init(u32 hartid, bool cold_boot)

4
platform/qemu/virt/platform.c
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@@ -90,7 +90,7 @@ static int virt_irqchip_init(u32 hartid, bool cold_boot)
(2 * hartid + 1)); (2 * hartid + 1));
} }
static int virt_ipi_init(u32 hartid, bool cold_boot) static int virt_ipi_init(bool cold_boot)
{ {
int rc; int rc;
@@ -101,7 +101,7 @@ static int virt_ipi_init(u32 hartid, bool cold_boot)
return rc; return rc;
} }
return clint_warm_ipi_init(hartid); return clint_warm_ipi_init();
} }
static int virt_timer_init(u32 hartid, bool cold_boot) static int virt_timer_init(u32 hartid, bool cold_boot)

4
platform/sifive/fu540/platform.c
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@@ -141,7 +141,7 @@ static int fu540_irqchip_init(u32 hartid, bool cold_boot)
(hartid) ? (2 * hartid) : -1); (hartid) ? (2 * hartid) : -1);
} }
static int fu540_ipi_init(u32 hartid, bool cold_boot) static int fu540_ipi_init(bool cold_boot)
{ {
int rc; int rc;
@@ -153,7 +153,7 @@ static int fu540_ipi_init(u32 hartid, bool cold_boot)
} }
return clint_warm_ipi_init(hartid); return clint_warm_ipi_init();
} }
static int fu540_timer_init(u32 hartid, bool cold_boot) static int fu540_timer_init(u32 hartid, bool cold_boot)