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lib: utils: serial: Add FDT driver for Renesas SCIF
Add FDT driver for Renesas SCIF.
dts example:
soc: soc {
....
scif0: serial@1004b800 {
compatible = "renesas,scif-r9a07g043",
"renesas,scif-r9a07g044";
reg = <0 0x1004b800 0 0x400>;
interrupts = <412 IRQ_TYPE_LEVEL_HIGH>,
<414 IRQ_TYPE_LEVEL_HIGH>,
<415 IRQ_TYPE_LEVEL_HIGH>,
<413 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi",
"bri", "dri", "tei";
clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
clock-names = "fck";
power-domains = <&cpg>;
resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
status = "disabled";
};
....
};
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
committed by
Anup Patel
parent
64e8b9f72e
commit
0021b43737
@@ -23,6 +23,9 @@
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#define DEFAULT_UART_REG_IO_WIDTH 1
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#define DEFAULT_UART_REG_OFFSET 0
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#define DEFAULT_RENESAS_SCIF_FREQ 100000000
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#define DEFAULT_RENESAS_SCIF_BAUD 115200
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#define DEFAULT_SIFIVE_UART_FREQ 0
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#define DEFAULT_SIFIVE_UART_BAUD 115200
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@@ -355,6 +358,14 @@ int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
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DEFAULT_UART_BAUD);
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}
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int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart)
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{
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return fdt_parse_uart_node_common(fdt, nodeoffset, uart,
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DEFAULT_RENESAS_SCIF_FREQ,
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DEFAULT_RENESAS_SCIF_BAUD);
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}
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int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart)
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{
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