From 38099e3fc6bb43e004c68b243d489408bf4cdb1a Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sat, 28 Jul 2018 09:45:49 +0200 Subject: [PATCH] Added ADC, H-Bridge and motor models, refactored project structure --- CMakeLists.txt | 1 + etc/cmake DBT-RISE-RISCV Debug.launch | 12 +- etc/cmake.sh | 8 +- etc/dbt-riscv Debug hello gdb.launch | 10 +- etc/dbt-riscv Debug hello w plugin.launch | 10 +- etc/hello Debug.launch | 3 + platform/CMakeLists.txt | 102 +++++++++++ {riscv.sc => platform}/gen_input/aon.rdl | 0 {riscv.sc => platform}/gen_input/clint.rdl | 0 {riscv.sc => platform}/gen_input/fe310.rdl | 0 {riscv.sc => platform}/gen_input/gpio.rdl | 0 {riscv.sc => platform}/gen_input/plic.rdl | 0 {riscv.sc => platform}/gen_input/prci.rdl | 0 {riscv.sc => platform}/gen_input/spi.rdl | 0 {riscv.sc => platform}/gen_input/uart.rdl | 0 {riscv.sc => platform}/incl/sysc/SiFive/aon.h | 0 .../incl/sysc/SiFive/clint.h | 0 .../incl/sysc/SiFive/gen/aon_regs.h | 0 .../incl/sysc/SiFive/gen/clint_regs.h | 0 .../incl/sysc/SiFive/gen/e300_plat_t.h | 0 .../incl/sysc/SiFive/gen/gpio_regs.h | 0 .../incl/sysc/SiFive/gen/plic_regs.h | 0 .../incl/sysc/SiFive/gen/prci_regs.h | 0 .../incl/sysc/SiFive/gen/spi_regs.h | 0 .../incl/sysc/SiFive/gen/uart_regs.h | 0 .../incl/sysc/SiFive/gpio.h | 0 .../incl/sysc/SiFive/hifive1.h | 8 +- .../incl/sysc/SiFive/plic.h | 0 .../incl/sysc/SiFive/prci.h | 0 {riscv.sc => platform}/incl/sysc/SiFive/spi.h | 0 .../incl/sysc/SiFive/uart.h | 0 .../incl/sysc/sc_comm_singleton.h | 6 +- .../incl/sysc/tlm_extensions.h | 6 +- platform/incl/sysc/top/BLDC.h | 105 +++++++++++ platform/incl/sysc/top/dcmotor.h | 38 ++++ platform/incl/sysc/top/h_bridge.h | 39 +++++ .../incl/sysc/top}/mcp3008.h | 6 +- .../incl/sysc/top}/system.h | 15 +- .../incl/sysc/top}/terminal.h | 6 +- {riscv.sc => platform}/src/CMakeLists.txt | 7 +- {riscv.sc => platform}/src/sc_main.cpp | 4 +- platform/src/sysc/BLDC.cpp | 164 ++++++++++++++++++ {riscv.sc => platform}/src/sysc/aon.cpp | 0 {riscv.sc => platform}/src/sysc/clint.cpp | 0 platform/src/sysc/dcmotor.cpp | 69 ++++++++ {riscv.sc => platform}/src/sysc/gpio.cpp | 0 platform/src/sysc/h_bridge.cpp | 47 +++++ .../src/sysc/hifive1.cpp | 4 +- {riscv.sc => platform}/src/sysc/mcp3008.cpp | 3 +- {riscv.sc => platform}/src/sysc/plic.cpp | 0 {riscv.sc => platform}/src/sysc/prci.cpp | 0 .../src/sysc/sc_comm_singleton.cpp | 0 {riscv.sc => platform}/src/sysc/spi.cpp | 0 {riscv.sc => platform}/src/sysc/system.cpp | 35 +++- {riscv.sc => platform}/src/sysc/terminal.cpp | 3 +- {riscv.sc => platform}/src/sysc/uart.cpp | 0 riscv.sc/CMakeLists.txt | 21 ++- .../incl/sysc/{SiFive => }/core_complex.h | 0 riscv.sc/src/{sysc => }/core_complex.cpp | 2 +- riscv/src/CMakeLists.txt | 4 +- sc-components | 2 +- 61 files changed, 696 insertions(+), 44 deletions(-) create mode 100644 platform/CMakeLists.txt rename {riscv.sc => platform}/gen_input/aon.rdl (100%) rename {riscv.sc => platform}/gen_input/clint.rdl (100%) rename {riscv.sc => platform}/gen_input/fe310.rdl (100%) rename {riscv.sc => platform}/gen_input/gpio.rdl (100%) rename {riscv.sc => platform}/gen_input/plic.rdl (100%) rename {riscv.sc => platform}/gen_input/prci.rdl (100%) rename {riscv.sc => platform}/gen_input/spi.rdl (100%) rename {riscv.sc => platform}/gen_input/uart.rdl (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/aon.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/clint.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/aon_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/clint_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/e300_plat_t.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/gpio_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/plic_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/prci_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/spi_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gen/uart_regs.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/gpio.h (100%) rename riscv.sc/incl/sysc/SiFive/platform.h => platform/incl/sysc/SiFive/hifive1.h (95%) rename {riscv.sc => platform}/incl/sysc/SiFive/plic.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/prci.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/spi.h (100%) rename {riscv.sc => platform}/incl/sysc/SiFive/uart.h (100%) rename {riscv.sc => platform}/incl/sysc/sc_comm_singleton.h (96%) rename {riscv.sc => platform}/incl/sysc/tlm_extensions.h (86%) create mode 100644 platform/incl/sysc/top/BLDC.h create mode 100644 platform/incl/sysc/top/dcmotor.h create mode 100644 platform/incl/sysc/top/h_bridge.h rename {riscv.sc/incl/sysc/General => platform/incl/sysc/top}/mcp3008.h (88%) rename {riscv.sc/incl/sysc/General => platform/incl/sysc/top}/system.h (67%) rename {riscv.sc/incl/sysc/General => platform/incl/sysc/top}/terminal.h (85%) rename {riscv.sc => platform}/src/CMakeLists.txt (94%) rename {riscv.sc => platform}/src/sc_main.cpp (98%) create mode 100644 platform/src/sysc/BLDC.cpp rename {riscv.sc => platform}/src/sysc/aon.cpp (100%) rename {riscv.sc => platform}/src/sysc/clint.cpp (100%) create mode 100644 platform/src/sysc/dcmotor.cpp rename {riscv.sc => platform}/src/sysc/gpio.cpp (100%) create mode 100644 platform/src/sysc/h_bridge.cpp rename riscv.sc/src/sysc/platform.cpp => platform/src/sysc/hifive1.cpp (98%) rename {riscv.sc => platform}/src/sysc/mcp3008.cpp (98%) rename {riscv.sc => platform}/src/sysc/plic.cpp (100%) rename {riscv.sc => platform}/src/sysc/prci.cpp (100%) rename {riscv.sc => platform}/src/sysc/sc_comm_singleton.cpp (100%) rename {riscv.sc => platform}/src/sysc/spi.cpp (100%) rename {riscv.sc => platform}/src/sysc/system.cpp (56%) rename {riscv.sc => platform}/src/sysc/terminal.cpp (98%) rename {riscv.sc => platform}/src/sysc/uart.cpp (100%) rename riscv.sc/incl/sysc/{SiFive => }/core_complex.h (100%) rename riscv.sc/src/{sysc => }/core_complex.cpp (99%) diff --git a/CMakeLists.txt b/CMakeLists.txt index 935c9af..9221345 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -58,5 +58,6 @@ add_subdirectory(softfloat) GET_DIRECTORY_PROPERTY(SOFTFLOAT_INCLUDE_DIRS DIRECTORY softfloat DEFINITION SOFTFLOAT_INCLUDE_DIRS) add_subdirectory(riscv) add_subdirectory(riscv.sc) +add_subdirectory(platform) message(STATUS "Build Type: ${CMAKE_BUILD_TYPE}") diff --git a/etc/cmake DBT-RISE-RISCV Debug.launch b/etc/cmake DBT-RISE-RISCV Debug.launch index aba881c..30e3133 100644 --- a/etc/cmake DBT-RISE-RISCV Debug.launch +++ b/etc/cmake DBT-RISE-RISCV Debug.launch @@ -1,7 +1,15 @@ + + + + + + + + - + - + diff --git a/etc/cmake.sh b/etc/cmake.sh index fd682cb..bd0659e 100755 --- a/etc/cmake.sh +++ b/etc/cmake.sh @@ -1,7 +1,11 @@ #!/bin/sh ## -suffix=Debug +if [ -n "$1" ]; then + suffix=$1 +else + suffix=Debug +fi cwd=`pwd` for i in $*; do if echo "$i" | grep 'CMAKE_BUILD_TYPE='; then @@ -9,4 +13,4 @@ for i in $*; do fi done mkdir -p build/$suffix && cd build/$suffix -cmake $* $cwd \ No newline at end of file +cmake $* $cwd diff --git a/etc/dbt-riscv Debug hello gdb.launch b/etc/dbt-riscv Debug hello gdb.launch index 4253af1..07be1e0 100644 --- a/etc/dbt-riscv Debug hello gdb.launch +++ b/etc/dbt-riscv Debug hello gdb.launch @@ -1,5 +1,13 @@ + + + + + + + + @@ -19,7 +27,7 @@ - + diff --git a/etc/dbt-riscv Debug hello w plugin.launch b/etc/dbt-riscv Debug hello w plugin.launch index 226bbf1..5701194 100644 --- a/etc/dbt-riscv Debug hello w plugin.launch +++ b/etc/dbt-riscv Debug hello w plugin.launch @@ -1,5 +1,13 @@ + + + + + + + + @@ -19,7 +27,7 @@ - + diff --git a/etc/hello Debug.launch b/etc/hello Debug.launch index 5706b7b..100dbaa 100644 --- a/etc/hello Debug.launch +++ b/etc/hello Debug.launch @@ -8,6 +8,7 @@ + @@ -25,6 +26,8 @@ + + diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt new file mode 100644 index 0000000..4dd7822 --- /dev/null +++ b/platform/CMakeLists.txt @@ -0,0 +1,102 @@ +cmake_minimum_required(VERSION 3.3) +set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) # main (top) cmake dir +set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake) # project specific cmake dir + +# CMake useful variables +set(CMAKE_RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/bin") +set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib") +set(CMAKE_LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib") + +# Set the name of your project here +project("riscv.sc") + +# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0) +set(VERSION_MAJOR "0") +set(VERSION_MINOR "0") +set(VERSION_PATCH "1") +set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH}) + +include(Common) + +## Git (and its revision) +find_package(Git QUIET) # if we don't find git or FindGit.cmake is not on the system we ignore it. +## The Git module will trigger a reconfiguration for each pull that will bring a new revision on the local repository +set (VCS_REVISION "-1") +if(GIT_FOUND) + include(GetGitRevisionDescription) + get_git_head_revision(GIT_REFSPEC GIT_SHA1) + message(STATUS "GIT branch ${GIT_REFSPEC}") + message(STATUS "GIT revision ${GIT_SHA1}") + set (VCS_REVISION ${GIT_SHA1}) +endif() + +# This line finds the boost lib and headers. +set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install. +find_package(Boost COMPONENTS program_options system thread REQUIRED) + +find_package(LLVM REQUIRED CONFIG) +message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}") +message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}") +llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser) + +find_package(SystemC) +if(SystemC_FOUND) + add_definitions(-DWITH_SYSTEMC) + include_directories(${SystemC_INCLUDE_DIRS}) + link_directories(${SystemC_LIBRARY_DIRS}) +else(SystemC_FOUND) + message( FATAL_ERROR "SystemC library not found." ) +endif(SystemC_FOUND) + +if(CCI_FOUND) + include_directories(${CCI_INCLUDE_DIRS}) + link_directories(${CCI_LIBRARY_DIRS}) +else() + message( FATAL_ERROR "SystemC CCI library not found." ) +endif() + +if(SCV_FOUND) + add_definitions(-DWITH_SCV) + link_directories(${SCV_LIBRARY_DIRS}) +endif(SCV_FOUND) + +# This sets the include directory for the reference project. This is the -I flag in gcc. +include_directories( + ${PROJECT_SOURCE_DIR}/incl + ${LLVM_INCLUDE_DIRS} +) + +add_dependent_subproject(dbt-core) +add_dependent_subproject(sc-components) +add_dependent_subproject(riscv) +add_dependent_subproject(riscv.sc) + +include_directories( + ${PROJECT_SOURCE_DIR}/incl + ${PROJECT_SOURCE_DIR}/../riscv/incl + ${PROJECT_SOURCE_DIR}/../external/elfio + ${PROJECT_SOURCE_DIR}/../external/libGIS + ${Boost_INCLUDE_DIRS} +) + + +# Mac needed variables (adapt for your needs - http://www.cmake.org/Wiki/CMake_RPATH_handling#Mac_OS_X_and_the_RPATH) +set(CMAKE_MACOSX_RPATH ON) +set(CMAKE_SKIP_BUILD_RPATH FALSE) +set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) +set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") +set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) + +add_subdirectory(src) + +# +# SYSTEM PACKAGING (RPM, TGZ, ...) +# _____________________________________________________________________________ + +#include(CPackConfig) + +# +# CMAKE PACKAGING (for other CMake projects to use this one easily) +# _____________________________________________________________________________ + +#include(PackageConfigurator) \ No newline at end of file diff --git a/riscv.sc/gen_input/aon.rdl b/platform/gen_input/aon.rdl similarity index 100% rename from riscv.sc/gen_input/aon.rdl rename to platform/gen_input/aon.rdl diff --git a/riscv.sc/gen_input/clint.rdl b/platform/gen_input/clint.rdl similarity index 100% rename from riscv.sc/gen_input/clint.rdl rename to platform/gen_input/clint.rdl diff --git a/riscv.sc/gen_input/fe310.rdl b/platform/gen_input/fe310.rdl similarity index 100% rename from riscv.sc/gen_input/fe310.rdl rename to platform/gen_input/fe310.rdl diff --git a/riscv.sc/gen_input/gpio.rdl b/platform/gen_input/gpio.rdl similarity index 100% rename from riscv.sc/gen_input/gpio.rdl rename to platform/gen_input/gpio.rdl diff --git a/riscv.sc/gen_input/plic.rdl b/platform/gen_input/plic.rdl similarity index 100% rename from riscv.sc/gen_input/plic.rdl rename to platform/gen_input/plic.rdl diff --git a/riscv.sc/gen_input/prci.rdl b/platform/gen_input/prci.rdl similarity index 100% rename from riscv.sc/gen_input/prci.rdl rename to platform/gen_input/prci.rdl diff --git a/riscv.sc/gen_input/spi.rdl b/platform/gen_input/spi.rdl similarity index 100% rename from riscv.sc/gen_input/spi.rdl rename to platform/gen_input/spi.rdl diff --git a/riscv.sc/gen_input/uart.rdl b/platform/gen_input/uart.rdl similarity index 100% rename from riscv.sc/gen_input/uart.rdl rename to platform/gen_input/uart.rdl diff --git a/riscv.sc/incl/sysc/SiFive/aon.h b/platform/incl/sysc/SiFive/aon.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/aon.h rename to platform/incl/sysc/SiFive/aon.h diff --git a/riscv.sc/incl/sysc/SiFive/clint.h b/platform/incl/sysc/SiFive/clint.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/clint.h rename to platform/incl/sysc/SiFive/clint.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/aon_regs.h b/platform/incl/sysc/SiFive/gen/aon_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/aon_regs.h rename to platform/incl/sysc/SiFive/gen/aon_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/clint_regs.h b/platform/incl/sysc/SiFive/gen/clint_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/clint_regs.h rename to platform/incl/sysc/SiFive/gen/clint_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/e300_plat_t.h b/platform/incl/sysc/SiFive/gen/e300_plat_t.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/e300_plat_t.h rename to platform/incl/sysc/SiFive/gen/e300_plat_t.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/gpio_regs.h b/platform/incl/sysc/SiFive/gen/gpio_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/gpio_regs.h rename to platform/incl/sysc/SiFive/gen/gpio_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/plic_regs.h b/platform/incl/sysc/SiFive/gen/plic_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/plic_regs.h rename to platform/incl/sysc/SiFive/gen/plic_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/prci_regs.h b/platform/incl/sysc/SiFive/gen/prci_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/prci_regs.h rename to platform/incl/sysc/SiFive/gen/prci_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/spi_regs.h b/platform/incl/sysc/SiFive/gen/spi_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/spi_regs.h rename to platform/incl/sysc/SiFive/gen/spi_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gen/uart_regs.h b/platform/incl/sysc/SiFive/gen/uart_regs.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gen/uart_regs.h rename to platform/incl/sysc/SiFive/gen/uart_regs.h diff --git a/riscv.sc/incl/sysc/SiFive/gpio.h b/platform/incl/sysc/SiFive/gpio.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/gpio.h rename to platform/incl/sysc/SiFive/gpio.h diff --git a/riscv.sc/incl/sysc/SiFive/platform.h b/platform/incl/sysc/SiFive/hifive1.h similarity index 95% rename from riscv.sc/incl/sysc/SiFive/platform.h rename to platform/incl/sysc/SiFive/hifive1.h index 2464a06..3d9f862 100644 --- a/riscv.sc/incl/sysc/SiFive/platform.h +++ b/platform/incl/sysc/SiFive/hifive1.h @@ -44,7 +44,7 @@ #include "prci.h" #include "spi.h" #include "uart.h" -#include "core_complex.h" +#include "sysc/core_complex.h" #include "scc/memory.h" #include "scc/router.h" @@ -56,16 +56,16 @@ namespace sysc { -class platform : public sc_core::sc_module { +class hifive1 : public sc_core::sc_module { public: - SC_HAS_PROCESS(platform); + SC_HAS_PROCESS(hifive1); sc_core::sc_vector> pins_o; sc_core::sc_vector> pins_i; sc_core::sc_in erst_n; - platform(sc_core::sc_module_name nm); + hifive1(sc_core::sc_module_name nm); private: SiFive::core_complex i_core_complex; diff --git a/riscv.sc/incl/sysc/SiFive/plic.h b/platform/incl/sysc/SiFive/plic.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/plic.h rename to platform/incl/sysc/SiFive/plic.h diff --git a/riscv.sc/incl/sysc/SiFive/prci.h b/platform/incl/sysc/SiFive/prci.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/prci.h rename to platform/incl/sysc/SiFive/prci.h diff --git a/riscv.sc/incl/sysc/SiFive/spi.h b/platform/incl/sysc/SiFive/spi.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/spi.h rename to platform/incl/sysc/SiFive/spi.h diff --git a/riscv.sc/incl/sysc/SiFive/uart.h b/platform/incl/sysc/SiFive/uart.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/uart.h rename to platform/incl/sysc/SiFive/uart.h diff --git a/riscv.sc/incl/sysc/sc_comm_singleton.h b/platform/incl/sysc/sc_comm_singleton.h similarity index 96% rename from riscv.sc/incl/sysc/sc_comm_singleton.h rename to platform/incl/sysc/sc_comm_singleton.h index 9f41321..9fc4ea3 100644 --- a/riscv.sc/incl/sysc/sc_comm_singleton.h +++ b/platform/incl/sysc/sc_comm_singleton.h @@ -34,8 +34,8 @@ // //////////////////////////////////////////////////////////////////////////////// -#ifndef RISCV_SC_INCL_SYSC_SC_COMM_SINGLETON_H_ -#define RISCV_SC_INCL_SYSC_SC_COMM_SINGLETON_H_ +#ifndef _SYSC_SC_COMM_SINGLETON_H_ +#define _SYSC_SC_COMM_SINGLETON_H_ #include #include @@ -110,4 +110,4 @@ private: } /* namespace sysc */ -#endif /* RISCV_SC_INCL_SYSC_SC_COMM_SINGLETON_H_ */ +#endif /* _SYSC_SC_COMM_SINGLETON_H_ */ diff --git a/riscv.sc/incl/sysc/tlm_extensions.h b/platform/incl/sysc/tlm_extensions.h similarity index 86% rename from riscv.sc/incl/sysc/tlm_extensions.h rename to platform/incl/sysc/tlm_extensions.h index cc88599..a57e373 100644 --- a/riscv.sc/incl/sysc/tlm_extensions.h +++ b/platform/incl/sysc/tlm_extensions.h @@ -5,8 +5,8 @@ * Author: eyck */ -#ifndef RISCV_SC_INCL_SYSC_TLM_EXTENSIONS_H_ -#define RISCV_SC_INCL_SYSC_TLM_EXTENSIONS_H_ +#ifndef _SYSC_TLM_EXTENSIONS_H_ +#define _SYSC_TLM_EXTENSIONS_H_ #include "tlm/tlm_extensions.h" @@ -45,4 +45,4 @@ struct tlm_signal_spi_extension : public tlm::tlm_unmanaged_extension +namespace odeint = boost::numeric::odeint; + +inline +double norm_angle(double alpha){ + double alpha_n = fmod(alpha, M_PI * 2); + if (alpha_n < 0.) alpha_n += (M_PI * 2); + return alpha_n; +} + + +class BLDC { +public: + struct Config { + double inertia = 0.0005; /* aka 'J' in kg/(m^2) */ + double damping = 0.000089; /* aka 'B' in Nm/(rad/s) */ + double static_friction = 0.0; /* in Nm */ + //double Kv = 0.0042; /* motor constant in RPM/V */ + double Ke = 0.0042; /* back emf constant in V/rad/s*/ + double L = 0.0027; /* Coil inductance in H */ + double M = -0.000069; /* Mutual coil inductance in H */ + double R = 2.875; /* Coil resistence in Ohm */ + int NbPoles = 2; /* NbPoles / 2 = Number of pole pairs (you count the permanent magnets on the rotor to get NbPoles) */ + }; + + using StateVector = std::array; + + struct State{ + double& theta; /* angle of the rotor */ + double& omega; /* angular speed of the rotor */ + double& ia; /* phase a current */ + double& ib; /* phase b current */ + double& ic; /* phase c current */ + explicit State(StateVector& v):theta(v[0]), omega(v[1]), ia(v[2]), ib(v[3]), ic(v[4]){} + State(State&&) = delete; + State(const State&) = delete; + State& operator=(const State&) = delete; // Copy assignment operator + State& operator=(const State&&) = delete; // Move assignment operator + ~State(){} + void init(){ + theta = ia = ib = ic = 0; + omega = 0.; + } + }; + + explicit BLDC(const Config config); + + virtual ~BLDC(); + + void set_input(std::array vin){ + this->vin=vin; + } + + void run(double dt); + + void printToStream(std::ostream&) const; + + double get_current_time(){return current_time;} + + std::tuple get_voltages(){ + return std::tuple( + voltages[VA]+voltages[EA]+state.ia*config.R, + voltages[VB]+voltages[EB]+state.ib*config.R, + voltages[VC]+voltages[EC]+state.ic*config.R + ); + } + const State& getState(){ return state;} + + void setLoad(double torque){torque_load=torque;} +protected: + Config config; + StateVector stateVector; + State state; + std::array vin; + double current_time = 0.0; + double torque_load=0.0; + double etorque=0.0, mtorque=0.0; + const double dt = 0.000001; + std::array voltages; + enum VoltageNames {EA=0, EB=1, EC=2, VA=3, VB=4, VC=5, VCENTER=6}; + double calc_bemf_factor(const State& state, double theta ); + void calc_back_emf(const State& state, double theta_e ); + void calc_voltages(); + // ODE part + //boost::numeric::odeint::runge_kutta4< StateVector > stepper; + //boost::numeric::odeint::runge_kutta_cash_karp54 stepper; + //using stepper_type = odeint::runge_kutta_dopri5; + //using stepper_type = odeint::runge_kutta_cash_karp54< StateVector>; + using stepper_type = odeint::runge_kutta_fehlberg78< StateVector>; + void rotor_dyn( const StateVector& x , StateVector& dxdt , const double t ); +}; + +std::ostream& operator<<(std::ostream& os, const BLDC& bldc); + +#endif /* BLDC_H_ */ diff --git a/platform/incl/sysc/top/dcmotor.h b/platform/incl/sysc/top/dcmotor.h new file mode 100644 index 0000000..21e55e8 --- /dev/null +++ b/platform/incl/sysc/top/dcmotor.h @@ -0,0 +1,38 @@ +/* + * dcmotor.h + * + * Created on: 25.07.2018 + * Author: eyck + */ + +#ifndef _SYSC_TOP_DCMOTOR_H_ +#define _SYSC_TOP_DCMOTOR_H_ + +#include "BLDC.h" +#include "scc/traceable.h" +#include + +namespace sysc { + +class dc_motor: public sc_core::sc_module, public scc::traceable { +public: + SC_HAS_PROCESS(dc_motor); + + sc_core::sc_in va_i, vb_i, vc_i; + sc_core::sc_out va_o, vb_o, vc_o; + + dc_motor(const sc_core::sc_module_name& nm ); + + virtual ~dc_motor(); + + void trace(sc_core::sc_trace_file *trf) override; + +private: + void thread(void); + BLDC bldc_model; + const BLDC::State& bldc_state; +}; + +} /* namespace sysc */ + +#endif /* RISCV_SC_INCL_SYSC_TOP_DCMOTOR_H_ */ diff --git a/platform/incl/sysc/top/h_bridge.h b/platform/incl/sysc/top/h_bridge.h new file mode 100644 index 0000000..f8cb1f4 --- /dev/null +++ b/platform/incl/sysc/top/h_bridge.h @@ -0,0 +1,39 @@ +/* + * h_bridge.h + * + * Created on: 25.07.2018 + * Author: eyck + */ + +#ifndef RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_ +#define RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_ + +#include "cci_configuration" +#include + +namespace sysc { + +class h_bridge: public sc_core::sc_module { +public: + SC_HAS_PROCESS(h_bridge); + + sc_core::sc_in ha_i, la_i; + sc_core::sc_in hb_i, lb_i; + sc_core::sc_in hc_i, lc_i; + + sc_core::sc_out va_o, vb_o, vc_o; + + cci::cci_param vcc; + + h_bridge(const sc_core::sc_module_name& nm); + + virtual ~h_bridge(); +private: + void ain_cb(); + void bin_cb(); + void cin_cb(); +}; + +} /* namespace sysc */ + +#endif /* RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_ */ diff --git a/riscv.sc/incl/sysc/General/mcp3008.h b/platform/incl/sysc/top/mcp3008.h similarity index 88% rename from riscv.sc/incl/sysc/General/mcp3008.h rename to platform/incl/sysc/top/mcp3008.h index 2a1ba37..e4ec0a8 100644 --- a/riscv.sc/incl/sysc/General/mcp3008.h +++ b/platform/incl/sysc/top/mcp3008.h @@ -5,8 +5,8 @@ * Author: eyck */ -#ifndef RISCV_SC_INCL_SYSC_GENERAL_MCP3008_H_ -#define RISCV_SC_INCL_SYSC_GENERAL_MCP3008_H_ +#ifndef _SYSC_TOP_MCP3008_H_ +#define _SYSC_TOP_MCP3008_H_ #include "scc/signal_target_mixin.h" #include "scc/signal_initiator_mixin.h" @@ -44,4 +44,4 @@ private: } /* namespace sysc */ -#endif /* RISCV_SC_INCL_SYSC_GENERAL_MCP3008_H_ */ +#endif /* _SYSC_TOP_MCP3008_H_ */ diff --git a/riscv.sc/incl/sysc/General/system.h b/platform/incl/sysc/top/system.h similarity index 67% rename from riscv.sc/incl/sysc/General/system.h rename to platform/incl/sysc/top/system.h index d066b0e..b711397 100644 --- a/riscv.sc/incl/sysc/General/system.h +++ b/platform/incl/sysc/top/system.h @@ -8,10 +8,12 @@ #ifndef __SYSC_GENERAL_SYSTEM_H_ #define __SYSC_GENERAL_SYSTEM_H_ -#include "sysc/SiFive/platform.h" -#include "sysc/General/terminal.h" -#include "sysc/General/mcp3008.h" #include +#include "sysc/SiFive/hifive1.h" +#include "mcp3008.h" +#include "terminal.h" +#include "h_bridge.h" +#include "dcmotor.h" namespace sysc { @@ -22,14 +24,17 @@ public: system(sc_core::sc_module_name nm); virtual ~system(); + private: sc_core::sc_vector> s_gpio; sc_core::sc_signal s_rst_n; - sc_core::sc_signal s_vref; + sc_core::sc_signal s_vref, s_va, s_vb, s_vc, s_vasens, s_vbsens, s_vcsens; sc_core::sc_vector> s_ana; - sysc::platform i_platform; + sysc::hifive1 i_platform; sysc::terminal i_terminal; sysc::mcp3008 i_adc; + sysc::h_bridge i_h_bridge; + sysc::dc_motor i_motor; void gen_por(); }; diff --git a/riscv.sc/incl/sysc/General/terminal.h b/platform/incl/sysc/top/terminal.h similarity index 85% rename from riscv.sc/incl/sysc/General/terminal.h rename to platform/incl/sysc/top/terminal.h index 06eb197..11a9bc0 100644 --- a/riscv.sc/incl/sysc/General/terminal.h +++ b/platform/incl/sysc/top/terminal.h @@ -5,8 +5,8 @@ * Author: eyck */ -#ifndef RISCV_SC_INCL_SYSC_GENERAL_TERMINAL_H_ -#define RISCV_SC_INCL_SYSC_GENERAL_TERMINAL_H_ +#ifndef _SYSC_TOP_TERMINAL_H_ +#define _SYSC_TOP_TERMINAL_H_ #include "scc/signal_target_mixin.h" #include "scc/signal_initiator_mixin.h" @@ -41,4 +41,4 @@ protected: }; } -#endif /* RISCV_SC_INCL_SYSC_GENERAL_TERMINAL_H_ */ +#endif /* _SYSC_TOP_TERMINAL_H_ */ diff --git a/riscv.sc/src/CMakeLists.txt b/platform/src/CMakeLists.txt similarity index 94% rename from riscv.sc/src/CMakeLists.txt rename to platform/src/CMakeLists.txt index 6bdfb44..2cb673a 100644 --- a/riscv.sc/src/CMakeLists.txt +++ b/platform/src/CMakeLists.txt @@ -9,7 +9,7 @@ set(APP_HEADERS ) set(APP_SOURCES sc_main.cpp) # Define two variables in order not to repeat ourselves. -set(LIBRARY_NAME risc-v.sc) +set(LIBRARY_NAME platform) ## the following setting needs to be consistent with the library #add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS) @@ -24,7 +24,7 @@ set_target_properties(${LIBRARY_NAME} PROPERTIES ) # This is a make target, so you can do a "make riscv-sc" -set(APPLICATION_NAME riscv.sc) +set(APPLICATION_NAME riscv.vp) include_directories(${CONAN_INCLUDE_DIRS_SEASOCKS}) include_directories(${SystemC_INCLUDE_DIRS}) @@ -39,7 +39,8 @@ add_executable(${APPLICATION_NAME} ${APP_SOURCES}) # Links the target exe against the libraries target_link_libraries(${APPLICATION_NAME} ${LIBRARY_NAME}) -target_link_libraries(${APPLICATION_NAME} risc-v) +target_link_libraries(${APPLICATION_NAME} riscv.sc) +target_link_libraries(${APPLICATION_NAME} riscv) target_link_libraries(${APPLICATION_NAME} dbt-core) target_link_libraries(${APPLICATION_NAME} softfloat) target_link_libraries(${APPLICATION_NAME} sc-components) diff --git a/riscv.sc/src/sc_main.cpp b/platform/src/sc_main.cpp similarity index 98% rename from riscv.sc/src/sc_main.cpp rename to platform/src/sc_main.cpp index 62c5dfb..9987e1d 100644 --- a/riscv.sc/src/sc_main.cpp +++ b/platform/src/sc_main.cpp @@ -37,13 +37,13 @@ #include #include #include -#include #include "scc/configurer.h" #include "scc/report.h" #include "scc/scv_tr_db.h" #include "scc/tracer.h" #include #include +#include "../incl/sysc/top/system.h" using namespace sysc; namespace po = boost::program_options; @@ -128,7 +128,7 @@ int sc_main(int argc, char *argv[]) { /////////////////////////////////////////////////////////////////////////// // instantiate top level /////////////////////////////////////////////////////////////////////////// - sysc::system i_system("i_system"); + auto i_system = std::make_unique("i_system"); /////////////////////////////////////////////////////////////////////////// // set up tracing & transaction recording /////////////////////////////////////////////////////////////////////////// diff --git a/platform/src/sysc/BLDC.cpp b/platform/src/sysc/BLDC.cpp new file mode 100644 index 0000000..a813890 --- /dev/null +++ b/platform/src/sysc/BLDC.cpp @@ -0,0 +1,164 @@ +/* + * BLDC.cpp + * + * Created on: 26.06.2018 + * Author: eyck + */ + +#include "sysc/top/BLDC.h" + +// implementation according to Modeling of BLDC Motor with Ideal Back-EMF for Automotive Applications +// Proceedings of the World Congress on Engineering 2011 Vol II WCE 2011, July 6 - 8, 2011, London, U.K. +BLDC::BLDC(const Config config) +: config(config) +, stateVector({{0.0, 0.0, 0.0, 0.0, 0.0}}) +, state(stateVector) +, vin({{0.0, 0.0, 0.0}}) +, voltages({{0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}}) +{ + state.init(); +} + +BLDC::~BLDC() { + +} + +double BLDC::calc_bemf_factor(const State& x, double theta){ + if(theta>=0 && theta < 2./3.*M_PI){ + return 1; + } else if(theta>=2./3.*M_PI && theta < M_PI){ + return 1-6/M_PI*(theta-2./3.*M_PI); + } else if(theta>=M_PI && theta < 5./3. * M_PI){ + return -1; + } else if(theta>=5./3. * M_PI && theta < 2. * M_PI){ + return -1+6/M_PI*(theta-5./3.*M_PI); + } else { + fprintf(stderr, "ERROR: angle out of bounds can not calculate bemf %f\n", theta); + throw std::runtime_error("angle out of bounds can not calculate bemf"); + } +} + +void BLDC::calc_back_emf(const State& state, double theta_e) { + double max_bemf = config.Ke * state.omega; + voltages[EA] = max_bemf*calc_bemf_factor(state, norm_angle(theta_e)); + voltages[EB] = max_bemf*calc_bemf_factor(state, norm_angle(theta_e + M_PI * (2. / 3.))); + voltages[EC] = max_bemf*calc_bemf_factor(state, norm_angle(theta_e + M_PI * (4. / 3.))); +} + + +void BLDC::calc_voltages(){ + const double NaN = nan(""); + /* Check which phases are excited. */ + bool pa = isnan(vin[0])?false:true; + bool pb = isnan(vin[1])?false:true; + bool pc = isnan(vin[2])?false:true; + + if (pa && pb && pc) { + voltages[VA] = vin[0]; + voltages[VB] = vin[1]; + voltages[VC] = vin[2]; + voltages[VCENTER] = (voltages[VA] + voltages[VB] + voltages[VC] - voltages[EA] - voltages[EB] - voltages[EC]) / 3.; + } else if (pa && pb) { + voltages[VA] = vin[0]; + voltages[VB] = vin[1]; + voltages[VCENTER] = (voltages[VA] + voltages[VB] - voltages[EA] - voltages[EB]) / 2.; + voltages[VC] = voltages[EC] + voltages[VCENTER]; + } else if (pa && pc) { + voltages[VA] = vin[0]; + voltages[VC] = vin[2]; + voltages[VCENTER] = (voltages[VA] + voltages[VC] - voltages[EA] - voltages[EC]) / 2.; + voltages[VB] = voltages[EB] + voltages[VCENTER]; + } else if (pb && pc) { + voltages[VB] = vin[1]; + voltages[VC] = vin[2]; + voltages[VCENTER] = (voltages[VB] + voltages[VC] - voltages[EB] - voltages[EC]) / 2.; + voltages[VA] = voltages[EA] + voltages[VCENTER]; + } else if (pa) { + voltages[VA] = vin[0]; + voltages[VCENTER] = (voltages[VA] - voltages[EA]); + voltages[VB] = voltages[EB] + voltages[VCENTER]; + voltages[VC] = voltages[EC] + voltages[VCENTER]; + } else if (pb) { + voltages[VB] = vin[1]; + voltages[VCENTER] = (voltages[VB] - voltages[EB]); + voltages[VA] = voltages[EA] + voltages[VCENTER]; + voltages[VC] = voltages[EC] + voltages[VCENTER]; + } else if (pc) { + voltages[VC] = vin[0]; + voltages[VCENTER] = (voltages[VC] - voltages[EC]); + voltages[VA] = voltages[EA] + voltages[VCENTER]; + voltages[VB] = voltages[EB] + voltages[VCENTER]; + } else { + voltages[VA] = voltages[EA]; + voltages[VB] = voltages[EB]; + voltages[VC] = voltages[EC]; + voltages[VCENTER] = 0; + } +} + +void BLDC::printToStream(std::ostream& os) const { + os<(x_)); + State dxdt(dxdt_); + double theta_e = state.theta * (config.NbPoles / 2.); + /* Calculate backemf voltages. */ + calc_back_emf(x, theta_e); + /* Calculate voltages. */ + calc_voltages(); + /* Electromagnetic torque. */ +// if (x.omega == 0) { +// printf("ERROR: input state vector omega equals 0!!!\n"); +// throw std::runtime_error("input state vector omega equals 0"); +// } + /* electrical torque */ + //etorque = ((voltages[EA] * x.ia) + (voltages[EB] * x.ib) + (voltages[EC] * x.ic)) / x.omega; + // which is equivalent to: + etorque = config.Ke*( + x.ia * (calc_bemf_factor(state, norm_angle(theta_e))) + + x.ib * (calc_bemf_factor(state, norm_angle(theta_e + M_PI * (2. / 3.)))) + + x.ic * (calc_bemf_factor(state, norm_angle(theta_e + M_PI * (4. / 3.)))) + ); + /* Mechanical torque. */ + mtorque = ((etorque * (config.NbPoles / 2)) - (config.damping * x.omega) - torque_load); + + if ((mtorque > 0) && (mtorque <= config.static_friction)) { + mtorque = 0; + } else if (mtorque > config.static_friction) { + mtorque -= config.static_friction; + } else if ((mtorque < 0) && (mtorque >= -(config.static_friction))) { + mtorque = 0; + } else if (mtorque < -(config.static_friction)) { + mtorque += config.static_friction; + } + /* Position of the rotor */ + dxdt.theta = x.omega; + /* Acceleration of the rotor. (omega_dot) */ + // a=M/J with M->torque, J->Inertia, a->angular acceleration + dxdt.omega = mtorque / config.inertia; + /* Calculate dot currents. */ + dxdt.ia = (voltages[VA] - (config.R * x.ia) - voltages[EA] - voltages[VCENTER]) / (config.L - config.M); + dxdt.ib = (voltages[VB] - (config.R * x.ib) - voltages[EB] - voltages[VCENTER]) / (config.L - config.M); + dxdt.ic = (voltages[VC] - (config.R * x.ic) - voltages[EC] - voltages[VCENTER]) / (config.L - config.M); +} + +void BLDC::run(double incr) { + if(dt>incr) throw std::runtime_error("incr needs to be larger than dt"); + double next_time = current_time+incr; + odeint::integrate_adaptive(make_controlled( 1.0e-10 , 1.0e-6 , stepper_type() ), + [this]( const StateVector &x , StateVector &dxdt , double t ) {this->rotor_dyn(x, dxdt,t);}, + stateVector, current_time, next_time, dt); + current_time=next_time; + state.theta=norm_angle(state.theta); +} + +std::ostream& operator <<(std::ostream& os, const BLDC& bldc) { + bldc.printToStream(os); + return os; +} diff --git a/riscv.sc/src/sysc/aon.cpp b/platform/src/sysc/aon.cpp similarity index 100% rename from riscv.sc/src/sysc/aon.cpp rename to platform/src/sysc/aon.cpp diff --git a/riscv.sc/src/sysc/clint.cpp b/platform/src/sysc/clint.cpp similarity index 100% rename from riscv.sc/src/sysc/clint.cpp rename to platform/src/sysc/clint.cpp diff --git a/platform/src/sysc/dcmotor.cpp b/platform/src/sysc/dcmotor.cpp new file mode 100644 index 0000000..50bad08 --- /dev/null +++ b/platform/src/sysc/dcmotor.cpp @@ -0,0 +1,69 @@ +/* + * dcmotor.cpp + * + * Created on: 25.07.2018 + * Author: eyck + */ + +#include "sysc/top/dcmotor.h" +#include "scc/utilities.h" +#include + +namespace sysc { + +using namespace sc_core; + +auto get_config = []() -> BLDC::Config { + BLDC::Config config{}; + config.Ke=1./4000. ,//0.01; // V/rad/s, = 1/Kv + config.R=0.5; // Ohm + config.inertia = 0.0005; + config.NbPoles = 2; + config.damping = 0.00001; + return config; +}; + +dc_motor::dc_motor(const sc_module_name& nm ) +: sc_module(nm) +, bldc_model(get_config()) +, bldc_state(bldc_model.getState()) +{ + bldc_model.setLoad(0.0001); + SC_THREAD(thread); +} + +dc_motor::~dc_motor() { +} + +void dc_motor::trace(sc_trace_file* trf) { + auto ia=bldc_state.ia; TRACE_VAR(trf, ia); + auto ib=bldc_state.ib; TRACE_VAR(trf, ib); + auto ic=bldc_state.ic; TRACE_VAR(trf, ic); + auto theta=bldc_state.theta; TRACE_VAR(trf, theta); + auto omega=bldc_state.omega; TRACE_VAR(trf, omega); +} + +void dc_motor::thread(void) { + wait(SC_ZERO_TIME); + std::array vin{0., 0., 0.}; + const sc_time step(1, SC_US); + auto eval_model = [this](std::array vin, const sc_time step)->std::tuple { + bldc_model.set_input(vin); + bldc_model.run(step.to_seconds()); + return bldc_model.get_voltages(); + }; + while(true){ + vin[0]=va_i.read(); + vin[1]=vb_i.read(); + vin[2]=vc_i.read(); +// auto sim_res=std::async(std::launch::async, eval_model, vin, step); + wait(step); +// auto vout=sim_res.get(); + auto vout = eval_model(vin, step); + va_o=std::get<0>(vout); + vb_o=std::get<1>(vout); + vc_o=std::get<2>(vout); + } +} + +} /* namespace sysc */ diff --git a/riscv.sc/src/sysc/gpio.cpp b/platform/src/sysc/gpio.cpp similarity index 100% rename from riscv.sc/src/sysc/gpio.cpp rename to platform/src/sysc/gpio.cpp diff --git a/platform/src/sysc/h_bridge.cpp b/platform/src/sysc/h_bridge.cpp new file mode 100644 index 0000000..ba16d6a --- /dev/null +++ b/platform/src/sysc/h_bridge.cpp @@ -0,0 +1,47 @@ +/* + * h_bridge.cpp + * + * Created on: 25.07.2018 + * Author: eyck + */ + +#include "sysc/top/h_bridge.h" +#include "scc/utilities.h" + +namespace sysc { +using namespace sc_core; + +h_bridge::h_bridge(const sc_module_name& nm) +:sc_module(nm) +, NAMED(ha_i) +, NAMED(la_i) +, NAMED(hb_i) +, NAMED(lb_i) +, NAMED(hc_i) +, NAMED(lc_i) +, NAMED(va_o) +, NAMED(vb_o) +, NAMED(vc_o) +, NAMED(vcc, 48.0) +{ + SC_METHOD(ain_cb); + sensitive< +#include "sysc/SiFive/hifive1.h" namespace sysc { -platform::platform(sc_core::sc_module_name nm) +hifive1::hifive1(sc_core::sc_module_name nm) : sc_core::sc_module(nm) , NAMED(pins_o, 32) , NAMED(pins_i, 32) diff --git a/riscv.sc/src/sysc/mcp3008.cpp b/platform/src/sysc/mcp3008.cpp similarity index 98% rename from riscv.sc/src/sysc/mcp3008.cpp rename to platform/src/sysc/mcp3008.cpp index 8846202..b91eca4 100644 --- a/riscv.sc/src/sysc/mcp3008.cpp +++ b/platform/src/sysc/mcp3008.cpp @@ -5,7 +5,8 @@ * Author: eyck */ -#include "sysc/General/mcp3008.h" +#include "sysc/top/mcp3008.h" + #include #include diff --git a/riscv.sc/src/sysc/plic.cpp b/platform/src/sysc/plic.cpp similarity index 100% rename from riscv.sc/src/sysc/plic.cpp rename to platform/src/sysc/plic.cpp diff --git a/riscv.sc/src/sysc/prci.cpp b/platform/src/sysc/prci.cpp similarity index 100% rename from riscv.sc/src/sysc/prci.cpp rename to platform/src/sysc/prci.cpp diff --git a/riscv.sc/src/sysc/sc_comm_singleton.cpp b/platform/src/sysc/sc_comm_singleton.cpp similarity index 100% rename from riscv.sc/src/sysc/sc_comm_singleton.cpp rename to platform/src/sysc/sc_comm_singleton.cpp diff --git a/riscv.sc/src/sysc/spi.cpp b/platform/src/sysc/spi.cpp similarity index 100% rename from riscv.sc/src/sysc/spi.cpp rename to platform/src/sysc/spi.cpp diff --git a/riscv.sc/src/sysc/system.cpp b/platform/src/sysc/system.cpp similarity index 56% rename from riscv.sc/src/sysc/system.cpp rename to platform/src/sysc/system.cpp index 34842fb..3d71251 100644 --- a/riscv.sc/src/sysc/system.cpp +++ b/platform/src/sysc/system.cpp @@ -5,7 +5,7 @@ * Author: eyck */ -#include "sysc/General/system.h" +#include "sysc/top/system.h" using namespace sysc; @@ -14,10 +14,15 @@ system::system(sc_core::sc_module_name nm) , NAMED(s_gpio, 32) , NAMED(s_rst_n) , NAMED(s_vref) -, NAMED(s_ana, 8) +, NAMED(s_va) +, NAMED(s_vb) +, NAMED(s_vc) +, NAMED(s_ana, 5) , NAMED(i_platform) , NAMED(i_terminal) , NAMED(i_adc) +, NAMED(i_h_bridge) +, NAMED(i_motor) { // connect platform i_platform.erst_n(s_rst_n); @@ -36,8 +41,32 @@ system::system(sc_core::sc_module_name nm) i_adc.miso_o(s_gpio[4].in); s_gpio[5].out(i_adc.sck_i); // adc analog inputs - i_adc.ch_i(s_ana); i_adc.vref_i(s_vref); + i_adc.ch_i[0](s_vasens); + i_adc.ch_i[1](s_vbsens); + i_adc.ch_i[2](s_vcsens); + i_adc.ch_i[3](s_ana[0]); + i_adc.ch_i[4](s_ana[1]); + i_adc.ch_i[5](s_ana[2]); + i_adc.ch_i[6](s_ana[3]); + i_adc.ch_i[7](s_ana[4]); + + i_h_bridge.ha_i(s_gpio[0]); + i_h_bridge.la_i(s_gpio[1]); + i_h_bridge.hb_i(s_gpio[10]); + i_h_bridge.lb_i(s_gpio[11]); + i_h_bridge.hc_i(s_gpio[19]); + i_h_bridge.lc_i(s_gpio[20]); + i_h_bridge.va_o(s_va); + i_h_bridge.vb_o(s_vb); + i_h_bridge.vc_o(s_vc); + + i_motor.va_i(s_va); + i_motor.vb_i(s_vb); + i_motor.vc_i(s_vc); + i_motor.va_o(s_vasens); + i_motor.vb_o(s_vbsens); + i_motor.vc_o(s_vcsens); SC_THREAD(gen_por); } diff --git a/riscv.sc/src/sysc/terminal.cpp b/platform/src/sysc/terminal.cpp similarity index 98% rename from riscv.sc/src/sysc/terminal.cpp rename to platform/src/sysc/terminal.cpp index 54c8c82..e8b9904 100644 --- a/riscv.sc/src/sysc/terminal.cpp +++ b/platform/src/sysc/terminal.cpp @@ -5,7 +5,8 @@ * Author: eyck */ -#include "sysc/General/terminal.h" +#include "sysc/top/terminal.h" + #include "sysc/sc_comm_singleton.h" #include "sysc/tlm_extensions.h" #include "scc/report.h" diff --git a/riscv.sc/src/sysc/uart.cpp b/platform/src/sysc/uart.cpp similarity index 100% rename from riscv.sc/src/sysc/uart.cpp rename to platform/src/sysc/uart.cpp diff --git a/riscv.sc/CMakeLists.txt b/riscv.sc/CMakeLists.txt index 1351b5a..ac1e05f 100644 --- a/riscv.sc/CMakeLists.txt +++ b/riscv.sc/CMakeLists.txt @@ -86,7 +86,26 @@ set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE) set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib") set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) -add_subdirectory(src) +# library files +FILE(GLOB RiscVSCHeaders *.h */*.h) + +set(LIB_HEADERS ${RiscVSCHeaders} ) +set(LIB_SOURCES src/core_complex.cpp ) + +# Define two variables in order not to repeat ourselves. +set(LIBRARY_NAME riscv.sc) + +## the following setting needs to be consistent with the library +#add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS) + +# Define the library +add_library(${LIBRARY_NAME} ${LIB_SOURCES}) + +set_target_properties(${LIBRARY_NAME} PROPERTIES + VERSION ${VERSION} # ${VERSION} was defined in the main CMakeLists. + FRAMEWORK FALSE + PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers +) # # SYSTEM PACKAGING (RPM, TGZ, ...) diff --git a/riscv.sc/incl/sysc/SiFive/core_complex.h b/riscv.sc/incl/sysc/core_complex.h similarity index 100% rename from riscv.sc/incl/sysc/SiFive/core_complex.h rename to riscv.sc/incl/sysc/core_complex.h diff --git a/riscv.sc/src/sysc/core_complex.cpp b/riscv.sc/src/core_complex.cpp similarity index 99% rename from riscv.sc/src/sysc/core_complex.cpp rename to riscv.sc/src/core_complex.cpp index 4364a8f..9e962a8 100644 --- a/riscv.sc/src/sysc/core_complex.cpp +++ b/riscv.sc/src/core_complex.cpp @@ -43,7 +43,7 @@ #include "iss/debugger/gdb_session.h" #include "iss/debugger/target_adapter_if.h" #include "iss/debugger/encoderdecoder.h" -#include "sysc/SiFive/core_complex.h" +#include "sysc/core_complex.h" #ifdef WITH_SCV #include diff --git a/riscv/src/CMakeLists.txt b/riscv/src/CMakeLists.txt index 229b067..3e3d055 100644 --- a/riscv/src/CMakeLists.txt +++ b/riscv/src/CMakeLists.txt @@ -15,7 +15,7 @@ set(APP_HEADERS ) set(APP_SOURCES main.cpp) # Define two variables in order not to repeat ourselves. -set(LIBRARY_NAME risc-v) +set(LIBRARY_NAME riscv) # Define the library #add_library(${LIBRARY_NAME} SHARED ${LIB_SOURCES}) @@ -28,7 +28,7 @@ set_target_properties(${LIBRARY_NAME} PROPERTIES ) # This is a make target, so you can do a "make riscv-sc" -set(APPLICATION_NAME riscv) +set(APPLICATION_NAME riscv-sim) add_executable(${APPLICATION_NAME} ${APP_SOURCES}) diff --git a/sc-components b/sc-components index 57853f5..0e5cf3f 160000 --- a/sc-components +++ b/sc-components @@ -1 +1 @@ -Subproject commit 57853f5df2ee573c35ef598a8a259696ae6059c0 +Subproject commit 0e5cf3fb3ac199a47f073f2bcee0abd4b3951896