Use spn_checker in fpga_spn firmware

feature/fpga-alloc-free
Johannes Wirth 2 years ago
parent f5e0d13891
commit 9578bcfa45
  1. BIN
      fpga_spn/raven_spn
  2. 49
      fpga_spn/src/raven_spn.cpp
  3. 97
      fpga_spn/src/spn_checker_regs.h

Binary file not shown.

@ -2,19 +2,11 @@
#include "spn_regs.h"
#include "dma_regs.h"
#include "init.h"
#include <math.h>
#include "spn_checker_regs.h"
using spn = spn_regs<0x90000000>;
using dma = dma_regs<0xB0000000>;
// huge arrays of XSPN input and referance data
extern std::array<uint8_t, 50000> input_data;
extern std::array<double, 10000> ref_data;
bool double_equals(double a, double b, double epsilon = 0.001)
{
return std::abs(a - b) < epsilon;
}
using spn_checker = spn_checker_regs<0x10040000>;
void run_xspn(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
spn::mode_reg() = 0;
@ -37,24 +29,6 @@ void fpga_dma(int direction, int fpga_address, int sc_address, int num_bytes) {
dma::clear_interrupt_reg() = 1;
}
void check_results(int addr, int k, int step) {
int k0 = 0;
bool result = 0;
double *res_base = (double*) (addr);
int * error_exit = (int *)0xF0000000;
printf("Start result comparison %d - %d\n", k, k+step);
for (int i = 0; i < step; i++) {
if (!double_equals(res_base[i], ref_data.at(k0 + i))) {
printf("XSPN ref %d comparison FAILED\n", k0 + i);
result = 1;
}
}
if (result == 1) *error_exit = 0x1;
printf("Compared samples %d - %d with the reference\n", k, k+step);
}
/*! \brief main function
*
*/
@ -95,23 +69,30 @@ int main() {
uint32_t out_beats = (step * result_bytes) / axi_bytes;
if (out_beats * axi_bytes < step * result_bytes) out_beats++;
int in_addr = (int)input_data.data();
int out_addr = 0x800B0000;
int in_addr = 0x20010000; // place input samples in the SPI memory
int out_addr = 0x20210000;
int fpga_address_in = 0x10000000;
int fpga_address_out = 0x20000000;
// inject SPN input data
spn_checker::input_addr_reg() = in_addr;
spn_checker::num_input_samples_reg() = sample_bytes * step * iterations;
spn_checker::start_data_trans_reg() = 1;
spn_checker::output_addr_reg() = out_addr;
//run_xspn(in_addr, out_addr);
for (int k = 0; k < iterations*step; k+=step) {
printf("XSPN processes samples %d - %d\n", k, k+step);
fpga_dma(1, fpga_address_in, in_addr, step * sample_bytes);
run_xspn(fpga_address_in, fpga_address_out, step, in_beats, out_beats);
wait_for_interrupt();
spn::interrupt_reg() = 1;
printf("XSPN finished\n");
spn::interrupt_reg() = 1;
fpga_dma(0, fpga_address_out, out_addr, step * result_bytes);
check_results(out_addr, k, step);
spn_checker::offset_reg() = k;
spn_checker::length_reg() = step;
spn_checker::start_result_check_reg() = 1;
//in_addr += step * sample_bytes; // 5 bytes in each sample
in_addr += step * sample_bytes; // 5 bytes in each sample
}
return 0;

@ -0,0 +1,97 @@
////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// 3. Neither the name of the copyright holder nor the names of its contributors
// may be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
//
// Created on: Thu Oct 01 15:45:55 CEST 2020
// * spn_regs.h Author: <RDL Generator>
//
////////////////////////////////////////////////////////////////////////////////
#pragma once
#include <util/bit_field.h>
#include <cstdint>
#define SPN_CNTL_REG_START_RESULT_CHECK 0x00
#define SPN_CNTL_REG_OFFSET 0x10
#define SPN_CNTL_REG_LENGTH 0x20
#define SPN_CNTL_REG_OUTPUT_ADDR 0x30
#define SPN_CNTL_REG_INPUT_ADDR 0x40
#define SPN_CNTL_REG_NUM_INPUT_SAMPLES 0x50
#define SPN_CNTL_REG_START_DATA_TRANS 0x60
template<uint32_t BASE_ADDR>
class spn_checker_regs {
public:
// storage declarations
// BEGIN_BF_DECL(start_t, uint32_t);
// BF_FIELD(start, 0, 1);
// END_BF_DECL() r_start;
uint32_t r_start_result_check;
uint32_t r_offset;
uint32_t r_length;
uint32_t r_output_addr;
uint32_t r_input_addr;
uint32_t r_num_input_samples;
uint32_t r_start_data_trans;
static inline uint32_t& start_result_check_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_START_RESULT_CHECK);
}
static inline uint32_t & offset_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OFFSET);
}
static inline uint32_t & length_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_LENGTH);
}
static inline uint32_t & output_addr_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_OUTPUT_ADDR);
}
static inline uint32_t & input_addr_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_INPUT_ADDR);
}
static inline uint32_t & num_input_samples_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_NUM_INPUT_SAMPLES);
}
static inline uint32_t& start_data_trans_reg(){
return *reinterpret_cast<uint32_t*>(BASE_ADDR+SPN_CNTL_REG_START_DATA_TRANS);
}
};
Loading…
Cancel
Save