Browse Source

Cleanup using clang-tidy & clang-format, updated license statements

pull/3/head
Eyck Jentzsch 1 year ago
parent
commit
4fdd3c9c66
51 changed files with 1328 additions and 1304 deletions
  1. 33
    22
      incl/scc/configurable_tracer.h
  2. 22
    22
      incl/scc/configurer.h
  3. 8
    8
      incl/scc/core/sc_logic_7.h
  4. 3
    3
      incl/scc/ext_attribute.h
  5. 3
    4
      incl/scc/initiator_mixin.h
  6. 1
    1
      incl/scc/memory.h
  7. 50
    42
      incl/scc/peq.h
  8. 28
    14
      incl/scc/perf_estimator.h
  9. 16
    13
      incl/scc/register.h
  10. 37
    25
      incl/scc/report.h
  11. 2
    2
      incl/scc/resetable.h
  12. 6
    4
      incl/scc/resource_access_if.h
  13. 19
    18
      incl/scc/router.h
  14. 14
    5
      incl/scc/scv_tr_db.h
  15. 24
    26
      incl/scc/signal_initiator_mixin.h
  16. 15
    18
      incl/scc/signal_target_mixin.h
  17. 12
    9
      incl/scc/tagged_initiator_mixin.h
  18. 18
    14
      incl/scc/tagged_target_mixin.h
  19. 3
    4
      incl/scc/target_mixin.h
  20. 27
    16
      incl/scc/time2tick.h
  21. 7
    7
      incl/scc/tlm_target.h
  22. 1
    1
      incl/scc/traceable.h
  23. 2
    2
      incl/scc/tracer.h
  24. 27
    29
      incl/scc/utilities.h
  25. 32
    34
      incl/scv4tlm/tlm2_recorder.h
  26. 2
    2
      incl/scv4tlm/tlm2_recorder_module.h
  27. 13
    14
      incl/scv4tlm/tlm_gp_data.h
  28. 1
    1
      incl/scv4tlm/tlm_gp_data_ext.h
  29. 1
    1
      incl/scv4tlm/tlm_rec_initiator_socket.h
  30. 1
    1
      incl/scv4tlm/tlm_rec_target_socket.h
  31. 3
    3
      incl/scv4tlm/tlm_recording_extension.h
  32. 37
    38
      incl/tlm/tlm_extensions.h
  33. 50
    47
      incl/tlm/tlm_signal.h
  34. 34
    33
      incl/tlm/tlm_signal_conv.h
  35. 130
    163
      incl/tlm/tlm_signal_gp.h
  36. 61
    88
      incl/tlm/tlm_signal_sockets.h
  37. 15
    3
      incl/util/delegate.h
  38. 15
    18
      incl/util/ities.h
  39. 16
    19
      incl/util/logging.h
  40. 5
    4
      incl/util/range_lut.h
  41. 62
    41
      src/configurable_tracer.cpp
  42. 121
    124
      src/configurer.cpp
  43. 44
    43
      src/perf_estimator.cpp
  44. 37
    30
      src/report.cpp
  45. 61
    57
      src/sc_logic_7.cpp
  46. 120
    146
      src/scv_tr_binary/scv_tr_binary.cpp
  47. 17
    17
      src/scv_tr_compressed.cpp
  48. 42
    47
      src/scv_tr_sqlite/scv_tr_sqlite.cpp
  49. 9
    10
      src/tracer.cpp
  50. 2
    2
      src/utilities.cpp
  51. 19
    9
      src/verilator_callbacks.cpp

+ 33
- 22
incl/scc/configurable_tracer.h View File

@@ -1,24 +1,35 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright (C) 2018, MINRES Technologies GmbH
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* http://www.apache.org/licenses/LICENSE-2.0
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/*
* tracer.h
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Created on: Nov 9, 2016
* Author: developer
*/
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* Contributors:
* eyck@minres.com - initial API and implementation
******************************************************************************/

#ifndef _SCC_CONFIGURABLE_TRACER_H_
#define _SCC_CONFIGURABLE_TRACER_H_
@@ -40,17 +51,17 @@ public:

~configurable_tracer();

void add_control(){
for(auto* o:sc_core::sc_get_top_level_objects(sc_core::sc_curr_simcontext))
augment_object_hierarchical(o);
void add_control() {
for (auto *o : sc_core::sc_get_top_level_objects(sc_core::sc_curr_simcontext)) augment_object_hierarchical(o);
}

protected:
void descend(const sc_core::sc_object *) override;
bool get_trace_enabled(const sc_core::sc_object*, bool =false );
void augment_object_hierarchical(const sc_core::sc_object*);
bool get_trace_enabled(const sc_core::sc_object *, bool = false);
void augment_object_hierarchical(const sc_core::sc_object *);
cci::cci_originator cci_originator;
cci::cci_broker_handle cci_broker;
std::vector<cci::cci_param_untyped*> params;
std::vector<cci::cci_param_untyped *> params;
};

} /* namespace scc */

+ 22
- 22
incl/scc/configurer.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2017 MINRES Technologies GmbH
* Copyright 2017, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -38,13 +38,13 @@ public:

configurer() = delete;

configurer(const configurer&) = delete;
configurer(const configurer &) = delete;

configurer(configurer&&) = delete;
configurer(configurer &&) = delete;

configurer& operator=(const configurer&) = delete;
configurer &operator=(const configurer &) = delete;

configurer& operator=(configurer&&) = delete;
configurer &operator=(configurer &&) = delete;

void configure();

@@ -53,22 +53,22 @@ public:
void dump_configuration(std::ostream &os = std::cout, sc_core::sc_object *obj = nullptr);

template <typename T> void set_value(const std::string &hier_name, T value) {
cci::cci_param_handle param_handle = cci_broker.get_param_handle(hier_name);
if(param_handle.is_valid()) {
param_handle.set_cci_value(cci::cci_value(value));
} else {
size_t pos = hier_name.find_last_of('.');
sc_core::sc_module *mod =
dynamic_cast<sc_core::sc_module *>(sc_core::sc_find_object(hier_name.substr(0, pos).c_str()));
if (mod != nullptr) {
sc_core::sc_attribute<T> *attr =
dynamic_cast<sc_core::sc_attribute<T> *>(mod->get_attribute(hier_name.substr(pos + 1)));
if (attr != nullptr)
attr->value = value;
else
LOG(ERROR) << "Could not set attribute value " << hier_name;
}
}
cci::cci_param_handle param_handle = cci_broker.get_param_handle(hier_name);
if (param_handle.is_valid()) {
param_handle.set_cci_value(cci::cci_value(value));
} else {
size_t pos = hier_name.find_last_of('.');
sc_core::sc_module *mod =
dynamic_cast<sc_core::sc_module *>(sc_core::sc_find_object(hier_name.substr(0, pos).c_str()));
if (mod != nullptr) {
sc_core::sc_attribute<T> *attr =
dynamic_cast<sc_core::sc_attribute<T> *>(mod->get_attribute(hier_name.substr(pos + 1)));
if (attr != nullptr)
attr->value = value;
else
LOG(ERROR) << "Could not set attribute value " << hier_name;
}
}
}

void set_configuration_value(sc_core::sc_attr_base *attr_base, sc_core::sc_object *owner);
@@ -80,7 +80,7 @@ public:
}

protected:
void dump_configuration(std::ostream& os, sc_core::sc_object* obj, Json::Value& node);
void dump_configuration(std::ostream &os, sc_core::sc_object *obj, Json::Value &node);

void configure_sc_attribute_hierarchical(sc_core::sc_object *obj, Json::Value &hier_val);


+ 8
- 8
incl/scc/core/sc_logic_7.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -22,8 +22,8 @@

#ifndef INCL_SYSC_CORE_SC_LOGIC_7_H_
#define INCL_SYSC_CORE_SC_LOGIC_7_H_
#include <cstdio>
#include <array>
#include <cstdio>

#include "sysc/datatypes/bit/sc_bit.h"
#include "sysc/kernel/sc_macros.h"
@@ -93,12 +93,12 @@ private:
public:
// conversion tables

static std::array<const sc_logic_7_value_t, 128> char_to_logic;
static std::array<const char, 7> logic_to_char;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> and_table;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> or_table;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> xor_table;
static std::array<const sc_logic_7_value_t, 7> not_table;
static std::array<const sc_logic_7_value_t, 128> char_to_logic;
static std::array<const char, 7> logic_to_char;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> and_table;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> or_table;
static std::array<std::array<const sc_logic_7_value_t, 7>, 7> xor_table;
static std::array<const sc_logic_7_value_t, 7> not_table;

// constructors


+ 3
- 3
incl/scc/ext_attribute.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2017 MINRES Technologies GmbH
* Copyright 2017, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -20,8 +20,8 @@
* Author: eyck
*/

#ifndef _SYSC_EXT_ATTRIBUTE_H_
#define _SYSC_EXT_ATTRIBUTE_H_
#ifndef _SCC_EXT_ATTRIBUTE_H_
#define _SCC_EXT_ATTRIBUTE_H_

#include "configurer.h"
#include "utilities.h"

+ 3
- 4
incl/scc/initiator_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -17,15 +17,14 @@
#ifndef _SYSC_INITIATOR_MIXIN_H__
#define _SYSC_INITIATOR_MIXIN_H__

#include "utilities.h"
#include <functional>
#include <sstream>
#include "utilities.h"
#include <tlm>

namespace scc {

template <typename BASE_TYPE, typename TYPES = tlm::tlm_base_protocol_types>
class initiator_mixin : public BASE_TYPE {
template <typename BASE_TYPE, typename TYPES = tlm::tlm_base_protocol_types> class initiator_mixin : public BASE_TYPE {
public:
using transaction_type = typename TYPES::tlm_payload_type;
using phase_type = typename TYPES::tlm_phase_type;

+ 1
- 1
incl/scc/memory.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

+ 50
- 42
incl/scc/peq.h View File

@@ -1,70 +1,78 @@
/*
* peq.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 13.07.2018
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef _SCC_PEQ_H_
#define _SCC_PEQ_H_

#include <systemc>
#include <boost/optional.hpp>
#include <map>
#include <systemc>
#include <type_traits>

namespace scc {
/**
* a simple priority event queue with a copy of the original value
*/
template <class TYPE>
struct peq : public sc_core::sc_object {
template <class TYPE> struct peq : public sc_core::sc_object {

static_assert(std::is_copy_constructible<TYPE>::value, "TYPE needs to be copy-constructible");
static_assert(std::is_copy_constructible<TYPE>::value, "TYPE needs to be copy-constructible");

using pair_type = std::pair<const sc_core::sc_time, TYPE>;
using pair_type = std::pair<const sc_core::sc_time, TYPE>;

peq() : sc_core::sc_object(sc_core::sc_gen_unique_name("peq")){ }
peq()
: sc_core::sc_object(sc_core::sc_gen_unique_name("peq")) {}

explicit
peq(const char* name) : sc_core::sc_object(name){ }
explicit peq(const char *name)
: sc_core::sc_object(name) {}

void notify(const TYPE& trans, const sc_core::sc_time& t){
m_scheduled_events.insert(pair_type(t + sc_core::sc_time_stamp(), trans));
m_event.notify(t);
}
void notify(const TYPE &trans, const sc_core::sc_time &t) {
m_scheduled_events.insert(pair_type(t + sc_core::sc_time_stamp(), trans));
m_event.notify(t);
}

void notify(const TYPE& trans) {
m_scheduled_events.insert(pair_type(sc_core::sc_time_stamp(), trans));
m_event.notify(); // immediate notification
}
void notify(const TYPE &trans) {
m_scheduled_events.insert(pair_type(sc_core::sc_time_stamp(), trans));
m_event.notify(); // immediate notification
}

boost::optional<TYPE> get_next() {
if (m_scheduled_events.empty())
return boost::none;;
sc_core::sc_time now = sc_core::sc_time_stamp();
if (m_scheduled_events.begin()->first <= now) {
auto trans = m_scheduled_events.begin()->second;
m_scheduled_events.erase(m_scheduled_events.begin());
return trans;
boost::optional<TYPE> get_next() {
if (m_scheduled_events.empty()) return boost::none;
;
sc_core::sc_time now = sc_core::sc_time_stamp();
if (m_scheduled_events.begin()->first <= now) {
auto trans = m_scheduled_events.begin()->second;
m_scheduled_events.erase(m_scheduled_events.begin());
return trans;
}
m_event.notify(m_scheduled_events.begin()->first - now);
return boost::none;
;
}
m_event.notify(m_scheduled_events.begin()->first - now);
return boost::none;;
}

sc_core::sc_event& event(){
return m_event;
}
sc_core::sc_event &event() { return m_event; }

// Cancel all events from the event queue
void cancel_all() {
m_scheduled_events.clear();
m_event.cancel();
}
// Cancel all events from the event queue
void cancel_all() {
m_scheduled_events.clear();
m_event.cancel();
}

private:
std::map<const sc_core::sc_time, TYPE> m_scheduled_events;
sc_core::sc_event m_event;
std::map<const sc_core::sc_time, TYPE> m_scheduled_events;
sc_core::sc_event m_event;
};
}


+ 28
- 14
incl/scc/perf_estimator.h View File

@@ -1,9 +1,18 @@
/*
* performancetracer.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 08.08.2018
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef _SCC_PERFORMANCETRACER_H_
#define _SCC_PERFORMANCETRACER_H_
@@ -13,27 +22,32 @@

namespace scc {

class perf_estimator: public sc_core::sc_module {
class perf_estimator : public sc_core::sc_module {
struct time_stamp {
boost::posix_time::ptime wall_clock_stamp;
double proc_clock_stamp;
time_stamp(): wall_clock_stamp(boost::posix_time::microsec_clock::universal_time()), proc_clock_stamp(get_cpu_time()){}
time_stamp& operator=(const time_stamp& o){
wall_clock_stamp=o.wall_clock_stamp;
proc_clock_stamp=o.proc_clock_stamp;
time_stamp()
: wall_clock_stamp(boost::posix_time::microsec_clock::universal_time())
, proc_clock_stamp(get_cpu_time()) {}
time_stamp &operator=(const time_stamp &o) {
wall_clock_stamp = o.wall_clock_stamp;
proc_clock_stamp = o.proc_clock_stamp;
return *this;
}
void set(){
wall_clock_stamp=boost::posix_time::microsec_clock::universal_time();
proc_clock_stamp=get_cpu_time();
void set() {
wall_clock_stamp = boost::posix_time::microsec_clock::universal_time();
proc_clock_stamp = get_cpu_time();
}

private:
static double get_cpu_time();
};

public:
SC_HAS_PROCESS(perf_estimator);
SC_HAS_PROCESS(perf_estimator);// NOLINT
perf_estimator();
virtual ~perf_estimator();

protected:
void start_of_simulation() override;
void end_of_simulation() override;

+ 16
- 13
incl/scc/register.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -25,13 +25,13 @@

#include <memory>

#include <functional>
#include <limits>
#include <sstream>
#include "resetable.h"
#include "resource_access_if.h"
#include "utilities.h"
#include "util/delegate.h"
#include "utilities.h"
#include <functional>
#include <limits>
#include <sstream>

namespace scc {

@@ -81,6 +81,9 @@ public:
, storage(storage) {
owner.register_resource(this);
}

~sc_register() = default;

/**
*
* @return
@@ -200,7 +203,7 @@ public:
* @param read_cb
*/
void set_read_cb(std::function<bool(const this_type &, DATATYPE &)> read_cb) {
rd_cb = [read_cb](const this_type &reg, DATATYPE& data, sc_core::sc_time delay){return read_cb(reg, data);};
rd_cb = [read_cb](const this_type &reg, DATATYPE &data, sc_core::sc_time delay) { return read_cb(reg, data); };
}
/**
*
@@ -212,7 +215,7 @@ public:
* @param write_cb
*/
void set_write_cb(std::function<bool(this_type &, DATATYPE &)> write_cb) {
wr_cb = [write_cb](this_type &reg, DATATYPE& data, sc_core::sc_time delay){return write_cb(reg, data);};
wr_cb = [write_cb](this_type &reg, DATATYPE &data, sc_core::sc_time delay) { return write_cb(reg, data); };
}
/**
*
@@ -250,9 +253,10 @@ public:
using pointer = value_type *;

sc_register_indexed(sc_core::sc_module_name nm, std::array<DATATYPE, SIZE> &storage, const DATATYPE reset_val,
resetable &owner, BASE_DATA_TYPE rdmask = std::numeric_limits<BASE_DATA_TYPE>::is_signed
? -1
: std::numeric_limits<BASE_DATA_TYPE>::max(),
resetable &owner,
BASE_DATA_TYPE rdmask = std::numeric_limits<BASE_DATA_TYPE>::is_signed
? -1
: std::numeric_limits<BASE_DATA_TYPE>::max(),
BASE_DATA_TYPE wrmask = std::numeric_limits<BASE_DATA_TYPE>::is_signed
? -1
: std::numeric_limits<BASE_DATA_TYPE>::max()) {
@@ -266,9 +270,8 @@ public:
}

~sc_register_indexed() override {
for (size_t idx = START; idx < (START + SIZE); ++idx) {
(_reg_field + idx)->~sc_register<DATATYPE>();
}
// for (size_t idx = START; idx < (START + SIZE); ++idx)
// (_reg_field + idx)->~sc_register<DATATYPE>();
free(_reg_field);
}


+ 37
- 25
incl/scc/report.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,12 +23,12 @@
#ifndef _SYSC_REPORT_H_
#define _SYSC_REPORT_H_

#include <sysc/utils/sc_report.h>
#include "utilities.h"
#include <util/logging.h>
#include <sysc/kernel/sc_time.h>
#include <iomanip>
#include <sstream>
#include <sysc/kernel/sc_time.h>
#include <sysc/utils/sc_report.h>
#include <util/logging.h>

namespace logging {
class SystemC {};
@@ -38,11 +38,14 @@ namespace scc {
/**
* initializes the SystemC logging system to use logging::Logger with a particular logging level
*/
void init_logging(logging::log_level level=logging::WARNING);
void init_logging(logging::log_level level = logging::WARNING);

template<sc_core::sc_severity SEVERITY>
struct ScLogger {
ScLogger(const char* file, int line, sc_core::sc_verbosity level=sc_core::SC_MEDIUM):t(nullptr), file(file), line(line), level(level){};
template <sc_core::sc_severity SEVERITY> struct ScLogger {
ScLogger(const char *file, int line, sc_core::sc_verbosity level = sc_core::SC_MEDIUM)
: t(nullptr)
, file(file)
, line(line)
, level(level){};

ScLogger() = delete;

@@ -51,34 +54,43 @@ struct ScLogger {
ScLogger &operator=(const ScLogger &) = delete;

virtual ~ScLogger() {
::sc_core::sc_report_handler::report(SEVERITY, t?t:"SystemC", os.str().c_str(), level, file , line );
::sc_core::sc_report_handler::report(SEVERITY, t ? t : "SystemC", os.str().c_str(), level, file, line);
}

inline
ScLogger& type(){return *this;}
inline ScLogger &type() { return *this; }

inline
ScLogger& type(const char* t){this->t=const_cast<char*>(t); return *this;}
inline ScLogger &type(const char *t) {
this->t = const_cast<char *>(t);
return *this;
}

inline
std::ostringstream& get() {return os;};
inline std::ostringstream &get() { return os; };

protected:
std::ostringstream os;
char* t;
const char* file;
char *t;
const char *file;
const int line;
const sc_core::sc_verbosity level;
};

#define SCDBGTRC(...) if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_DEBUG) ::scc::ScLogger<::sc_core::SC_INFO>(__FILE__,__LINE__, sc_core::SC_DEBUG).type(__VA_ARGS__).get()
#define SCTRACE(...) if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_FULL) ::scc::ScLogger<::sc_core::SC_INFO>(__FILE__,__LINE__, sc_core::SC_FULL).type(__VA_ARGS__).get()
#define SCDEBUG(...) if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_HIGH) ::scc::ScLogger<::sc_core::SC_INFO>(__FILE__,__LINE__, sc_core::SC_HIGH).type(__VA_ARGS__).get()
#define SCINFO(...) if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_MEDIUM) ::scc::ScLogger<::sc_core::SC_INFO>(__FILE__,__LINE__, sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCWARN(...) ::scc::ScLogger<::sc_core::SC_WARNING>(__FILE__,__LINE__,sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCERR(...) ::scc::ScLogger<::sc_core::SC_ERROR>(__FILE__,__LINE__,sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCFATAL(...) ::scc::ScLogger<::sc_core::SC_FATAL>(__FILE__,__LINE__,sc_core::SC_MEDIUM).type(__VA_ARGS__).get()

#define SCDBGTRC(...) \
if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_DEBUG) \
::scc::ScLogger<::sc_core::SC_INFO>(__FILE__, __LINE__, sc_core::SC_DEBUG).type(__VA_ARGS__).get()
#define SCTRACE(...) \
if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_FULL) \
::scc::ScLogger<::sc_core::SC_INFO>(__FILE__, __LINE__, sc_core::SC_FULL).type(__VA_ARGS__).get()
#define SCDEBUG(...) \
if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_HIGH) \
::scc::ScLogger<::sc_core::SC_INFO>(__FILE__, __LINE__, sc_core::SC_HIGH).type(__VA_ARGS__).get()
#define SCINFO(...) \
if (::sc_core::sc_report_handler::get_verbosity_level() >= sc_core::SC_MEDIUM) \
::scc::ScLogger<::sc_core::SC_INFO>(__FILE__, __LINE__, sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCWARN(...) \
::scc::ScLogger<::sc_core::SC_WARNING>(__FILE__, __LINE__, sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCERR(...) ::scc::ScLogger<::sc_core::SC_ERROR>(__FILE__, __LINE__, sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
#define SCFATAL(...) \
::scc::ScLogger<::sc_core::SC_FATAL>(__FILE__, __LINE__, sc_core::SC_MEDIUM).type(__VA_ARGS__).get()
}

#endif /* _SYSC_REPORT_H_ */

+ 2
- 2
incl/scc/resetable.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,8 +23,8 @@
#ifndef _SYSC_RESETTABLE_H_
#define _SYSC_RESETTABLE_H_

#include <vector>
#include "resource_access_if.h"
#include <vector>

namespace scc {


+ 6
- 4
incl/scc/resource_access_if.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,9 +23,9 @@
#ifndef _SYSC_RESOURCE_ACCESS_IF_H_
#define _SYSC_RESOURCE_ACCESS_IF_H_

#include <sysc/kernel/sc_time.h>
#include <cstddef>
#include <cstdint>
#include <sysc/kernel/sc_time.h>

namespace scc {

@@ -52,7 +52,8 @@ public:
* @param offset
* @return
*/
virtual bool write(const uint8_t *data, std::size_t length, uint64_t offset = 0, sc_core::sc_time d=sc_core::SC_ZERO_TIME) = 0;
virtual bool write(const uint8_t *data, std::size_t length, uint64_t offset = 0,
sc_core::sc_time d = sc_core::SC_ZERO_TIME) = 0;
/**
*
* @param data
@@ -60,7 +61,8 @@ public:
* @param offset
* @return
*/
virtual bool read(uint8_t *data, std::size_t length, uint64_t offset = 0, sc_core::sc_time d=sc_core::SC_ZERO_TIME) const = 0;
virtual bool read(uint8_t *data, std::size_t length, uint64_t offset = 0,
sc_core::sc_time d = sc_core::SC_ZERO_TIME) const = 0;
// non-functional/debug accesses
/**
*

+ 19
- 18
incl/scc/router.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,15 +23,15 @@
#ifndef _SYSC_ROUTER_H_
#define _SYSC_ROUTER_H_

#include "util/range_lut.h"
#include "utilities.h"
#include "initiator_mixin.h"
#include "scv4tlm/tlm_rec_initiator_socket.h"
#include "scv4tlm/tlm_rec_target_socket.h"
#include "initiator_mixin.h"
#include "target_mixin.h"
#include "util/range_lut.h"
#include "utilities.h"
#include <limits>
#include <sysc/utils/sc_vector.h>
#include <tlm.h>
#include <limits>
#include <unordered_map>

namespace scc {
@@ -76,7 +76,7 @@ public:
* @param idx
* @param name
*/
void set_target_name(size_t idx, std::string name){ target_name_lut.insert(std::make_pair(name, idx));}
void set_target_name(size_t idx, std::string name) { target_name_lut.insert(std::make_pair(name, idx)); }
/**
*
* @param idx
@@ -93,13 +93,13 @@ public:
* @param remap
*/
void add_target_range(size_t idx, uint64_t base, uint64_t size, bool remap = true);
/**
* tagged blocking transport method
*
* @param i
* @param trans
* @param delay
*/
/**
* tagged blocking transport method
*
* @param i
* @param trans
* @param delay
*/
void b_transport(int i, tlm::tlm_generic_payload &trans, sc_core::sc_time &delay);
/**
* tagged forward DMI method
@@ -182,13 +182,14 @@ template <unsigned BUSWIDTH>
void router<BUSWIDTH>::add_target_range(std::string name, uint64_t base, uint64_t size, bool remap) {
auto it = target_name_lut.find(name);
#ifndef NDEBUG
//sc_assert(it!=target_name_lut.end());
if(it==target_name_lut.end()){
std::stringstream ss; ss<<"No target index entry for '"<<name<<"' found ";
::sc_core::sc_assertion_failed(ss.str().c_str(),__FILE__,__LINE__);
// sc_assert(it!=target_name_lut.end());
if (it == target_name_lut.end()) {
std::stringstream ss;
ss << "No target index entry for '" << name << "' found ";
::sc_core::sc_assertion_failed(ss.str().c_str(), __FILE__, __LINE__);
}
#endif
auto idx=it->second;
auto idx = it->second;
tranges[idx].base = base;
tranges[idx].size = size;
tranges[idx].remap = remap;

+ 14
- 5
incl/scc/scv_tr_db.h View File

@@ -1,9 +1,18 @@
/*
* scv_tr_db.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 16.12.2016
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef _SCC_SCV_TR_DB_H_
#define _SCC_SCV_TR_DB_H_

+ 24
- 26
incl/scc/signal_initiator_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -18,14 +18,13 @@
#define __SIGNAL_INITIATOR_MIXIN_H__

#include "utilities.h"
#include <tlm/tlm_signal.h>
#include <functional>
#include <sstream>
#include <tlm/tlm_signal.h>

namespace scc {

template <typename BASE_TYPE>
class signal_initiator_mixin : public BASE_TYPE {
template <typename BASE_TYPE> class signal_initiator_mixin : public BASE_TYPE {
public:
using tlm_signal_type = typename BASE_TYPE::tlm_signal_type;
using transaction_type = typename BASE_TYPE::transaction_type;
@@ -36,20 +35,19 @@ public:

public:
signal_initiator_mixin()
: signal_initiator_mixin(sc_core::sc_gen_unique_name("signal_initiator_mixinn_socket")){}
: signal_initiator_mixin(sc_core::sc_gen_unique_name("signal_initiator_mixinn_socket")) {}

explicit signal_initiator_mixin(const char *n)
: BASE_TYPE(n)
, error_if_no_callback(false)
, bw_if(this)
{
, bw_if(this) {
bind(bw_if);
}

using BASE_TYPE::bind;

void write_now(tlm_signal_type value){
auto* gp = tlm::tlm_signal_gp<tlm_signal_type>::create();
void write_now(tlm_signal_type value) {
auto *gp = tlm::tlm_signal_gp<tlm_signal_type>::create();
gp->set_command(tlm::TLM_WRITE_COMMAND);
gp->set_value(value);
gp->acquire();
@@ -59,12 +57,11 @@ public:
gp->release();
}

template<typename EXT_TYPE>
void write_now(tlm_signal_type value, EXT_TYPE* ext){
auto* gp = tlm::tlm_signal_gp<tlm_signal_type>::create();
template <typename EXT_TYPE> void write_now(tlm_signal_type value, EXT_TYPE *ext) {
auto *gp = tlm::tlm_signal_gp<tlm_signal_type>::create();
gp->set_command(tlm::TLM_WRITE_COMMAND);
gp->set_value(value);
if(ext) gp->set_extension(ext);
if (ext) gp->set_extension(ext);
gp->acquire();
tlm::tlm_phase phase{tlm::BEGIN_REQ};
sc_core::sc_time delay{sc_core::SC_ZERO_TIME};
@@ -84,7 +81,9 @@ public:
*
* @param cb the callback function
*/
void register_nb_transport(std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb, unsigned int tag) {
void register_nb_transport(
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb,
unsigned int tag) {
bw_if.set_nb_transport_ptr(cb);
}

@@ -93,12 +92,12 @@ public:
private:
class bw_transport_if : public bw_interface_type {
public:
using transport_fct = std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_tagged_fct = std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_fct = std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_tagged_fct =
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;

bw_transport_if(const signal_initiator_mixin* owner)
: m_owner(owner)
{}
bw_transport_if(const signal_initiator_mixin *owner)
: m_owner(owner) {}

void set_nb_transport_ptr(transport_fct p) {
if (m_transport_ptr || m_transport_tagged_ptr) {
@@ -117,7 +116,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/signal_initiator_mixin", s.str().c_str());
} else {
m_transport_tagged_ptr = p;
this->tag=tag;
this->tag = tag;
}
}

@@ -126,7 +125,7 @@ private:
return m_transport_ptr(trans, phase, t);
else if (m_transport_tagged_ptr)
return m_transport_tagged_ptr(tag, trans, phase, t);
else if(m_owner->error_if_no_callback){
else if (m_owner->error_if_no_callback) {
std::stringstream s;
s << m_owner->name() << ": no transport callback registered";
SC_REPORT_ERROR("/OSCI_TLM-2/signal_initiator_mixin", s.str().c_str());
@@ -135,10 +134,10 @@ private:
}

private:
const signal_initiator_mixin* m_owner;
unsigned int tag=0;
transport_fct m_transport_ptr=nullptr;
transport_tagged_fct m_transport_tagged_ptr=nullptr;
const signal_initiator_mixin *m_owner;
unsigned int tag = 0;
transport_fct m_transport_ptr = nullptr;
transport_tagged_fct m_transport_tagged_ptr = nullptr;
};

private:
@@ -153,6 +152,5 @@ using tlm_signal_bool_out = signal_initiator_mixin<tlm::tlm_signal_initiator_soc
using tlm_signal_logic_out = signal_initiator_mixin<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>>;
using tlm_signal_bool_opt_out = signal_initiator_mixin<tlm::tlm_signal_opt_initiator_socket<bool>>;
using tlm_signal_logic_opt_out = signal_initiator_mixin<tlm::tlm_signal_opt_initiator_socket<sc_dt::sc_logic>>;

}
#endif //__SIGNAL_INITIATOR_MIXIN_H__

+ 15
- 18
incl/scc/signal_target_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -17,14 +17,13 @@
#define __SIGNAL_TARGET_MIXIN_H__

#include "utilities.h"
#include <tlm/tlm_signal.h>
#include <functional>
#include <sstream>
#include <tlm/tlm_signal.h>

namespace scc {

template <typename BASE_TYPE>
class signal_target_mixin : public BASE_TYPE {
template <typename BASE_TYPE> class signal_target_mixin : public BASE_TYPE {
public:
using tlm_signal_type = typename BASE_TYPE::tlm_signal_type;
using transaction_type = typename BASE_TYPE::transaction_type;
@@ -46,8 +45,7 @@ public:
explicit signal_target_mixin(const char *n)
: BASE_TYPE(n)
, error_if_no_callback(true)
, fw_if(this)
{
, fw_if(this) {
bind(fw_if);
}

@@ -57,16 +55,16 @@ public:
*
* @param cb
*/
void
register_nb_transport(std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)> cb) {
void register_nb_transport(std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)> cb) {
fw_if.set_nb_transport_ptr(cb);
}
/**
*
* @param cb
*/
void
register_nb_transport(std::function<sync_enum_type(unsigned int,transaction_type &, phase_type &, sc_core::sc_time &)> cb, unsigned int tag) {
void register_nb_transport(
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb,
unsigned int tag) {
fw_if.set_nb_transport_ptr(cb, tag);
}

@@ -80,12 +78,12 @@ private:

class fw_process_if : public fw_interface_type {
public:
using transport_fct = std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_tagged_fct = std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_fct = std::function<sync_enum_type(transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_tagged_fct =
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;

fw_process_if(const signal_target_mixin *p_own)
: m_owner(p_own)
{}
: m_owner(p_own) {}

void set_nb_transport_ptr(transport_fct p) {
if (m_transport_ptr || m_transport_tagged_ptr) {
@@ -104,7 +102,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/signal_target_mixin", s.str().c_str());
} else {
m_transport_tagged_ptr = p;
this->tag=tag;
this->tag = tag;
}
}

@@ -116,7 +114,7 @@ private:
} else if (m_transport_tagged_ptr) {
// forward call
return m_transport_tagged_ptr(tag, trans, phase, t);
} else if(m_owner->error_if_no_callback){
} else if (m_owner->error_if_no_callback) {
std::stringstream s;
s << m_owner->name() << ": no transport callback registered";
SC_REPORT_ERROR("/OSCI_TLM-2/signal_target_mixin", s.str().c_str());
@@ -126,7 +124,7 @@ private:

private:
const signal_target_mixin *m_owner;
unsigned int tag=0;
unsigned int tag = 0;
transport_fct m_transport_ptr = nullptr;
transport_tagged_fct m_transport_tagged_ptr = nullptr;
};
@@ -142,7 +140,6 @@ using tlm_signal_bool_in = signal_target_mixin<tlm::tlm_signal_target_socket<boo
using tlm_signal_logic_in = signal_target_mixin<tlm::tlm_signal_target_socket<sc_dt::sc_logic>>;
using tlm_signal_bool_opt_in = signal_target_mixin<tlm::tlm_signal_opt_target_socket<bool>>;
using tlm_signal_logic_opt_in = signal_target_mixin<tlm::tlm_signal_opt_target_socket<sc_dt::sc_logic>>;

}

#endif //__SIGNAL_TARGET_MIXIN_H__

+ 12
- 9
incl/scc/tagged_initiator_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -17,9 +17,9 @@
#ifndef _SCC_TAGGED_INITIATOR_MIXIN_H__
#define _SCC_TAGGED_INITIATOR_MIXIN_H__

#include "utilities.h"
#include <functional>
#include <sstream>
#include "utilities.h"
#include <tlm>

namespace scc {
@@ -50,8 +50,9 @@ public:
* @param cb the callback function
* @param tag the tag to return upon calling
*/
void
register_nb_transport_bw(std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb, unsigned int tag) {
void register_nb_transport_bw(
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb,
unsigned int tag) {
bw_if.set_transport_function(cb, tag);
}
/**
@@ -59,14 +60,16 @@ public:
* @param cb the callback function
* @param tag the tag to return upon calling
*/
void register_invalidate_direct_mem_ptr(std::function<void(unsigned int, sc_dt::uint64, sc_dt::uint64)> cb, unsigned int tag) {
void register_invalidate_direct_mem_ptr(std::function<void(unsigned int, sc_dt::uint64, sc_dt::uint64)> cb,
unsigned int tag) {
bw_if.set_invalidate_direct_mem_function(cb, tag);
}

private:
class bw_transport_if : public tlm::tlm_bw_transport_if<TYPES> {
public:
using transport_fct = std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using transport_fct =
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using invalidate_dmi_fct = std::function<void(unsigned int, sc_dt::uint64, sc_dt::uint64)>;

bw_transport_if(const std::string &name)
@@ -81,7 +84,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_transport_ptr = p;
tags[0]=tag;
tags[0] = tag;
}
}

@@ -92,7 +95,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_invalidate_direct_mem_ptr = p;
tags[1]=tag;
tags[1] = tag;
}
}

@@ -111,7 +114,7 @@ private:

private:
const std::string m_name;
unsigned int tags[2];//dbg, dmi
unsigned int tags[2]; // dbg, dmi
transport_fct m_transport_ptr;
invalidate_dmi_fct m_invalidate_direct_mem_ptr;
};

+ 18
- 14
incl/scc/tagged_target_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -20,8 +20,8 @@
#define SC_INCLUDE_DYNAMIC_PROCESSES
#endif

#include <sstream>
#include "utilities.h"
#include <sstream>
#include <tlm>
#include <tlm_utils/peq_with_get.h>

@@ -71,8 +71,9 @@ public:
* @param cb
* @param tag the tag to return upon calling
*/
void
register_nb_transport_fw(std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb, unsigned int tag) {
void register_nb_transport_fw(
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)> cb,
unsigned int tag) {
assert(!sc_core::sc_get_curr_simcontext()->elaboration_done());
m_fw_process.set_nb_transport_ptr(cb, tag);
}
@@ -81,7 +82,8 @@ public:
* @param cb
* @param tag the tag to return upon calling
*/
void register_b_transport(std::function<void(unsigned int, transaction_type &, sc_core::sc_time &)> cb, unsigned int tag) {
void register_b_transport(std::function<void(unsigned int, transaction_type &, sc_core::sc_time &)> cb,
unsigned int tag) {
assert(!sc_core::sc_get_curr_simcontext()->elaboration_done());
m_fw_process.set_b_transport_ptr(cb, tag);
}
@@ -99,7 +101,8 @@ public:
* @param cb
* @param tag the tag to return upon calling
*/
void register_get_direct_mem_ptr(std::function<bool(unsigned int, transaction_type &, tlm::tlm_dmi &)> cb, unsigned int tag) {
void register_get_direct_mem_ptr(std::function<bool(unsigned int, transaction_type &, tlm::tlm_dmi &)> cb,
unsigned int tag) {
assert(!sc_core::sc_get_curr_simcontext()->elaboration_done());
m_fw_process.set_get_direct_mem_ptr(cb, tag);
}
@@ -162,7 +165,8 @@ private:

class fw_process : public tlm::tlm_fw_transport_if<TYPES>, public tlm::tlm_mm_interface {
public:
using NBTransportPtr = std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using NBTransportPtr =
std::function<sync_enum_type(unsigned int, transaction_type &, phase_type &, sc_core::sc_time &)>;
using BTransportPtr = std::function<void(unsigned int, transaction_type &, sc_core::sc_time &)>;
using TransportDbgPtr = std::function<unsigned int(unsigned int, transaction_type &)>;
using GetDirectMemPtr = std::function<bool(unsigned int, transaction_type &, tlm::tlm_dmi &)>;
@@ -189,7 +193,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_nb_transport_ptr = p;
tags[1]=tag;
tags[1] = tag;
}
}

@@ -200,8 +204,8 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_b_transport_ptr = p;
tags[0]=tag;
}
tags[0] = tag;
}
}

void set_transport_dbg_ptr(TransportDbgPtr p, unsigned int tag) {
@@ -211,8 +215,8 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_transport_dbg_ptr = p;
tags[2]=tag;
}
tags[2] = tag;
}
}

void set_get_direct_mem_ptr(GetDirectMemPtr p, unsigned int tag) {
@@ -222,7 +226,7 @@ private:
SC_REPORT_WARNING("/OSCI_TLM-2/simple_socket", s.str().c_str());
} else {
m_get_direct_mem_ptr = p;
tags[3]=tag;
tags[3] = tag;
}
}
// Interface implementation
@@ -488,7 +492,7 @@ private:
private:
const std::string m_name;
tagged_target_mixin *m_owner;
unsigned int tags[4];//bl, nb, dbg, dmi
unsigned int tags[4]; // bl, nb, dbg, dmi
NBTransportPtr m_nb_transport_ptr;
BTransportPtr m_b_transport_ptr;
TransportDbgPtr m_transport_dbg_ptr;

+ 3
- 4
incl/scc/target_mixin.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -20,15 +20,14 @@
#define SC_INCLUDE_DYNAMIC_PROCESSES
#endif

#include <sstream>
#include "utilities.h"
#include <sstream>
#include <tlm>
#include <tlm_utils/peq_with_get.h>

namespace scc {

template <typename base_type, typename TYPES = tlm::tlm_base_protocol_types>
class target_mixin : public base_type {
template <typename base_type, typename TYPES = tlm::tlm_base_protocol_types> class target_mixin : public base_type {
friend class fw_process;
friend class bw_process;


+ 27
- 16
incl/scc/time2tick.h View File

@@ -1,9 +1,18 @@
/*
* time2tick.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 03.10.2018
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef _SCC_TIME2TICK_H_
#define _SCC_TIME2TICK_H_
@@ -11,27 +20,29 @@
#include "utilities.h"

namespace scc {
struct time2tick: public sc_core::sc_module {
SC_HAS_PROCESS(time2tick);
struct time2tick : public sc_core::sc_module {
SC_HAS_PROCESS(time2tick);// NOLINT
sc_core::sc_in<sc_core::sc_time> clk_i;
sc_core::sc_out<bool> clk_o;

time2tick(sc_core::sc_module_name nm): sc_core::sc_module(nm){
time2tick(sc_core::sc_module_name nm)
: sc_core::sc_module(nm) {
SC_THREAD(clocker);
}

private:
sc_core::sc_time clk_period;
void clocker(){
while(true){
void clocker() {
while (true) {
auto t = clk_i.read();
if(t==sc_core::SC_ZERO_TIME){
if (t == sc_core::SC_ZERO_TIME) {
wait(clk_i.value_changed_event());
t=clk_i.read();
t = clk_i.read();
}
clk_o=true;
wait(t/2);
clk_o=false;
wait(t-t/2);
clk_o = true;
wait(t / 2);
clk_o = false;
wait(t - t / 2);
}
}
};

+ 7
- 7
incl/scc/tlm_target.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,11 +23,11 @@
#ifndef _SYSC_TLM_TARGET_H_
#define _SYSC_TLM_TARGET_H_

#include "utilities.h"
#include "scv4tlm/tlm_rec_target_socket.h"
#include "util/range_lut.h"
#include "resource_access_if.h"
#include "scv4tlm/tlm_rec_target_socket.h"
#include "target_mixin.h"
#include "util/range_lut.h"
#include "utilities.h"
#include <array>

namespace scc {
@@ -84,12 +84,13 @@ public:

private:
sc_core::sc_time &clk;

protected:
util::range_lut<std::pair<resource_access_if *, uint64_t>> socket_map;
};

template <unsigned BUSWIDTH = 32> struct target_memory_map_entry {
tlm::tlm_target_socket<BUSWIDTH>& target;
tlm::tlm_target_socket<BUSWIDTH> &target;
sc_dt::uint64 start;
sc_dt::uint64 size;
};
@@ -154,8 +155,7 @@ void scc::tlm_target<BUSWIDTH>::b_tranport_cb(tlm::tlm_generic_payload &gp, sc_c
delay += clk;
}

template <unsigned int BUSWIDTH>
unsigned int scc::tlm_target<BUSWIDTH>::tranport_dbg_cb(tlm::tlm_generic_payload &gp) {
template <unsigned int BUSWIDTH> unsigned int scc::tlm_target<BUSWIDTH>::tranport_dbg_cb(tlm::tlm_generic_payload &gp) {
resource_access_if *ra = nullptr;
uint64_t base = 0;
std::tie(ra, base) = socket_map.getEntry(gp.get_address());

+ 1
- 1
incl/scc/traceable.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

+ 2
- 2
incl/scc/tracer.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -57,7 +57,7 @@ public:

protected:
void end_of_elaboration() override;
virtual void descend(const sc_core::sc_object*);
virtual void descend(const sc_core::sc_object *);
virtual void try_trace_signal(const sc_core::sc_object *);
virtual void try_trace_port(const sc_core::sc_object *);
bool enabled;

+ 27
- 29
incl/scc/utilities.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -36,16 +36,15 @@

#if __cplusplus < 201402L
namespace std {
template<typename T, typename... Args>
std::unique_ptr<T> make_unique(Args&&... args){
template <typename T, typename... Args> std::unique_ptr<T> make_unique(Args &&... args) {
return std::unique_ptr<T>(new T(std::forward<Args>(args)...));
}
}
#endif

#define NAMED(X, ...) X(#X, ##__VA_ARGS__)
#define NAMEDD(X, T, ...) X(std::make_unique<T>(#X, ##__VA_ARGS__))
#define NAMEDC(X, T, I, ...) X(T::create<I>(#X, ##__VA_ARGS__))
#define NAMED(X, ...) X(#X, ##__VA_ARGS__)
#define NAMEDD(X, T, ...) X(std::make_unique<T>(#X, ##__VA_ARGS__))
#define NAMEDC(X, T, I, ...) X(T::create<I>(#X, ##__VA_ARGS__))

#define TRACE_VAR(F, X) sc_core::sc_trace(F, X, std::string(this->name()) + "." #X)
#define TRACE_ARR(F, X, I) \
@@ -54,7 +53,7 @@ std::unique_ptr<T> make_unique(Args&&... args){

namespace sc_core {
// needed to be able to use sc_time as signal value
#if SC_VERSION_MAJOR<=2 && SC_VERSION_MINOR<=3 && SC_VERSION_PATCH<2
#if SC_VERSION_MAJOR <= 2 && SC_VERSION_MINOR <= 3 && SC_VERSION_PATCH < 2
/**
*
* @param
@@ -172,11 +171,10 @@ inline constexpr uint64_t operator"" _GB(unsigned long long val) { return val *

namespace scc {

inline bool icompare(std::string const& a, std::string const& b){
if (a.length()==b.length()) {
return std::equal(b.begin(), b.end(), a.begin(), [](unsigned char a, unsigned char b) -> bool {
return std::tolower(a) == std::tolower(b);
});
inline bool icompare(std::string const &a, std::string const &b) {
if (a.length() == b.length()) {
return std::equal(b.begin(), b.end(), a.begin(),
[](unsigned char a, unsigned char b) -> bool { return std::tolower(a) == std::tolower(b); });
} else {
return false;
}
@@ -184,29 +182,29 @@ inline bool icompare(std::string const& a, std::string const& b){

inline sc_core::sc_time parse_from_string(std::string value, std::string unit) noexcept {
std::string::size_type offs{0};
double t_val=std::stod(value, &offs);
if(offs>0){
if(icompare(unit, "fs")) return t_val * 1_fs;
if(icompare(unit, "ps")) return t_val * 1_ps;
if(icompare(unit, "ns")) return t_val * 1_ns;
if(icompare(unit, "us")) return t_val * 1_us;
if(icompare(unit, "ms")) return t_val * 1_ms;
if(icompare(unit, "s")) return t_val * 1_sec;
double t_val = std::stod(value, &offs);
if (offs > 0) {
if (icompare(unit, "fs")) return t_val * 1_fs;
if (icompare(unit, "ps")) return t_val * 1_ps;
if (icompare(unit, "ns")) return t_val * 1_ns;
if (icompare(unit, "us")) return t_val * 1_us;
if (icompare(unit, "ms")) return t_val * 1_ms;
if (icompare(unit, "s")) return t_val * 1_sec;
}
return sc_core::SC_ZERO_TIME;
}

inline sc_core::sc_time parse_from_string(std::string value) noexcept {
std::string::size_type offs{0};
double t_val=std::stod(value, &offs);
if(offs>0){
std::string unit=value.substr(offs);
if(icompare(unit, "fs")) return t_val * 1_fs;
if(icompare(unit, "ps")) return t_val * 1_ps;
if(icompare(unit, "ns")) return t_val * 1_ns;
if(icompare(unit, "us")) return t_val * 1_us;
if(icompare(unit, "ms")) return t_val * 1_ms;
if(icompare(unit, "s")) return t_val * 1_sec;
double t_val = std::stod(value, &offs);
if (offs > 0) {
std::string unit = value.substr(offs);
if (icompare(unit, "fs")) return t_val * 1_fs;
if (icompare(unit, "ps")) return t_val * 1_ps;
if (icompare(unit, "ns")) return t_val * 1_ns;
if (icompare(unit, "us")) return t_val * 1_us;
if (icompare(unit, "ms")) return t_val * 1_ms;
if (icompare(unit, "s")) return t_val * 1_sec;
}
return sc_core::SC_ZERO_TIME;
}

+ 32
- 34
incl/scv4tlm/tlm2_recorder.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -19,6 +19,7 @@

#include "tlm_gp_data_ext.h"
#include "tlm_recording_extension.h"
#include <array>
#include <map>
#include <regex>
#include <scv.h>
@@ -26,7 +27,6 @@
#include <tlm>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include <vector>
#include <array>

namespace scv4tlm {

@@ -65,8 +65,9 @@ class tlm2_recorder : public virtual tlm::tlm_fw_transport_if<TYPES>,
public virtual tlm::tlm_bw_transport_if<TYPES>,
public sc_core::sc_object {
const std::regex pat{"_rec$"};

public:
SC_HAS_PROCESS(tlm2_recorder<TYPES>);
SC_HAS_PROCESS(tlm2_recorder<TYPES>);// NOLINT

//! \brief the attribute to selectively enable/disable recording
sc_core::sc_attribute<bool> enableTracing;
@@ -89,8 +90,7 @@ public:
* scv_tr_db::set_default_db() ) recording is disabled.
*/
tlm2_recorder(bool recording_enabled = true, scv_tr_db *tr_db = scv_tr_db::get_default_db())
: tlm2_recorder(sc_core::sc_gen_unique_name("tlm2_recorder"), recording_enabled, tr_db)
{ }
: tlm2_recorder(sc_core::sc_gen_unique_name("tlm2_recorder"), recording_enabled, tr_db) {}
/*! \brief The constructor of the component
*
* \param name is the SystemC module name of the recorder
@@ -122,9 +122,9 @@ public:
, dmi_trGetHandle(NULL)
, dmi_trInvalidateHandle(NULL)
, extensionRecording(NULL)
, fixed_basename(regex_replace(sc_core::sc_object::name(), pat, "")){
this->add_attribute(enableTracing);
this->add_attribute(enableTimed);
, fixed_basename(regex_replace(sc_core::sc_object::name(), pat, "")) {
this->add_attribute(enableTracing);
this->add_attribute(enableTimed);
}

virtual ~tlm2_recorder() override {
@@ -299,7 +299,7 @@ private:
//! blocking transaction recording stream handle
scv_tr_stream *b_streamHandle;
//! transaction generator handle for blocking transactions
std::array<scv_tr_generator<sc_dt::uint64,sc_dt::uint64> *,3> b_trHandle;
std::array<scv_tr_generator<sc_dt::uint64, sc_dt::uint64> *, 3> b_trHandle;
//! timed blocking transaction recording stream handle
scv_tr_stream *b_streamHandleTimed;
//! transaction generator handle for blocking transactions with annotated
@@ -388,8 +388,8 @@ void tlm2_recorder<TYPES>::b_transport(typename TYPES::tlm_payload_type &trans,
}
scv_tr_handle preTx{preExt->txHandle};
preExt->txHandle = h;
if(trans.get_command()==tlm::TLM_WRITE_COMMAND && tgd.data_length<8)
h.record_attribute("trans.data_value", tgd.get_data_value());
if (trans.get_command() == tlm::TLM_WRITE_COMMAND && tgd.data_length < 8)
h.record_attribute("trans.data_value", tgd.get_data_value());
fw_port->b_transport(trans, delay);
trans.get_extension(preExt);
if (preExt->get_creator() == this) {
@@ -400,10 +400,10 @@ void tlm2_recorder<TYPES>::b_transport(typename TYPES::tlm_payload_type &trans,
preExt->txHandle = preTx;
}

tgd.response_status=trans.get_response_status();
tgd.response_status = trans.get_response_status();
h.record_attribute("trans", tgd);
if(trans.get_command()==tlm::TLM_READ_COMMAND && tgd.data_length<8)
h.record_attribute("trans.data_value", tgd.get_data_value());
if (trans.get_command() == tlm::TLM_READ_COMMAND && tgd.data_length < 8)
h.record_attribute("trans.data_value", tgd.get_data_value());
if (extensionRecording) extensionRecording->recordEndTx(h, trans);
// End the transaction
b_trHandle[trans.get_command()]->end_transaction(h, delay.value(), sc_time_stamp());
@@ -511,13 +511,13 @@ tlm::tlm_sync_enum tlm2_recorder<TYPES>::nb_transport_fw(typename TYPES::tlm_pay
/*************************************************************************
* handle recording
*************************************************************************/
tgd.response_status=trans.get_response_status();
tgd.response_status = trans.get_response_status();
h.record_attribute("trans", tgd);
if(tgd.data_length<8){
uint64_t buf=0;
//FIXME: this is endianess dependent
for(size_t i = 0; i<tgd.data_length; i++) buf+=(*tgd.data)<<i*8;
h.record_attribute("trans.data_value", buf);
if (tgd.data_length < 8) {
uint64_t buf = 0;
// FIXME: this is endianess dependent
for (size_t i = 0; i < tgd.data_length; i++) buf += (*tgd.data) << i * 8;
h.record_attribute("trans.data_value", buf);
}
if (extensionRecording) extensionRecording->recordEndTx(h, trans);
h.record_attribute("tlm_phase[return_path]", (tlm::tlm_phase_enum)(unsigned)phase);
@@ -596,13 +596,13 @@ tlm::tlm_sync_enum tlm2_recorder<TYPES>::nb_transport_bw(typename TYPES::tlm_pay
/*************************************************************************
* handle recording
*************************************************************************/
tgd.response_status=trans.get_response_status();
tgd.response_status = trans.get_response_status();
h.record_attribute("trans", tgd);
if(tgd.data_length<8){
uint64_t buf=0;
//FIXME: this is endianess dependent
for(size_t i = 0; i<tgd.data_length; i++) buf+=(*tgd.data)<<i*8;
h.record_attribute("trans.data_value", buf);
if (tgd.data_length < 8) {
uint64_t buf = 0;
// FIXME: this is endianess dependent
for (size_t i = 0; i < tgd.data_length; i++) buf += (*tgd.data) << i * 8;
h.record_attribute("trans.data_value", buf);
}
if (extensionRecording) extensionRecording->recordEndTx(h, trans);
// phase and delay are already recorded
@@ -713,9 +713,8 @@ bool tlm2_recorder<TYPES>::get_direct_mem_ptr(typename TYPES::tlm_payload_type &
if (!isRecordingEnabled()) {
return fw_port->get_direct_mem_ptr(trans, dmi_data);
}
if (!dmi_streamHandle)
dmi_streamHandle = new scv_tr_stream((fixed_basename + "_dmi").c_str(), "TRANSACTOR", m_db);
if(!dmi_trGetHandle)
if (!dmi_streamHandle) dmi_streamHandle = new scv_tr_stream((fixed_basename + "_dmi").c_str(), "TRANSACTOR", m_db);
if (!dmi_trGetHandle)
dmi_trGetHandle =
new scv_tr_generator<tlm_gp_data, tlm_dmi_data>("get_dmi_ptr", *dmi_streamHandle, "trans", "dmi_data");
scv_tr_handle h = dmi_trGetHandle->begin_transaction(tlm_gp_data(trans));
@@ -735,11 +734,10 @@ void tlm2_recorder<TYPES>::invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, s
bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);
return;
}
if (!dmi_streamHandle)
dmi_streamHandle = new scv_tr_stream((fixed_basename + "_dmi").c_str(), "TRANSACTOR", m_db);
if(!dmi_trInvalidateHandle)
dmi_trInvalidateHandle = new scv_tr_generator<sc_dt::uint64, sc_dt::uint64>("invalidate_dmi_ptr", *dmi_streamHandle,
"start_delay", "end_delay");
if (!dmi_streamHandle) dmi_streamHandle = new scv_tr_stream((fixed_basename + "_dmi").c_str(), "TRANSACTOR", m_db);
if (!dmi_trInvalidateHandle)
dmi_trInvalidateHandle = new scv_tr_generator<sc_dt::uint64, sc_dt::uint64>(
"invalidate_dmi_ptr", *dmi_streamHandle, "start_delay", "end_delay");

scv_tr_handle h = dmi_trInvalidateHandle->begin_transaction(start_addr);
bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);

+ 2
- 2
incl/scv4tlm/tlm2_recorder_module.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2017 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -35,7 +35,7 @@ namespace scv4tlm {
template <unsigned int BUSWIDTH = 32, typename TYPES = tlm::tlm_base_protocol_types>
class tlm2_recorder_module : public sc_core::sc_module, public tlm2_recorder<TYPES> {
public:
SC_HAS_PROCESS(tlm2_recorder_module);
SC_HAS_PROCESS(tlm2_recorder_module);// NOLINT
//! The target socket of the recorder to be bound to the initiator
tlm::tlm_target_socket<BUSWIDTH, TYPES, 1> target;
//! The initiator to be bound to the target socket

+ 13
- 14
incl/scv4tlm/tlm_gp_data.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2017 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -76,23 +76,22 @@ public:
other.set_address(address);
other.set_data_length(data_length);
other.set_byte_enable_length(byte_enable_length);
other.set_streaming_width (streaming_width);
other.set_streaming_width(streaming_width);
other.set_gp_option(gp_option);
other.set_dmi_allowed(dmi_allowed);
other.set_response_status(response_status);
if(transfer_ownership){
other.set_byte_enable_ptr(byte_enable);
other.set_data_ptr(data);
byte_enable=nullptr;
data=nullptr;
if (transfer_ownership) {
other.set_byte_enable_ptr(byte_enable);
other.set_data_ptr(data);
byte_enable = nullptr;
data = nullptr;
}
}

//--------------
// Destructor
//--------------
virtual ~tlm_gp_data() {
}
virtual ~tlm_gp_data() {}

std::string get_response_string() const {
switch (response_status) {
@@ -114,11 +113,11 @@ public:
return "TLM_UNKNOWN_RESPONSE";
}

uint64_t get_data_value(){
uint64_t buf=0;
//FIXME: this is endianess dependent
for(size_t i = 0; i<data_length; i++) buf+=(*(data+i))<<i*8;
return buf;
uint64_t get_data_value() {
uint64_t buf = 0;
// FIXME: this is endianess dependent
for (size_t i = 0; i < data_length; i++) buf += (*(data + i)) << i * 8;
return buf;
}
// attributes are public so that scv_extension mechanism works
sc_dt::uint64 address{0};

+ 1
- 1
incl/scv4tlm/tlm_gp_data_ext.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2017 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

+ 1
- 1
incl/scv4tlm/tlm_rec_initiator_socket.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2017 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

+ 1
- 1
incl/scv4tlm/tlm_rec_target_socket.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2017 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

+ 3
- 3
incl/scv4tlm/tlm_recording_extension.h View File

@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright 2016 MINRES Technologies GmbH
* Copyright 2016, 2018 MINRES Technologies GmbH
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -17,8 +17,8 @@
#ifndef TLM_RECORDING_EXTENSION_H_
#define TLM_RECORDING_EXTENSION_H_

#include <scv.h>
#include <array>
#include <scv.h>

namespace scv4tlm {

@@ -28,7 +28,7 @@ enum tx_rel {
PREDECESSOR_SUCCESSOR /*!< indicates predecessor successor relationship */
};
//! the string representation of the tx_rel
static std::array<const char*, 2> tx_rel_str = { { "PARENT/CHILD", "PRED/SUCC" } };
static std::array<const char *, 2> tx_rel_str = {{"PARENT/CHILD", "PRED/SUCC"}};
/*! \brief cast the tx_rel enum to a string
*
* \param tc_rel is the relationship enum

+ 37
- 38
incl/tlm/tlm_extensions.h View File

@@ -1,9 +1,18 @@
/*
* tlm_extensions.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 12.07.2018
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef SC_COMPONENTS_INCL_TLM_TLM_EXTENSIONS_H_
#define SC_COMPONENTS_INCL_TLM_TLM_EXTENSIONS_H_
@@ -12,50 +21,41 @@

namespace tlm {

template<typename T>
struct tlm_unmanaged_extension : public tlm_extension<T> {
template <typename T> struct tlm_unmanaged_extension : public tlm_extension<T> {
using type = T;

tlm_extension_base* clone() const override {
return new type(static_cast<const T&>(*this));
}
tlm_extension_base *clone() const override { return new type(static_cast<const T &>(*this)); }

void copy_from(tlm_extension_base const & other) override {
this->operator=(static_cast<const type&>(other));
}
void copy_from(tlm_extension_base const &other) override { this->operator=(static_cast<const type &>(other)); }

protected:
tlm_unmanaged_extension(){};
};

template<typename T>
struct tlm_managed_extension {
template <typename T> struct tlm_managed_extension {

using type = T;

template<typename... Args>
static type* alloacte(Args&&... args){
auto* ret = new(pool::allocate()) type(std::forward<Args>(args)...);
ret->is_pooled=true;
template <typename... Args> static type *alloacte(Args &&... args) {
auto *ret = new (pool::allocate()) type(std::forward<Args>(args)...);
ret->is_pooled = true;
return ret;
}

static type* allocate(){
auto* ret = new(pool::allocate()) type();
ret->is_pooled=true;
static type *allocate() {
auto *ret = new (pool::allocate()) type();
ret->is_pooled = true;
return ret;
}

tlm_extension_base* clone() const override {
tlm_extension_base *clone() const {
return allocate(); // Maybe static_cast<const T&>(*this)
}

void copy_from(tlm_extension_base const & other) override {
this->operator=(static_cast<const type&>(other));
}
void copy_from(tlm_extension_base const &other) { this->operator=(static_cast<const type &>(other)); }

void free() override {
if(is_pooled){
void free() {
if (is_pooled) {
this->~type();
pool::dealllocate(this);
} else {
@@ -63,8 +63,8 @@ struct tlm_managed_extension {
}
}
struct pool {
static void* allocate(){
if(free_list.size()>0){
static void *allocate() {
if (free_list.size() > 0) {
auto ret = free_list.back();
free_list.pop_back();
return ret;
@@ -72,22 +72,21 @@ struct tlm_managed_extension {
return calloc(1, sizeof(type));
}

static void dealllocate(void* p){
free_list.push_back(p);
}
static void dealllocate(void *p) { free_list.push_back(p); }

private:
static std::vector<void*> free_list;
static std::vector<void *> free_list;
};

protected:
tlm_managed_extension():is_pooled(false) {}
tlm_managed_extension(const tlm_managed_extension&):is_pooled(false) {}
tlm_managed_extension& operator=(const tlm_managed_extension& other){return *this;}
tlm_managed_extension()
: is_pooled(false) {}
tlm_managed_extension(const tlm_managed_extension &)
: is_pooled(false) {}
tlm_managed_extension &operator=(const tlm_managed_extension &other) { return *this; }

private:
bool is_pooled;
};

}
#endif /* SC_COMPONENTS_INCL_TLM_TLM_EXTENSIONS_H_ */

+ 50
- 47
incl/tlm/tlm_signal.h View File

@@ -1,9 +1,18 @@
/*
* tlm_signal.h
/*******************************************************************************
* Copyright 2018 MINRES Technologies GmbH
*
* Created on: 03.07.2018
* Author: eyck
*/
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#ifndef _TLM_TLM_SIGNAL_H_
#define _TLM_TLM_SIGNAL_H_
@@ -14,19 +23,17 @@

namespace tlm {

template<typename SIG=bool, typename TYPES = tlm_signal_baseprotocol_types<SIG>, int N = 32>
struct tlm_signal:
public sc_core::sc_module,
public tlm_signal_fw_transport_if<SIG, TYPES>,
public tlm_signal_bw_transport_if<SIG, TYPES>,
sc_core::sc_signal_in_if<SIG>
{
template <typename SIG = bool, typename TYPES = tlm_signal_baseprotocol_types<SIG>, int N = 32>
struct tlm_signal : public sc_core::sc_module,
public tlm_signal_fw_transport_if<SIG, TYPES>,
public tlm_signal_bw_transport_if<SIG, TYPES>,
sc_core::sc_signal_in_if<SIG> {
using tlm_signal_type = SIG;
using protocol_types = TYPES;
using payload_type = typename TYPES::tlm_payload_type;
using phase_type = typename TYPES::tlm_phase_type;

SC_HAS_PROCESS(tlm_signal);
SC_HAS_PROCESS(tlm_signal);// NOLINT

tlm_signal_opt_target_socket<tlm_signal_type, protocol_types, N> in;

@@ -35,40 +42,39 @@ struct tlm_signal:
tlm_signal(sc_core::sc_module_name nm)
: sc_core::sc_module(nm)
, in(sc_core::sc_gen_unique_name("in"))
, out(sc_core::sc_gen_unique_name("out"))
{
in.bind(*(tlm_signal_fw_transport_if<tlm_signal_type, protocol_types>*)this);
out.bind(*(tlm_signal_bw_transport_if<tlm_signal_type, protocol_types>*)this);
, out(sc_core::sc_gen_unique_name("out")) {
in.bind(*(tlm_signal_fw_transport_if<tlm_signal_type, protocol_types> *)this);
out.bind(*(tlm_signal_bw_transport_if<tlm_signal_type, protocol_types> *)this);
SC_METHOD(que_cb);
sensitive<<que.event();
sensitive << que.event();
}

void trace( sc_core::sc_trace_file* tf ) const override;
void trace(sc_core::sc_trace_file *tf) const override;

const char* kind() const override { return "tlm_signal"; }
const char *kind() const override { return "tlm_signal"; }

tlm_sync_enum nb_transport_fw(payload_type&, phase_type&, sc_core::sc_time&) override;
tlm_sync_enum nb_transport_fw(payload_type &, phase_type &, sc_core::sc_time &) override;

tlm_sync_enum nb_transport_bw(payload_type&, phase_type&, sc_core::sc_time&) override;
tlm_sync_enum nb_transport_bw(payload_type &, phase_type &, sc_core::sc_time &) override;

// get the value changed event
const sc_core::sc_event& value_changed_event() const override {return value.value_changed_event();}
const sc_core::sc_event &value_changed_event() const override { return value.value_changed_event(); }
// read the current value
const SIG& read() const override{ return value.read();}
const SIG &read() const override { return value.read(); }
// get a reference to the current value (for tracing)
const SIG& get_data_ref() const override {return value.get_data_ref();}
const SIG &get_data_ref() const override { return value.get_data_ref(); }
// was there a value changed event?
bool event() const override {return false;}
bool event() const override { return false; }

const sc_core::sc_event& default_event() const override {return value.default_event();}
const sc_core::sc_event &default_event() const override { return value.default_event(); }

const sc_core::sc_event& posedge_event() const override {return value.posedge_event();}
const sc_core::sc_event &posedge_event() const override { return value.posedge_event(); }

const sc_core::sc_event& negedge_event() const override {return value.negedge_event();}
const sc_core::sc_event &negedge_event() const override { return value.negedge_event(); }

bool posedge() const override {return value.posedge();}
bool posedge() const override { return value.posedge(); }

bool negedge() const override {return value.posedge();};
bool negedge() const override { return value.posedge(); };

private:
void que_cb();
@@ -76,36 +82,33 @@ private:
sc_core::sc_signal<tlm_signal_type> value;
};

template<typename SIG , typename TYPES, int N>