diff --git a/.cproject b/.cproject index a3b3b2d..6d3e745 100644 --- a/.cproject +++ b/.cproject @@ -18,13 +18,13 @@ - + - - @@ -34,7 +34,7 @@ - @@ -47,6 +47,10 @@ + @@ -60,7 +64,7 @@ - + @@ -131,22 +135,48 @@ + + + + + + + + + - - - + + + + + + + + make + + all + true + true + true + + + make + + all VERBOSE=1 + true + true + true + + - - - diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index f6080c7..16eb769 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + diff --git a/CMakeLists.txt b/CMakeLists.txt index 46f06b6..790cccf 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -22,6 +22,40 @@ elseif ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC") set(warnings "/W4 /WX /EHsc") endif() +# This line finds the boost lib and headers. +set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install. +find_package(Boost COMPONENTS program_options system thread REQUIRED) + +# set-up SystemC and SCV +find_package(SystemC) +if(SystemC_FOUND) + add_definitions(-DWITH_SYSTEMC) + include_directories(${SystemC_INCLUDE_DIRS}) + link_directories(${SystemC_LIBRARY_DIRS} +) +else() + message( FATAL_ERROR "SystemC library not found." ) +endif() + +if(SCV_FOUND) + add_definitions(-DWITH_SCV) + link_directories(${SCV_LIBRARY_DIRS}) +endif(SCV_FOUND) + + add_subdirectory(sc-components) add_subdirectory(examples) #add_subdirectory(test) + +# +# SYSTEM PACKAGING (RPM, TGZ, ...) +# _____________________________________________________________________________ + +#include(CPackConfig) + +# +# CMAKE PACKAGING (for other CMake projects to use this one easily) +# _____________________________________________________________________________ + +#include(PackageConfigurator) + diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt index efaa288..b354995 100644 --- a/examples/CMakeLists.txt +++ b/examples/CMakeLists.txt @@ -1,12 +1,39 @@ cmake_minimum_required (VERSION 2.8.12) -# Add executable called "recordingExample" that is built from the source files -# "scv_tr_recording_example.cpp". The extensions are automatically found. -add_executable (recExample scv_tr_recording_example.cpp) -# Link the executable to the Hello library. Since the Hello library has -# public include directories we will use those link directories when building -# recordingExample -target_link_libraries (recExample LINK_PUBLIC sc-components) -target_link_libraries (recExample LINK_PUBLIC ${SystemC_LIBRARIES}) -target_link_libraries (recExample LINK_PUBLIC ${SCV_LIBRARIES}) -target_link_libraries (recExample LINK_PUBLIC ${CMAKE_THREAD_LIBS_INIT}) -target_link_libraries (recExample LINK_PUBLIC ${CMAKE_DL_LIBS}) +set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) # main (top) cmake dir +set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake) # project specific cmake dir +set(CMAKE_CXX_STANDARD 11) # compromise, SystemC does not compile with C++14 + +project (sc-components) + +# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0) +set(VERSION_MAJOR "0") +set(VERSION_MINOR "0") +set(VERSION_PATCH "1") +set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH}) + +include(Common) + +list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}) + +find_package(Threads) +find_package(SystemC REQUIRED) +find_package(ZLIB) +if(SystemC_FOUND) + include_directories(${SystemC_INCLUDE_DIRS}) + link_directories(${SystemC_LIBRARY_DIRS} +) +else() + message( FATAL_ERROR "SystemC library not found." ) +endif() + +if(ZLIB_FOUND) + include_directories( ${ZLIB_INCLUDE_DIRS} ) +endif(ZLIB_FOUND) + +if(SCV_FOUND) + add_definitions(-DWITH_SCV) + link_directories(${SCV_LIBRARY_DIRS}) + add_subdirectory(transaction_recording) +endif(SCV_FOUND) + +add_subdirectory(simple_system) diff --git a/examples/simple_system/CMakeLists.txt b/examples/simple_system/CMakeLists.txt new file mode 100644 index 0000000..df99e18 --- /dev/null +++ b/examples/simple_system/CMakeLists.txt @@ -0,0 +1,24 @@ +cmake_minimum_required (VERSION 2.8.12) + +# Add executable called "simple_system" that is built from the source files +# "scv_tr_recording_example.cpp". The extensions are automatically found. +add_executable (simple_system + uart.cpp + spi.cpp + gpio.cpp + test_initiator.cpp + simple_system.cpp + sc_main.cpp +) + + +# Link the executable to the sc_components library. Since the sc_components library has +# public include directories we will use those link directories when building +# simple_system +target_link_libraries (simple_system LINK_PUBLIC sc-components) +target_link_libraries (simple_system LINK_PUBLIC ${SystemC_LIBRARIES}) +target_link_libraries (simple_system LINK_PUBLIC ${SCV_LIBRARIES}) +target_link_libraries (simple_system LINK_PUBLIC ${Boost_LIBRARIES} ) +target_link_libraries (simple_system LINK_PUBLIC ${CMAKE_THREAD_LIBS_INIT}) +target_link_libraries (simple_system LINK_PUBLIC ${ZLIB_LIBRARY}) +target_link_libraries (simple_system LINK_PUBLIC ${CMAKE_DL_LIBS}) diff --git a/examples/simple_system/gen/e300_plat_t.h b/examples/simple_system/gen/e300_plat_t.h new file mode 100644 index 0000000..8e0d90f --- /dev/null +++ b/examples/simple_system/gen/e300_plat_t.h @@ -0,0 +1,10 @@ +#ifndef _E300_PLAT_MAP_H_ +#define _E300_PLAT_MAP_H_ +// need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191 +const std::array, 3> e300_plat_map = {{ + {&i_gpio, 0x10012000, 0x1000}, + {&i_uart, 0x10013000, 0x1000}, + {&i_spi, 0x10014000, 0x1000} +}}; + +#endif /* _E300_PLAT_MAP_H_ */ diff --git a/examples/simple_system/gen/gpio_regs.h b/examples/simple_system/gen/gpio_regs.h new file mode 100644 index 0000000..536c627 --- /dev/null +++ b/examples/simple_system/gen/gpio_regs.h @@ -0,0 +1,157 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Created on: Sun Sep 17 23:56:50 CEST 2017 +// * gpio_regs.h Author: +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _GPIO_REGS_H_ +#define _GPIO_REGS_H_ + +#include +#include +#include +#include + +namespace sysc { + +template +class gpio_regs : + public sc_core::sc_module, + public sysc::tlm_target, + public sysc::resetable + { +protected: + // storage declarations + uint32_t r_value; + + uint32_t r_input_en; + + uint32_t r_output_en; + + uint32_t r_port; + + uint32_t r_pue; + + uint32_t r_ds; + + uint32_t r_rise_ie; + + uint32_t r_rise_ip; + + uint32_t r_fall_ie; + + uint32_t r_fall_ip; + + uint32_t r_high_ie; + + uint32_t r_high_ip; + + uint32_t r_low_ie; + + uint32_t r_low_ip; + + uint32_t r_iof_en; + + uint32_t r_iof_sel; + + uint32_t r_out_xor; + + // register declarations + sysc::sc_register value; + sysc::sc_register input_en; + sysc::sc_register output_en; + sysc::sc_register port; + sysc::sc_register pue; + sysc::sc_register ds; + sysc::sc_register rise_ie; + sysc::sc_register rise_ip; + sysc::sc_register fall_ie; + sysc::sc_register fall_ip; + sysc::sc_register high_ie; + sysc::sc_register high_ip; + sysc::sc_register low_ie; + sysc::sc_register low_ip; + sysc::sc_register iof_en; + sysc::sc_register iof_sel; + sysc::sc_register out_xor; + + gpio_regs(sc_core::sc_module_name nm); +protected: + sc_core::sc_time clk; +}; +////////////////////////////////////////////////////////////////////////////// +// member functions +////////////////////////////////////////////////////////////////////////////// + +template +gpio_regs::gpio_regs(sc_core::sc_module_name nm) +: sc_core::sc_module(nm) +, sysc::tlm_target(clk) +, NAMED(value, r_value, 0, *this) +, NAMED(input_en, r_input_en, 0, *this) +, NAMED(output_en, r_output_en, 0, *this) +, NAMED(port, r_port, 0, *this) +, NAMED(pue, r_pue, 0, *this) +, NAMED(ds, r_ds, 0, *this) +, NAMED(rise_ie, r_rise_ie, 0, *this) +, NAMED(rise_ip, r_rise_ip, 0, *this) +, NAMED(fall_ie, r_fall_ie, 0, *this) +, NAMED(fall_ip, r_fall_ip, 0, *this) +, NAMED(high_ie, r_high_ie, 0, *this) +, NAMED(high_ip, r_high_ip, 0, *this) +, NAMED(low_ie, r_low_ie, 0, *this) +, NAMED(low_ip, r_low_ip, 0, *this) +, NAMED(iof_en, r_iof_en, 0, *this) +, NAMED(iof_sel, r_iof_sel, 0, *this) +, NAMED(out_xor, r_out_xor, 0, *this) +{ + this->socket_map.addEntry(&value, 0x0UL, 0x4UL); + this->socket_map.addEntry(&input_en, 0x4UL, 0x4UL); + this->socket_map.addEntry(&output_en, 0x8UL, 0x4UL); + this->socket_map.addEntry(&port, 0xcUL, 0x4UL); + this->socket_map.addEntry(&pue, 0x10UL, 0x4UL); + this->socket_map.addEntry(&ds, 0x14UL, 0x4UL); + this->socket_map.addEntry(&rise_ie, 0x18UL, 0x4UL); + this->socket_map.addEntry(&rise_ip, 0x1cUL, 0x4UL); + this->socket_map.addEntry(&fall_ie, 0x20UL, 0x4UL); + this->socket_map.addEntry(&fall_ip, 0x24UL, 0x4UL); + this->socket_map.addEntry(&high_ie, 0x28UL, 0x4UL); + this->socket_map.addEntry(&high_ip, 0x2cUL, 0x4UL); + this->socket_map.addEntry(&low_ie, 0x30UL, 0x4UL); + this->socket_map.addEntry(&low_ip, 0x34UL, 0x4UL); + this->socket_map.addEntry(&iof_en, 0x38UL, 0x4UL); + this->socket_map.addEntry(&iof_sel, 0x3cUL, 0x4UL); + this->socket_map.addEntry(&out_xor, 0x40UL, 0x4UL); +} + +} +#endif // _GPIO_REGS_H_ diff --git a/examples/simple_system/gen/spi_regs.h b/examples/simple_system/gen/spi_regs.h new file mode 100644 index 0000000..0cee20d --- /dev/null +++ b/examples/simple_system/gen/spi_regs.h @@ -0,0 +1,197 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Created on: Sun Sep 17 23:56:50 CEST 2017 +// * spi_regs.h Author: +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _SPI_REGS_H_ +#define _SPI_REGS_H_ + +#include +#include +#include +#include + +namespace sysc { + +template +class spi_regs : + public sc_core::sc_module, + public sysc::tlm_target, + public sysc::resetable + { +protected: + // storage declarations + BEGIN_BF_DECL(sckdiv_t, uint32_t); + BF_FIELD(div, 0, 12); + END_BF_DECL() r_sckdiv; + + BEGIN_BF_DECL(sckmode_t, uint32_t); + BF_FIELD(pha, 0, 1); + BF_FIELD(pol, 1, 1); + END_BF_DECL() r_sckmode; + + uint32_t r_csid; + + uint32_t r_csdef; + + BEGIN_BF_DECL(csmode_t, uint32_t); + BF_FIELD(mode, 0, 2); + END_BF_DECL() r_csmode; + + BEGIN_BF_DECL(delay0_t, uint32_t); + BF_FIELD(cssck, 0, 8); + BF_FIELD(sckcs, 16, 8); + END_BF_DECL() r_delay0; + + BEGIN_BF_DECL(delay1_t, uint32_t); + BF_FIELD(intercs, 0, 16); + BF_FIELD(interxfr, 16, 8); + END_BF_DECL() r_delay1; + + BEGIN_BF_DECL(fmt_t, uint32_t); + BF_FIELD(proto, 0, 2); + BF_FIELD(endian, 2, 1); + BF_FIELD(dir, 3, 1); + BF_FIELD(len, 16, 4); + END_BF_DECL() r_fmt; + + BEGIN_BF_DECL(txdata_t, uint32_t); + BF_FIELD(data, 0, 8); + BF_FIELD(full, 31, 1); + END_BF_DECL() r_txdata; + + BEGIN_BF_DECL(rxdata_t, uint32_t); + BF_FIELD(data, 0, 8); + BF_FIELD(empty, 31, 1); + END_BF_DECL() r_rxdata; + + BEGIN_BF_DECL(txmark_t, uint32_t); + BF_FIELD(txmark, 0, 3); + END_BF_DECL() r_txmark; + + BEGIN_BF_DECL(rxmark_t, uint32_t); + BF_FIELD(rxmark, 0, 3); + END_BF_DECL() r_rxmark; + + BEGIN_BF_DECL(fctrl_t, uint32_t); + BF_FIELD(en, 0, 1); + END_BF_DECL() r_fctrl; + + BEGIN_BF_DECL(ffmt_t, uint32_t); + BF_FIELD(cmd_en, 0, 1); + BF_FIELD(addr_len, 1, 2); + BF_FIELD(pad_cnt, 3, 4); + BF_FIELD(cmd_proto, 7, 2); + BF_FIELD(addr_proto, 9, 2); + BF_FIELD(data_proto, 11, 2); + BF_FIELD(cmd_code, 16, 8); + BF_FIELD(pad_code, 24, 8); + END_BF_DECL() r_ffmt; + + BEGIN_BF_DECL(ie_t, uint32_t); + BF_FIELD(txwm, 0, 1); + BF_FIELD(rxwm, 1, 1); + END_BF_DECL() r_ie; + + BEGIN_BF_DECL(ip_t, uint32_t); + BF_FIELD(txwm, 0, 1); + BF_FIELD(rxwm, 1, 1); + END_BF_DECL() r_ip; + + // register declarations + sysc::sc_register sckdiv; + sysc::sc_register sckmode; + sysc::sc_register csid; + sysc::sc_register csdef; + sysc::sc_register csmode; + sysc::sc_register delay0; + sysc::sc_register delay1; + sysc::sc_register fmt; + sysc::sc_register txdata; + sysc::sc_register rxdata; + sysc::sc_register txmark; + sysc::sc_register rxmark; + sysc::sc_register fctrl; + sysc::sc_register ffmt; + sysc::sc_register ie; + sysc::sc_register ip; + + spi_regs(sc_core::sc_module_name nm); +protected: + sc_core::sc_time clk; +}; +////////////////////////////////////////////////////////////////////////////// +// member functions +////////////////////////////////////////////////////////////////////////////// + +template +spi_regs::spi_regs(sc_core::sc_module_name nm) +: sc_core::sc_module(nm) +, sysc::tlm_target(clk) +, NAMED(sckdiv, r_sckdiv, 0, *this) +, NAMED(sckmode, r_sckmode, 0, *this) +, NAMED(csid, r_csid, 0, *this) +, NAMED(csdef, r_csdef, 0, *this) +, NAMED(csmode, r_csmode, 0, *this) +, NAMED(delay0, r_delay0, 0, *this) +, NAMED(delay1, r_delay1, 0, *this) +, NAMED(fmt, r_fmt, 0, *this) +, NAMED(txdata, r_txdata, 0, *this) +, NAMED(rxdata, r_rxdata, 0, *this) +, NAMED(txmark, r_txmark, 0, *this) +, NAMED(rxmark, r_rxmark, 0, *this) +, NAMED(fctrl, r_fctrl, 0, *this) +, NAMED(ffmt, r_ffmt, 0, *this) +, NAMED(ie, r_ie, 0, *this) +, NAMED(ip, r_ip, 0, *this) +{ + this->socket_map.addEntry(&sckdiv, 0x0UL, 0x4UL); + this->socket_map.addEntry(&sckmode, 0x4UL, 0x4UL); + this->socket_map.addEntry(&csid, 0x10UL, 0x4UL); + this->socket_map.addEntry(&csdef, 0x14UL, 0x4UL); + this->socket_map.addEntry(&csmode, 0x18UL, 0x4UL); + this->socket_map.addEntry(&delay0, 0x28UL, 0x4UL); + this->socket_map.addEntry(&delay1, 0x2cUL, 0x4UL); + this->socket_map.addEntry(&fmt, 0x40UL, 0x4UL); + this->socket_map.addEntry(&txdata, 0x48UL, 0x4UL); + this->socket_map.addEntry(&rxdata, 0x4cUL, 0x4UL); + this->socket_map.addEntry(&txmark, 0x50UL, 0x4UL); + this->socket_map.addEntry(&rxmark, 0x54UL, 0x4UL); + this->socket_map.addEntry(&fctrl, 0x60UL, 0x4UL); + this->socket_map.addEntry(&ffmt, 0x64UL, 0x4UL); + this->socket_map.addEntry(&ie, 0x70UL, 0x4UL); + this->socket_map.addEntry(&ip, 0x74UL, 0x4UL); +} + +} +#endif // _SPI_REGS_H_ diff --git a/examples/simple_system/gen/uart_regs.h b/examples/simple_system/gen/uart_regs.h new file mode 100644 index 0000000..233a4c4 --- /dev/null +++ b/examples/simple_system/gen/uart_regs.h @@ -0,0 +1,130 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Created on: Sun Sep 17 23:56:50 CEST 2017 +// * uart_regs.h Author: +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _UART_REGS_H_ +#define _UART_REGS_H_ + +#include +#include +#include +#include + +namespace sysc { + +template +class uart_regs : + public sc_core::sc_module, + public sysc::tlm_target, + public sysc::resetable + { +protected: + // storage declarations + BEGIN_BF_DECL(txdata_t, uint32_t); + BF_FIELD(data, 0, 8); + BF_FIELD(full, 31, 1); + END_BF_DECL() r_txdata; + + BEGIN_BF_DECL(rxdata_t, uint32_t); + BF_FIELD(data, 0, 8); + BF_FIELD(empty, 31, 1); + END_BF_DECL() r_rxdata; + + BEGIN_BF_DECL(txctrl_t, uint32_t); + BF_FIELD(txen, 0, 1); + BF_FIELD(nstop, 1, 1); + BF_FIELD(reserved, 2, 14); + BF_FIELD(txcnt, 16, 3); + END_BF_DECL() r_txctrl; + + BEGIN_BF_DECL(rxctrl_t, uint32_t); + BF_FIELD(rxen, 0, 1); + BF_FIELD(reserved, 1, 15); + BF_FIELD(rxcnt, 16, 3); + END_BF_DECL() r_rxctrl; + + BEGIN_BF_DECL(ie_t, uint32_t); + BF_FIELD(txwm, 0, 1); + BF_FIELD(rxwm, 1, 1); + END_BF_DECL() r_ie; + + BEGIN_BF_DECL(ip_t, uint32_t); + BF_FIELD(txwm, 0, 1); + BF_FIELD(rxwm, 1, 1); + END_BF_DECL() r_ip; + + BEGIN_BF_DECL(div_t, uint32_t); + BF_FIELD(div, 0, 16); + END_BF_DECL() r_div; + + // register declarations + sysc::sc_register txdata; + sysc::sc_register rxdata; + sysc::sc_register txctrl; + sysc::sc_register rxctrl; + sysc::sc_register ie; + sysc::sc_register ip; + sysc::sc_register div; + + uart_regs(sc_core::sc_module_name nm); +protected: + sc_core::sc_time clk; +}; +////////////////////////////////////////////////////////////////////////////// +// member functions +////////////////////////////////////////////////////////////////////////////// + +template +uart_regs::uart_regs(sc_core::sc_module_name nm) +: sc_core::sc_module(nm) +, sysc::tlm_target(clk) +, NAMED(txdata, r_txdata, 0, *this) +, NAMED(rxdata, r_rxdata, 0, *this) +, NAMED(txctrl, r_txctrl, 0, *this) +, NAMED(rxctrl, r_rxctrl, 0, *this) +, NAMED(ie, r_ie, 0, *this) +, NAMED(ip, r_ip, 0, *this) +, NAMED(div, r_div, 0, *this) +{ + this->socket_map.addEntry(&txdata, 0x0UL, 0x4UL); + this->socket_map.addEntry(&rxdata, 0x4UL, 0x4UL); + this->socket_map.addEntry(&txctrl, 0x8UL, 0x4UL); + this->socket_map.addEntry(&rxctrl, 0xcUL, 0x4UL); + this->socket_map.addEntry(&ie, 0x10UL, 0x4UL); + this->socket_map.addEntry(&ip, 0x14UL, 0x4UL); + this->socket_map.addEntry(&div, 0x18UL, 0x4UL); +} + +} +#endif // _UART_REGS_H_ diff --git a/examples/simple_system/gpio.cpp b/examples/simple_system/gpio.cpp new file mode 100644 index 0000000..9c0d96f --- /dev/null +++ b/examples/simple_system/gpio.cpp @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#include "gpio.h" + +namespace sysc { + +gpio::gpio(sc_core::sc_module_name nm) +: gpio_regs<>(nm) +, NAMED(clk_i) +{ + SC_METHOD(clock_cb); + sensitive<clk=clk_i.read(); +} + +} /* namespace sysc */ diff --git a/examples/simple_system/gpio.h b/examples/simple_system/gpio.h new file mode 100644 index 0000000..cde37c0 --- /dev/null +++ b/examples/simple_system/gpio.h @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _GPIO_H_ +#define _GPIO_H_ + +#include "gen/gpio_regs.h" + +namespace sysc { + +class gpio: public gpio_regs<> { +public: + SC_HAS_PROCESS(gpio); + sc_core::sc_in clk_i; + gpio(sc_core::sc_module_name nm); + virtual ~gpio(); +protected: + void clock_cb(); +}; + +} /* namespace sysc */ + +#endif /* _GPIO_H_ */ diff --git a/examples/simple_system/sc_main.cpp b/examples/simple_system/sc_main.cpp new file mode 100644 index 0000000..47b701f --- /dev/null +++ b/examples/simple_system/sc_main.cpp @@ -0,0 +1,76 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright 2017 ubuntu +// +// Licensed under the Apache License, Version 2.0 (the "License"); you may not +// use this file except in compliance with the License. You may obtain a copy +// of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +// License for the specific language governing permissions and limitations under +// the License. +//////////////////////////////////////////////////////////////////////////////// +/* + * sc_main.cpp + * + * Created on: 17.09.2017 + * Author: ubuntu + */ + +#include "simple_system.h" +#include +#include "sysc/scv_tr_db.h" +#include + +using namespace sysc; +namespace po = boost::program_options; + +namespace { +const size_t ERROR_IN_COMMAND_LINE = 1; +const size_t SUCCESS = 0; +const size_t ERROR_UNHANDLED_EXCEPTION = 2; +} // namespace + +int sc_main(int argc, char* argv[]){ + /////////////////////////////////////////////////////////////////////////// + // CLI argument parsing + /////////////////////////////////////////////////////////////////////////// + po::options_description desc("Options");\ + desc.add_options()\ + ("help,h", "Print help message")\ + ("debug,d", po::value(), "set debug level")\ + ("trace,t", "trace SystemC signals"); + po::variables_map vm; + try { + po::store(po::parse_command_line(argc, argv, desc), vm); // can throw + // --help option + if ( vm.count("help") ){ + std::cout << "JIT-ISS simulator for AVR" << std::endl << desc << std::endl; + return SUCCESS; + } + po::notify(vm); // throws on error, so do after help in case + // there are any problems + } catch(po::error& e){ + std::cerr << "ERROR: " << e.what() << std::endl << std::endl; + std::cerr << desc << std::endl; + return ERROR_IN_COMMAND_LINE; + } + /////////////////////////////////////////////////////////////////////////// + // set up tracing & transaction recording + /////////////////////////////////////////////////////////////////////////// + sysc::tracer trace("simple_system", sysc::tracer::TEXT, vm.count("trace")); + /////////////////////////////////////////////////////////////////////////// + // initialize VCD tracer + /////////////////////////////////////////////////////////////////////////// + sc_trace_file* tf = sc_create_vcd_trace_file("my_db"); + + simple_system i_simple_system("i_simple_system"); + + sc_start(sc_core::sc_time(100, sc_core::SC_NS)); + + return 0; +} + diff --git a/examples/simple_system/simple_system.cpp b/examples/simple_system/simple_system.cpp new file mode 100644 index 0000000..3061ae9 --- /dev/null +++ b/examples/simple_system/simple_system.cpp @@ -0,0 +1,37 @@ +/* + * simplesystem.cpp + * + * Created on: 17.09.2017 + * Author: ubuntu + */ + +#include "simple_system.h" + +namespace sysc { + +simple_system::simple_system(sc_core::sc_module_name nm) +: sc_core::sc_module(nm) +, NAMED(i_master) +, NAMED(i_router, 3, 1) +, NAMED(i_uart) +, NAMED(i_spi) +, NAMED(i_gpio) +, NAMED(s_clk) +{ + i_master.intor(i_router.target[0]); + size_t i=0; + for(const auto& e: e300_plat_map){ + i_router.initiator[i](e.target->socket); + i_router.add_target_range(i, e.start, e.size); + i++; + } + i_uart.clk_i(s_clk); + i_spi.clk_i(s_clk); + i_gpio.clk_i(s_clk); + s_clk.write(sc_core::sc_time(10, sc_core::SC_NS)); +} + +simple_system::~simple_system() { +} + +} /* namespace sysc */ diff --git a/examples/simple_system/simple_system.h b/examples/simple_system/simple_system.h new file mode 100644 index 0000000..c9a3938 --- /dev/null +++ b/examples/simple_system/simple_system.h @@ -0,0 +1,40 @@ +/* + * simplesystem.h + * + * Created on: 17.09.2017 + * Author: ubuntu + */ + +#ifndef SIMPLESYSTEM_H_ +#define SIMPLESYSTEM_H_ + +#include "uart.h" +#include "spi.h" +#include "gpio.h" + +#include "test_initiator.h" +#include +#include +#include + + +namespace sysc { + +class simple_system: public sc_core::sc_module { +public: + test_initiator i_master; + router<> i_router; + uart i_uart; + spi i_spi; + gpio i_gpio; + sc_core::sc_signal s_clk; + + simple_system(sc_core::sc_module_name nm); + virtual ~simple_system(); + +#include "gen/e300_plat_t.h" +}; + +} /* namespace sysc */ + +#endif /* SIMPLESYSTEM_H_ */ diff --git a/examples/simple_system/spi.cpp b/examples/simple_system/spi.cpp new file mode 100644 index 0000000..67da2db --- /dev/null +++ b/examples/simple_system/spi.cpp @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#include "spi.h" + +namespace sysc { + +spi::spi(sc_core::sc_module_name nm) +: spi_regs<>(nm) +, NAMED(clk_i) +{ + SC_METHOD(clock_cb); + sensitive<clk=clk_i.read(); +} + +} /* namespace sysc */ diff --git a/examples/simple_system/spi.h b/examples/simple_system/spi.h new file mode 100644 index 0000000..94b892a --- /dev/null +++ b/examples/simple_system/spi.h @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef _SPI_H_ +#define _SPI_H_ + +#include "gen/spi_regs.h" + +namespace sysc { + +class spi: public spi_regs<> { +public: + SC_HAS_PROCESS(spi); + sc_core::sc_in clk_i; + spi(sc_core::sc_module_name nm); + virtual ~spi(); +protected: + void clock_cb(); +}; + +} /* namespace sysc */ + +#endif /* _SPI_H_ */ diff --git a/examples/simple_system/test_initiator.cpp b/examples/simple_system/test_initiator.cpp new file mode 100644 index 0000000..d5229b8 --- /dev/null +++ b/examples/simple_system/test_initiator.cpp @@ -0,0 +1,35 @@ +/* + * test_initiator.cpp + * + * Created on: 17.09.2017 + * Author: ubuntu + */ + +#include "test_initiator.h" +#include +#include + +namespace sysc { + +test_initiator::test_initiator(sc_core::sc_module_name nm) +: sc_core::sc_module(nm) +, NAMED(intor) +{ + SC_THREAD(run); + +} + +void test_initiator::run() { + wait(10, sc_core::SC_NS); + tlm::tlm_generic_payload gp; + std::array data; + gp.set_command(tlm::TLM_READ_COMMAND); + gp.set_address(0); + gp.set_data_ptr(data.data()); + gp.set_data_length(data.size()); + sc_core::sc_time delay; + intor->b_transport(gp, delay); + wait(10, sc_core::SC_NS); +} + +} /* namespace sysc */ diff --git a/examples/simple_system/test_initiator.h b/examples/simple_system/test_initiator.h new file mode 100644 index 0000000..377d67b --- /dev/null +++ b/examples/simple_system/test_initiator.h @@ -0,0 +1,28 @@ +/* + * test_initiator.h + * + * Created on: 17.09.2017 + * Author: ubuntu + */ + +#ifndef SIMPLE_SYSTEM_TEST_INITIATOR_H_ +#define SIMPLE_SYSTEM_TEST_INITIATOR_H_ + +#include +#include + +namespace sysc { + +class test_initiator: public sc_core::sc_module { +public: + SC_HAS_PROCESS(test_initiator); + tlm_utils::simple_initiator_socket intor; + + test_initiator(sc_core::sc_module_name nm); +protected: + void run(); +}; + +} /* namespace sysc */ + +#endif /* SIMPLE_SYSTEM_TEST_INITIATOR_H_ */ diff --git a/examples/simple_system/uart.cpp b/examples/simple_system/uart.cpp new file mode 100644 index 0000000..863927b --- /dev/null +++ b/examples/simple_system/uart.cpp @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#include "uart.h" + +namespace sysc { + +uart::uart(sc_core::sc_module_name nm) +: uart_regs<>(nm) +, NAMED(clk_i) +{ + SC_METHOD(clock_cb); + sensitive<clk=clk_i.read(); +} + +} /* namespace sysc */ diff --git a/examples/simple_system/uart.h b/examples/simple_system/uart.h new file mode 100644 index 0000000..70371f9 --- /dev/null +++ b/examples/simple_system/uart.h @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////// +// Copyright (C) 2017, MINRES Technologies GmbH +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its contributors +// may be used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +// POSSIBILITY OF SUCH DAMAGE. +// +// Contributors: +// eyck@minres.com - initial API and implementation +// +// +//////////////////////////////////////////////////////////////////////////////// + +#ifndef RISCV_INCL_SYSC_SIFIVE_UART_H_ +#define RISCV_INCL_SYSC_SIFIVE_UART_H_ + +#include "gen/uart_regs.h" + +namespace sysc { + +class uart: public uart_regs<> { +public: + SC_HAS_PROCESS(uart); + sc_core::sc_in clk_i; + uart(sc_core::sc_module_name nm); + virtual ~uart(); +protected: + void clock_cb(); +}; + +} /* namespace sysc */ + +#endif /* RISCV_INCL_SYSC_SIFIVE_UART_H_ */ diff --git a/examples/transaction_recording/CMakeLists.txt b/examples/transaction_recording/CMakeLists.txt new file mode 100644 index 0000000..ac2d8a1 --- /dev/null +++ b/examples/transaction_recording/CMakeLists.txt @@ -0,0 +1,12 @@ +cmake_minimum_required (VERSION 2.8.12) +# Add executable called "transaction_recording" that is built from the source files +# "scv_tr_recording_example.cpp". The extensions are automatically found. +add_executable (transaction_recording scv_tr_recording_example.cpp) +# Link the executable to the sc_components library. Since the sc_components library has +# public include directories we will use those link directories when building +# transaction_recording +target_link_libraries (transaction_recording LINK_PUBLIC sc-components) +target_link_libraries (transaction_recording LINK_PUBLIC ${SystemC_LIBRARIES}) +target_link_libraries (transaction_recording LINK_PUBLIC ${SCV_LIBRARIES}) +target_link_libraries (transaction_recording LINK_PUBLIC ${CMAKE_THREAD_LIBS_INIT}) +target_link_libraries (transaction_recording LINK_PUBLIC ${CMAKE_DL_LIBS}) diff --git a/examples/scv_tr_recording_example.cpp b/examples/transaction_recording/scv_tr_recording_example.cpp similarity index 100% rename from examples/scv_tr_recording_example.cpp rename to examples/transaction_recording/scv_tr_recording_example.cpp diff --git a/sc-components b/sc-components index 53ccc12..6305bb0 160000 --- a/sc-components +++ b/sc-components @@ -1 +1 @@ -Subproject commit 53ccc122bb2f6143bde83f915e65b1f5bee9d0c5 +Subproject commit 6305bb029ae271c8c220e60d4279042556534681