diff --git a/scc b/scc
index f1d5dc5..fa87148 160000
--- a/scc
+++ b/scc
@@ -1 +1 @@
-Subproject commit f1d5dc53353c9094480004073bd30986299b3f2f
+Subproject commit fa8714872700f47be77665ae2aee5d0bb34fc826
diff --git a/tests/axi4_pin_level/narrow_burst_test.cpp b/tests/axi4_pin_level/narrow_burst_test.cpp
index 3119369..2de4521 100644
--- a/tests/axi4_pin_level/narrow_burst_test.cpp
+++ b/tests/axi4_pin_level/narrow_burst_test.cpp
@@ -150,7 +150,7 @@ void axi4_burst_alignment(bool pipelined_wrreq, bool write_bp) {
 
     auto& dut = factory::get<testbench>();
     dut.intor_bfm.pipelined_wrreq = pipelined_wrreq;
-    dut.tgt_pe.wr_data_accept_delay.value = write_bp ? 1 : 0;
+    dut.tgt_pe.wr_data_accept_delay.set_value(write_bp ? 1 : 0);
     auto cycles = run_scenario(state);
 
     REQUIRE(cycles < 1000);
@@ -192,7 +192,7 @@ void axi4_narrow_burst(bool pipelined_wrreq, bool write_bp) {
 
     auto& dut = factory::get<testbench>();
     dut.intor_bfm.pipelined_wrreq = pipelined_wrreq;
-    dut.tgt_pe.wr_data_accept_delay.value = write_bp ? 1 : 0;
+    dut.tgt_pe.wr_data_accept_delay.set_value(write_bp ? 1 : 0);
     auto cycles = run_scenario(state);
 
     REQUIRE(cycles < 1000);