From ef5f4e149c9f6f354d48463f30f7bf0f759d8028 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Fri, 21 Dec 2018 15:05:59 +0530 Subject: [PATCH] firmware: Remove redundant write to mideleg and medeleg The mideleg and medeleg are already programmed in delegate_traps() so no need to set it here. Any CSR setup in our reference firmware becomes a requirement for bootloader linking to libsbi.a so we should have minimum possible CSR setup in our reference firmware. Signed-off-by: Anup Patel --- firmware/fw_common.S | 2 -- 1 file changed, 2 deletions(-) diff --git a/firmware/fw_common.S b/firmware/fw_common.S index b5e1f904..198aa0b9 100644 --- a/firmware/fw_common.S +++ b/firmware/fw_common.S @@ -119,8 +119,6 @@ _wait_for_boot_hart: _start_warm: /* Disable and clear all interrupts */ - csrw mideleg, zero - csrw medeleg, zero csrw mie, zero csrw mip, zero