From 8d1c21b38752301fc6c727eece45c15c663649b0 Mon Sep 17 00:00:00 2001 From: Vladimir Kondratiev Date: Mon, 23 Feb 2026 16:55:02 +0200 Subject: [PATCH] platform: generic: eyeq7h: enable ECC on L1 cache Signed-off-by: Vladimir Kondratiev Link: https://lore.kernel.org/r/20260223-for-upstream-eyeq7h-v3-23-621d004d1a21@mobileye.com Signed-off-by: Anup Patel --- platform/generic/mips/eyeq7h.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/platform/generic/mips/eyeq7h.c b/platform/generic/mips/eyeq7h.c index f09ec5f0..242cbb3c 100644 --- a/platform/generic/mips/eyeq7h.c +++ b/platform/generic/mips/eyeq7h.c @@ -436,6 +436,8 @@ static int eyeq7h_nascent_init(void) /* Per hart set up */ /* Enable AMO and RDTIME illegal instruction exceptions. */ csr_set(CSR_MIPSCONFIG6, (1<<2)|(1<<1)); + /* enable ECC for L1 I/D and FTLB */ + csr_set(CSR_MIPSERRCTL, MIPSERRCTL_PE); return 0; }