From 8c814b5c9b03aac0d6bb2366e3c8fbce132ca4d9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Date: Tue, 29 Apr 2025 16:25:47 +0200 Subject: [PATCH] lib: sbi_hart: fix sstateen emulation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Sstateen extension defines 4 sstateen registers, but SBI currently configures the execution environment to throw illegal instruction exception when accessing sstateen1-3. SBI should implement all sstateen registers, so delegate the implementation to hardware by setting the SE bit. Reviewed-by: Anup Patel Signed-off-by: Radim Krčmář Link: https://lore.kernel.org/r/20250429142549.3673976-7-rkrcmar@ventanamicro.com Signed-off-by: Anup Patel --- lib/sbi/sbi_hart.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index bdf66ef7..fc37b249 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -111,6 +111,9 @@ static void mstatus_init(struct sbi_scratch *scratch) mstateen_val &= ~SMSTATEEN0_CTR; csr_write64(CSR_MSTATEEN0, mstateen_val); + csr_write64(CSR_MSTATEEN1, SMSTATEEN_STATEN); + csr_write64(CSR_MSTATEEN2, SMSTATEEN_STATEN); + csr_write64(CSR_MSTATEEN3, SMSTATEEN_STATEN); if (misa_extension('S')) csr_write(CSR_SSTATEEN0, 0);