From 1ed9eb255d865e75be2d2a87d9ef670c502294cc Mon Sep 17 00:00:00 2001 From: Zong Li Date: Thu, 26 Sep 2019 20:14:02 -0700 Subject: [PATCH] Write MSIP by using memory-mapped control register The machine-level MSIP bits are written by accesses to memory-mapped control registers. Only use CSR instruction for SSIP and USIP. There is no effect that using CSR instruction to write MSIP when testing on unleashed board and QEMU. Signed-off-by: Zong Li Reviewed-by: Anup Patel --- lib/sbi/sbi_hart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 6bf0e136..018fe851 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -341,7 +341,7 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid) spin_unlock(&coldboot_wait_bitmap_lock); } while (!(mipval & MIP_MSIP)); - csr_clear(CSR_MIP, MIP_MSIP); + sbi_platform_ipi_clear(plat, hartid); } void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)