From fc66bcbf489ce84e5ce84b7634b250a593a49fb0 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Tue, 7 Oct 2025 16:18:17 +0200 Subject: [PATCH] sets mt core complex --- .vscode/launch.json | 9 +++++++++ dbt-rise-core | 2 +- dbt-rise-riscv | 2 +- scc | 2 +- src/vp/system.h | 4 ++-- 5 files changed, 14 insertions(+), 5 deletions(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index 488d4f1..8c75ebd 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -30,6 +30,15 @@ "arguments": "--isa 'rv32gc|msu_vp' -v INFO --disass -f fw/hello-world/hello.elf -g 10000", "openGdbConsole": true }, + { + "type": "gdb", + "request": "launch", + "name": "32bit VP", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "--isa 'rv32gc_msu' -v INFO --disass -f fw/hello-world/hello.elf", + "initCommands": ["info break"] + }, { "type": "gdb", "request": "launch", diff --git a/dbt-rise-core b/dbt-rise-core index b0fd676..83eb45b 160000 --- a/dbt-rise-core +++ b/dbt-rise-core @@ -1 +1 @@ -Subproject commit b0fd6762be2a39e4b05667f71778be4fb1bd6019 +Subproject commit 83eb45bb3e393eb979b44e97ba08da8460eedea4 diff --git a/dbt-rise-riscv b/dbt-rise-riscv index 23b00ad..06fe403 160000 --- a/dbt-rise-riscv +++ b/dbt-rise-riscv @@ -1 +1 @@ -Subproject commit 23b00add2353b06fae4e7109c97879919be43720 +Subproject commit 06fe403e69ac61254e951b9751d567c166ce07dd diff --git a/scc b/scc index badc373..658e195 160000 --- a/scc +++ b/scc @@ -1 +1 @@ -Subproject commit badc373aae58a9745dac803862edb522e6674321 +Subproject commit 658e19539affeaaf9117d9405e6faf5ff796856b diff --git a/src/vp/system.h b/src/vp/system.h index e26bc66..03cc258 100644 --- a/src/vp/system.h +++ b/src/vp/system.h @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -48,7 +48,7 @@ public: system(sc_core::sc_module_name nm); private: - sysc::riscv::core_complex core_complex{"core_complex"}; + sysc::riscv::core_complex_mt<> core_complex{"core_complex"}; scc::router<> ahb_router, apbBridge; vpvper::minres::gpio_tl gpio0{"gpio0"}; vpvper::minres::uart_tl uart0{"uart0"};