From b977ccd6c9483a363fbc205ac43f77d945ce9bc1 Mon Sep 17 00:00:00 2001
From: Eyck Jentzsch <eyck@minres.com>
Date: Sat, 18 Apr 2026 11:37:49 +0200
Subject: [PATCH] updates submodules to make CSR register reporting
 configurable

---
 dbt-rise-core   | 2 +-
 dbt-rise-riscv  | 2 +-
 scc             | 2 +-
 src/sc_main.cpp | 1 +
 4 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/dbt-rise-core b/dbt-rise-core
index c1def07..daa01b4 160000
--- a/dbt-rise-core
+++ b/dbt-rise-core
@@ -1 +1 @@
-Subproject commit c1def072d578f28f2f2ab34031db90f6408dd549
+Subproject commit daa01b423360e7677a30d61f913cfa1bf09a1251
diff --git a/dbt-rise-riscv b/dbt-rise-riscv
index 4db3ef1..9d40aa8 160000
--- a/dbt-rise-riscv
+++ b/dbt-rise-riscv
@@ -1 +1 @@
-Subproject commit 4db3ef171ec33c58d3c1db208e23f8eb7368245a
+Subproject commit 9d40aa830d3cacd5565bd6feba9bb41917ba6787
diff --git a/scc b/scc
index 62e6089..2e58c0e 160000
--- a/scc
+++ b/scc
@@ -1 +1 @@
-Subproject commit 62e60899156a1f611ba70ad88d6927b3ffbf00ab
+Subproject commit 2e58c0e32ef9d72ec72b0b9479b767d291d06c66
diff --git a/src/sc_main.cpp b/src/sc_main.cpp
index cd1b6b2..c29bafb 100644
--- a/src/sc_main.cpp
+++ b/src/sc_main.cpp
@@ -42,6 +42,7 @@ jmp_buf abrt;
 void ABRThandler(int sig) { longjmp(abrt, sig); }
 
 int sc_main(int argc, char* argv[]) {
+    // setenv("DBT_RISE_DISABLE_FULL_REGISTER_LIST", "1", 1);
     signal(SIGINT, ABRThandler);
     signal(SIGABRT, ABRThandler);
     signal(SIGSEGV, ABRThandler);