From 209fea4179c6f840616e1699c1d3089a7512e42b Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 8 Feb 2026 17:49:11 +0100 Subject: [PATCH] updates submodules and adds eth channel to configure transmission delay --- .vscode/launch.json | 93 +++++++++++++++++++++++++++------------------ scc | 2 +- src/vp/tb.cpp | 6 ++- src/vp/tb.h | 2 + vpvper | 2 +- 5 files changed, 64 insertions(+), 41 deletions(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index 5fac938..ee10d42 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -44,41 +44,6 @@ "b main" ] }, - { - "type": "gdbtarget", - "request": "launch", - "name": "Debug hello world 32bit", - "program": "fw/hello-world/hello.elf", - "imageAndSymbols": { - "symbolFileName": "fw/hello-world/hello.elf" - }, - "target": { - "server": "${workspaceFolder}/build/RelWithDebInfo/src/riscv-vp", - "serverParameters": [ - "--isa", - "rv32gc_msu", - "-v", - "INFO", - "-f", - "fw/hello-world/hello.elf", - "-g", - "10000" - ], - "watchServerProcess": true, - "port": "10000" - }, - "cwd": "${workspaceRoot}", - "gdb": "riscv64-unknown-elf-gdb", - "openGdbConsole": false, - "presentation": { - "hidden": false, - "group": "FW Debug", - "order": 2 - }, - "initCommands": [ - "b main" - ] - }, { "type": "gdbtarget", "request": "attach", @@ -114,8 +79,8 @@ "name": "32bit VP", "cwd": "${workspaceRoot}", "program": "${workspaceFolder}/build/Debug/src/riscv-vp", - "arguments": "--isa 'rv32gc_msu' -v INFO -f fw/hello-world/hello.elf", - "openGdbConsole": true, + "arguments": "--isa 'rv32imac_mu' -v INFO -f fw/hello-world/hello.elf", + "openGdbConsole": false, "initCommands": [ "set breakpoint pending on", "set breakpoint auto-hw on", @@ -168,6 +133,60 @@ "program": "${workspaceFolder}/build/Debug/dbt-rise-riscv/riscv-sim", "arguments": "--isa ?", "openGdbConsole": true + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-SIM TGC5D", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/dbt-rise-riscv/riscv-sim", + "arguments": "-v 5 --isa tgc5d -f fw/hello-world/hello.elf", + "openGdbConsole": true + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-VP tcp_main.elf 32bit", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "-v INFO --isa rv32imac_mu -f ${workspaceFolder}/../ThreadX4TGFS/build/Debug32/tcp_demo.elf -m 0.05s", + "openGdbConsole": false + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-VP tcp_main.elf 64bit", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "-v INFO --isa rv64gc_mu -f ${workspaceFolder}/../ThreadX4TGFS/build/Debug/tcp_demo.elf -m 0.05s", + "openGdbConsole": false + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-VP ADS tcp_main.elf 32bit", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "-v DEBUG --isa rv32imac_mu -f /home/eyck/Projects/MINRES/ADS-VP-Demo-FW/build/Debug32/tcp_demo.elf -m 0.2s -p tb.top.trace_dump_file=trace.trx -p 'tb.eth*.channel_delay=1ms'", + "openGdbConsole": false + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-VP ADS tcp_main.elf 64bit", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "-v INFO --isa rv64gc_mu -f /home/eyck/Projects/MINRES/ADS-VP-Demo-FW/build/Debug/tcp_demo.elf -m 0.05s", + "openGdbConsole": false + }, + { + "type": "gdb", + "request": "launch", + "name": "RISCV-VP tcp_main.elf with debug server", + "cwd": "${workspaceRoot}", + "program": "${workspaceFolder}/build/Debug/src/riscv-vp", + "arguments": "-v INFO --isa rv32gc_mu -f ${workspaceFolder}/../ThreadX4TGFS/build/Debug32/tcp_demo.elf -m 0.05s -g 1234", + "openGdbConsole": true } ], "compounds": [ diff --git a/scc b/scc index 0077bb5..8e83712 160000 --- a/scc +++ b/scc @@ -1 +1 @@ -Subproject commit 0077bb5c023f91e958a7576d8be1c6cf8ca9d504 +Subproject commit 8e83712e2461d76deb971378cfb327d787e49102 diff --git a/src/vp/tb.cpp b/src/vp/tb.cpp index 267232a..bccf4e2 100644 --- a/src/vp/tb.cpp +++ b/src/vp/tb.cpp @@ -22,8 +22,10 @@ tb::tb(const sc_core::sc_module_name& nm) top.t0_clear_i(t0_clear_i); top.t0_tick_i(t0_tick_i); top.mspi0(spi()); - top.eth0_tx(top.eth1_rx); - top.eth1_tx(top.eth0_rx); + top.eth0_tx(eth0to1.tsck); + eth0to1.isck(top.eth1_rx); + top.eth1_tx(eth1to0.tsck); + eth1to0.isck(top.eth0_rx); spi(0)(qspi_mem.spi_t); top.clk_i(clk_i); clk_i = 10_ns; diff --git a/src/vp/tb.h b/src/vp/tb.h index aeba73f..96fecf2 100644 --- a/src/vp/tb.h +++ b/src/vp/tb.h @@ -7,6 +7,7 @@ #ifndef SRC_VP_TB_H_ #define SRC_VP_TB_H_ +#include "eth/eth_tlm.h" #include "system.h" #include #include @@ -29,6 +30,7 @@ public: sc_core::sc_vector> t0_clear_i{"t0_clear_i", vpvper::minres::timer::CLEAR_CNT}; sc_core::sc_vector> t0_tick_i{"t0_tick_i", vpvper::minres::timer::TICK_CNT - 1}; spi::spi_channel spi{"spi", 1}; + eth::eth_channel eth0to1{"eth0to1"}, eth1to0{"eth1to0"}; vpvper::generic::spi_mem qspi_mem{"qspi_mem"}; sc_core::sc_signal clk_i{"clk_i"}; }; diff --git a/vpvper b/vpvper index 4957806..0b085c6 160000 --- a/vpvper +++ b/vpvper @@ -1 +1 @@ -Subproject commit 49578065a3b26e1302a6e56769ee3657fd25f961 +Subproject commit 0b085c6bef437b37a310b57810a1f18546587e77