From c3b98c610b63ebb75b023135e392b4f48080f380 Mon Sep 17 00:00:00 2001 From: Himanshu Chauhan Date: Wed, 12 Jul 2023 10:04:27 +0530 Subject: [PATCH] include: sbi: Add macro definitions for mseccfg CSR - Add macros for Machine Security Configuration (mseccfg) CSR - Add macros to access/manipulate bits in msecfg CSR Signed-off-by: Himanshu Chauhan Reviewed-by: Anup Patel --- include/sbi/riscv_encoding.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h index 4ebed97a..50071ad3 100644 --- a/include/sbi/riscv_encoding.h +++ b/include/sbi/riscv_encoding.h @@ -663,6 +663,18 @@ #define CSR_MHPMEVENT30H 0x73e #define CSR_MHPMEVENT31H 0x73f +/* Machine Security Configuration CSR (mseccfg) */ +#define CSR_MSECCFG_LOWER 0x747 +#define CSR_MSECCFG_UPPER 0x757 +#define CSR_MSECCFG (CSR_MSECCFG_LOWER) + +#define MSECCFG_MML_SHIFT (0) +#define MSECCFG_MML (_UL(1) << MSECCFG_MML_SHIFT) +#define MSECCFG_MMWP_SHIFT (1) +#define MSECCFG_MMWP (_UL(1) << MSECCFG_MMWP_SHIFT) +#define MSECCFG_RLB_SHIFT (2) +#define MSECCFG_RLB (_UL(1) << MSECCFG_RLB_SHIFT) + /* Counter Overflow CSR */ #define CSR_SCOUNTOVF 0xda0