diff --git a/firmware/fw_base.S b/firmware/fw_base.S
index ceef44f2..5a3e8948 100644
--- a/firmware/fw_base.S
+++ b/firmware/fw_base.S
@@ -430,13 +430,6 @@ _start_warm:
 
 	/* Disable all interrupts */
 	csrw	CSR_MIE, zero
-	/*
-	 * Only clear the MIP_SSIP and MIP_STIP. For the platform like QEMU,
-	 * If we clear other interrupts like MIP_SEIP and the pendings of
-	 * PLIC still exist, the QEMU may not set it back immediately.
-	 */
-	li	t0, (MIP_SSIP | MIP_STIP)
-	csrc	CSR_MIP, t0
 
 	/* Find HART count and HART stack size */
 	lla	a4, platform
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 5e06918c..6e52cbd7 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -733,6 +733,12 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
 {
 	int rc;
 
+	/*
+	 * Clear mip CSR before proceeding with init to avoid any spurious
+	 * external interrupts in S-mode.
+	 */
+	csr_write(CSR_MIP, 0);
+
 	if (cold_boot) {
 		if (misa_extension('H'))
 			sbi_hart_expected_trap = &__sbi_expected_trap_hext;