/* * Copyright (c) 2023 - 2025 MINRES Technologies GmbH * * SPDX-License-Identifier: Apache-2.0 * * Generated at 2025-02-12 08:56:43 UTC * by peakrdl_mnrs version 1.2.9 */ #ifndef _BSP_SYSCTRL_H #define _BSP_SYSCTRL_H #include typedef struct { volatile uint32_t SYSCTRL; volatile uint32_t PLLCTRL; volatile uint32_t AXI_BACKUP; }sysctrl_t; #define SYSCTRL_SYSCTRL_CC_RESET_OFFS 0 #define SYSCTRL_SYSCTRL_CC_RESET_MASK 0x3 #define SYSCTRL_SYSCTRL_CC_RESET(V) ((V & SYSCTRL_SYSCTRL_CC_RESET_MASK) << SYSCTRL_SYSCTRL_CC_RESET_OFFS) #define SYSCTRL_SYSCTRL_MEM_RESET_OFFS 2 #define SYSCTRL_SYSCTRL_MEM_RESET_MASK 0x1 #define SYSCTRL_SYSCTRL_MEM_RESET(V) ((V & SYSCTRL_SYSCTRL_MEM_RESET_MASK) << SYSCTRL_SYSCTRL_MEM_RESET_OFFS) #define SYSCTRL_PLLCTRL_P_COUNTER_OFFS 0 #define SYSCTRL_PLLCTRL_P_COUNTER_MASK 0x3f #define SYSCTRL_PLLCTRL_P_COUNTER(V) ((V & SYSCTRL_PLLCTRL_P_COUNTER_MASK) << SYSCTRL_PLLCTRL_P_COUNTER_OFFS) #define SYSCTRL_PLLCTRL_S_COUNTER_OFFS 6 #define SYSCTRL_PLLCTRL_S_COUNTER_MASK 0x3 #define SYSCTRL_PLLCTRL_S_COUNTER(V) ((V & SYSCTRL_PLLCTRL_S_COUNTER_MASK) << SYSCTRL_PLLCTRL_S_COUNTER_OFFS) #define SYSCTRL_PLLCTRL_CLK_SEL_OFFS 8 #define SYSCTRL_PLLCTRL_CLK_SEL_MASK 0x3 #define SYSCTRL_PLLCTRL_CLK_SEL(V) ((V & SYSCTRL_PLLCTRL_CLK_SEL_MASK) << SYSCTRL_PLLCTRL_CLK_SEL_OFFS) #define SYSCTRL_PLLCTRL_LOCKED_OFFS 31 #define SYSCTRL_PLLCTRL_LOCKED_MASK 0x1 #define SYSCTRL_PLLCTRL_LOCKED(V) ((V & SYSCTRL_PLLCTRL_LOCKED_MASK) << SYSCTRL_PLLCTRL_LOCKED_OFFS) #define SYSCTRL_AXI_BACKUP_OFFS 0 #define SYSCTRL_AXI_BACKUP_MASK 0xf #define SYSCTRL_AXI_BACKUP(V) ((V & SYSCTRL_AXI_BACKUP_MASK) << SYSCTRL_AXI_BACKUP_OFFS) //SYSCTRL_SYSCTRL inline uint32_t get_sysctrl_sysctrl(volatile sysctrl_t* reg){ return reg->SYSCTRL; } inline void set_sysctrl_sysctrl(volatile sysctrl_t* reg, uint32_t value){ reg->SYSCTRL = value; } inline uint32_t get_sysctrl_sysctrl_cc_reset(volatile sysctrl_t* reg){ return (reg->SYSCTRL >> 0) & 0x3; } inline void set_sysctrl_sysctrl_cc_reset(volatile sysctrl_t* reg, uint8_t value){ reg->SYSCTRL = (reg->SYSCTRL & ~(0x3U << 0)) | (value << 0); } inline uint32_t get_sysctrl_sysctrl_mem_reset(volatile sysctrl_t* reg){ return (reg->SYSCTRL >> 2) & 0x1; } inline void set_sysctrl_sysctrl_mem_reset(volatile sysctrl_t* reg, uint8_t value){ reg->SYSCTRL = (reg->SYSCTRL & ~(0x1U << 2)) | (value << 2); } //SYSCTRL_PLLCTRL inline uint32_t get_sysctrl_pllctrl(volatile sysctrl_t* reg){ return reg->PLLCTRL; } inline void set_sysctrl_pllctrl(volatile sysctrl_t* reg, uint32_t value){ reg->PLLCTRL = value; } inline uint32_t get_sysctrl_pllctrl_p_counter(volatile sysctrl_t* reg){ return (reg->PLLCTRL >> 0) & 0x3f; } inline void set_sysctrl_pllctrl_p_counter(volatile sysctrl_t* reg, uint8_t value){ reg->PLLCTRL = (reg->PLLCTRL & ~(0x3fU << 0)) | (value << 0); } inline uint32_t get_sysctrl_pllctrl_s_counter(volatile sysctrl_t* reg){ return (reg->PLLCTRL >> 6) & 0x3; } inline void set_sysctrl_pllctrl_s_counter(volatile sysctrl_t* reg, uint8_t value){ reg->PLLCTRL = (reg->PLLCTRL & ~(0x3U << 6)) | (value << 6); } inline uint32_t get_sysctrl_pllctrl_clk_sel(volatile sysctrl_t* reg){ return (reg->PLLCTRL >> 8) & 0x3; } inline void set_sysctrl_pllctrl_clk_sel(volatile sysctrl_t* reg, uint8_t value){ reg->PLLCTRL = (reg->PLLCTRL & ~(0x3U << 8)) | (value << 8); } inline uint32_t get_sysctrl_pllctrl_locked(volatile sysctrl_t* reg){ return (reg->PLLCTRL >> 31) & 0x1; } //SYSCTRL_AXI_BACKUP inline uint32_t get_sysctrl_axi_backup(volatile sysctrl_t* reg){ return reg->AXI_BACKUP; } inline void set_sysctrl_axi_backup(volatile sysctrl_t* reg, uint32_t value){ reg->AXI_BACKUP = value; } inline uint32_t get_sysctrl_axi_backup_page(volatile sysctrl_t* reg){ return (reg->AXI_BACKUP >> 0) & 0xf; } inline void set_sysctrl_axi_backup_page(volatile sysctrl_t* reg, uint8_t value){ reg->AXI_BACKUP = (reg->AXI_BACKUP & ~(0xfU << 0)) | (value << 0); } #endif /* _BSP_SYSCTRL_H */