/*
* Copyright (c) 2023 - 2026 MINRES Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Generated at 2026-01-10 12:50:16 UTC 
* by peakrdl_mnrs version 1.2.10
*/

#ifndef _BSP_ETHMAC_H
#define _BSP_ETHMAC_H

#include <stdint.h>

typedef struct {
    volatile uint32_t MAC_CTRL;
    uint8_t fill0[12];
    volatile uint32_t TX_DATA_REG;
    volatile uint32_t TX_AVAIL_REG;
    uint8_t fill1[8];
    volatile uint32_t RX_DATA_REG;
    uint8_t fill2[8];
    volatile uint32_t RX_STAT_REG;
    volatile uint32_t INT_CTRL_REG;
}ethmac_t;

#define ETHMAC_MAC_CTRL_TX_FLUSH_OFFS 0
#define ETHMAC_MAC_CTRL_TX_FLUSH_MASK 0x1
#define ETHMAC_MAC_CTRL_TX_FLUSH(V) ((V & ETHMAC_MAC_CTRL_TX_FLUSH_MASK) << ETHMAC_MAC_CTRL_TX_FLUSH_OFFS)

#define ETHMAC_MAC_CTRL_TX_SPACE_AVAIL_OFFS 1
#define ETHMAC_MAC_CTRL_TX_SPACE_AVAIL_MASK 0x1
#define ETHMAC_MAC_CTRL_TX_SPACE_AVAIL(V) ((V & ETHMAC_MAC_CTRL_TX_SPACE_AVAIL_MASK) << ETHMAC_MAC_CTRL_TX_SPACE_AVAIL_OFFS)

#define ETHMAC_MAC_CTRL_TX_ALIGNER_ENABLE_OFFS 2
#define ETHMAC_MAC_CTRL_TX_ALIGNER_ENABLE_MASK 0x1
#define ETHMAC_MAC_CTRL_TX_ALIGNER_ENABLE(V) ((V & ETHMAC_MAC_CTRL_TX_ALIGNER_ENABLE_MASK) << ETHMAC_MAC_CTRL_TX_ALIGNER_ENABLE_OFFS)

#define ETHMAC_MAC_CTRL_RX_FLUSH_OFFS 4
#define ETHMAC_MAC_CTRL_RX_FLUSH_MASK 0x1
#define ETHMAC_MAC_CTRL_RX_FLUSH(V) ((V & ETHMAC_MAC_CTRL_RX_FLUSH_MASK) << ETHMAC_MAC_CTRL_RX_FLUSH_OFFS)

#define ETHMAC_MAC_CTRL_RX_DATA_AVAIL_OFFS 5
#define ETHMAC_MAC_CTRL_RX_DATA_AVAIL_MASK 0x1
#define ETHMAC_MAC_CTRL_RX_DATA_AVAIL(V) ((V & ETHMAC_MAC_CTRL_RX_DATA_AVAIL_MASK) << ETHMAC_MAC_CTRL_RX_DATA_AVAIL_OFFS)

#define ETHMAC_MAC_CTRL_RX_ALIGNER_ENABLE_OFFS 6
#define ETHMAC_MAC_CTRL_RX_ALIGNER_ENABLE_MASK 0x1
#define ETHMAC_MAC_CTRL_RX_ALIGNER_ENABLE(V) ((V & ETHMAC_MAC_CTRL_RX_ALIGNER_ENABLE_MASK) << ETHMAC_MAC_CTRL_RX_ALIGNER_ENABLE_OFFS)

#define ETHMAC_TX_DATA_REG_OFFS 0
#define ETHMAC_TX_DATA_REG_MASK 0xffffffff
#define ETHMAC_TX_DATA_REG(V) ((V & ETHMAC_TX_DATA_REG_MASK) << ETHMAC_TX_DATA_REG_OFFS)

#define ETHMAC_TX_AVAIL_REG_OFFS 0
#define ETHMAC_TX_AVAIL_REG_MASK 0x1ff
#define ETHMAC_TX_AVAIL_REG(V) ((V & ETHMAC_TX_AVAIL_REG_MASK) << ETHMAC_TX_AVAIL_REG_OFFS)

#define ETHMAC_RX_DATA_REG_OFFS 0
#define ETHMAC_RX_DATA_REG_MASK 0xffffffff
#define ETHMAC_RX_DATA_REG(V) ((V & ETHMAC_RX_DATA_REG_MASK) << ETHMAC_RX_DATA_REG_OFFS)

#define ETHMAC_RX_STAT_REG_RX_ERRORS_OFFS 0
#define ETHMAC_RX_STAT_REG_RX_ERRORS_MASK 0xff
#define ETHMAC_RX_STAT_REG_RX_ERRORS(V) ((V & ETHMAC_RX_STAT_REG_RX_ERRORS_MASK) << ETHMAC_RX_STAT_REG_RX_ERRORS_OFFS)

#define ETHMAC_RX_STAT_REG_RX_DROPS_OFFS 8
#define ETHMAC_RX_STAT_REG_RX_DROPS_MASK 0xff
#define ETHMAC_RX_STAT_REG_RX_DROPS(V) ((V & ETHMAC_RX_STAT_REG_RX_DROPS_MASK) << ETHMAC_RX_STAT_REG_RX_DROPS_OFFS)

#define ETHMAC_INT_CTRL_REG_TX_FREE_INTR_ENABLE_OFFS 0
#define ETHMAC_INT_CTRL_REG_TX_FREE_INTR_ENABLE_MASK 0x1
#define ETHMAC_INT_CTRL_REG_TX_FREE_INTR_ENABLE(V) ((V & ETHMAC_INT_CTRL_REG_TX_FREE_INTR_ENABLE_MASK) << ETHMAC_INT_CTRL_REG_TX_FREE_INTR_ENABLE_OFFS)

#define ETHMAC_INT_CTRL_REG_RX_DATA_AVAIL_INTR_ENABLE_OFFS 1
#define ETHMAC_INT_CTRL_REG_RX_DATA_AVAIL_INTR_ENABLE_MASK 0x1
#define ETHMAC_INT_CTRL_REG_RX_DATA_AVAIL_INTR_ENABLE(V) ((V & ETHMAC_INT_CTRL_REG_RX_DATA_AVAIL_INTR_ENABLE_MASK) << ETHMAC_INT_CTRL_REG_RX_DATA_AVAIL_INTR_ENABLE_OFFS)

//ETHMAC_MAC_CTRL
static inline uint32_t get_ethmac_mac_ctrl(volatile ethmac_t* reg){
     return reg->MAC_CTRL;
}
static inline void set_ethmac_mac_ctrl(volatile ethmac_t* reg, uint32_t value){
     reg->MAC_CTRL = value;
}
static inline uint32_t get_ethmac_mac_ctrl_tx_flush(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 0) & 0x1;
}
static inline void set_ethmac_mac_ctrl_tx_flush(volatile ethmac_t* reg, uint8_t value){
    reg->MAC_CTRL = (reg->MAC_CTRL & ~(0x1U << 0)) | (value << 0);
}
static inline uint32_t get_ethmac_mac_ctrl_tx_space_avail(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 1) & 0x1;
}
static inline uint32_t get_ethmac_mac_ctrl_tx_aligner_enable(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 2) & 0x1;
}
static inline void set_ethmac_mac_ctrl_tx_aligner_enable(volatile ethmac_t* reg, uint8_t value){
    reg->MAC_CTRL = (reg->MAC_CTRL & ~(0x1U << 2)) | (value << 2);
}
static inline uint32_t get_ethmac_mac_ctrl_rx_flush(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 4) & 0x1;
}
static inline void set_ethmac_mac_ctrl_rx_flush(volatile ethmac_t* reg, uint8_t value){
    reg->MAC_CTRL = (reg->MAC_CTRL & ~(0x1U << 4)) | (value << 4);
}
static inline uint32_t get_ethmac_mac_ctrl_rx_data_avail(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 5) & 0x1;
}
static inline uint32_t get_ethmac_mac_ctrl_rx_aligner_enable(volatile ethmac_t* reg){
    return (reg->MAC_CTRL >> 6) & 0x1;
}
static inline void set_ethmac_mac_ctrl_rx_aligner_enable(volatile ethmac_t* reg, uint8_t value){
    reg->MAC_CTRL = (reg->MAC_CTRL & ~(0x1U << 6)) | (value << 6);
}

//ETHMAC_TX_DATA_REG
static inline uint32_t get_ethmac_tx_data_reg(volatile ethmac_t* reg){
    return (reg->TX_DATA_REG >> 0) & 0xffffffff;
}
static inline void set_ethmac_tx_data_reg(volatile ethmac_t* reg, uint32_t value){
    reg->TX_DATA_REG = (reg->TX_DATA_REG & ~(0xffffffffU << 0)) | (value << 0);
}

//ETHMAC_TX_AVAIL_REG
static inline uint32_t get_ethmac_tx_avail_reg(volatile ethmac_t* reg){
     return reg->TX_AVAIL_REG;
}
static inline uint32_t get_ethmac_tx_avail_reg_tx_availibility(volatile ethmac_t* reg){
    return (reg->TX_AVAIL_REG >> 0) & 0x1ff;
}

//ETHMAC_RX_DATA_REG
static inline uint32_t get_ethmac_rx_data_reg(volatile ethmac_t* reg){
    return (reg->RX_DATA_REG >> 0) & 0xffffffff;
}

//ETHMAC_RX_STAT_REG
static inline uint32_t get_ethmac_rx_stat_reg(volatile ethmac_t* reg){
     return reg->RX_STAT_REG;
}
static inline uint32_t get_ethmac_rx_stat_reg_rx_errors(volatile ethmac_t* reg){
    return (reg->RX_STAT_REG >> 0) & 0xff;
}
static inline uint32_t get_ethmac_rx_stat_reg_rx_drops(volatile ethmac_t* reg){
    return (reg->RX_STAT_REG >> 8) & 0xff;
}

//ETHMAC_INT_CTRL_REG
static inline uint32_t get_ethmac_int_ctrl_reg(volatile ethmac_t* reg){
     return reg->INT_CTRL_REG;
}
static inline void set_ethmac_int_ctrl_reg(volatile ethmac_t* reg, uint32_t value){
     reg->INT_CTRL_REG = value;
}
static inline uint32_t get_ethmac_int_ctrl_reg_tx_free_intr_enable(volatile ethmac_t* reg){
    return (reg->INT_CTRL_REG >> 0) & 0x1;
}
static inline void set_ethmac_int_ctrl_reg_tx_free_intr_enable(volatile ethmac_t* reg, uint8_t value){
    reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0);
}
static inline uint32_t get_ethmac_int_ctrl_reg_rx_data_avail_intr_enable(volatile ethmac_t* reg){
    return (reg->INT_CTRL_REG >> 1) & 0x1;
}
static inline void set_ethmac_int_ctrl_reg_rx_data_avail_intr_enable(volatile ethmac_t* reg, uint8_t value){
    reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1);
}

#endif /* _BSP_ETHMAC_H */