#ifndef _BSP_QSPI_H #define _BSP_QSPI_H #include #include "gen/Apb3SpiXdrMasterCtrl.h" #define qspi_t apb3spixdrmasterctrl_t typedef struct { uint32_t cpol; uint32_t cpha; uint32_t mode; uint32_t clkDivider; uint32_t ssSetup; uint32_t ssHold; uint32_t ssDisable; } spi_cfg; #define SPI_CMD_WRITE (1 << 8) #define SPI_CMD_READ (1 << 9) #define SPI_CMD_SS (1 << 11) #define SPI_RSP_VALID (1 << 31) #define SPI_STATUS_CMD_INT_ENABLE = (1 << 0) #define SPI_STATUS_RSP_INT_ENABLE = (1 << 1) #define SPI_STATUS_CMD_INT_FLAG = (1 << 8) #define SPI_STATUS_RSP_INT_FLAG = (1 << 9) static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){ reg->config = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4); reg->clk_divider = config->clkDivider; reg->ss_setup = config->ssSetup; reg->ss_hold = config->ssHold; reg->ss_disable =config->ssDisable; } static inline void spi_init(volatile qspi_t* spi){ spi_cfg spiCfg; spiCfg.cpol = 0; spiCfg.cpha = 0; spiCfg.mode = 0; spiCfg.clkDivider = 2; spiCfg.ssSetup = 2; spiCfg.ssHold = 2; spiCfg.ssDisable = 2; spi_configure(spi, &spiCfg); } static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){ return reg->status & 0xFFFF; } static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){ return reg->status >> 16; } static inline void spi_write(volatile qspi_t* reg, uint8_t data){ while(spi_cmd_avail(reg) == 0); reg->data = data | SPI_CMD_WRITE; } static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){ while(spi_cmd_avail(reg) == 0); reg->data = data | SPI_CMD_READ | SPI_CMD_WRITE; while(spi_rsp_occupied(reg) == 0); return reg->data; } static inline uint8_t spi_read(volatile qspi_t* reg){ while(spi_cmd_avail(reg) == 0); reg->data = SPI_CMD_READ; while(spi_rsp_occupied(reg) == 0); while((reg->data & 0x80000000)==0); return reg->data; } static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){ while(spi_cmd_avail(reg) == 0); reg->data = slaveId | 0x80 | SPI_CMD_SS; } static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){ while(spi_cmd_avail(reg) == 0); reg->data = slaveId | SPI_CMD_SS; } static inline void spi_wait_tx_idle(volatile qspi_t* reg){ while(spi_cmd_avail(reg) < 0x20); } #endif /* _BSP_QSPI_H */