////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
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// modification, are permitted provided that the following conditions are met:
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//    this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright notice,
//    this list of conditions and the following disclaimer in the documentation
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// 3. Neither the name of the copyright holder nor the names of its contributors
//    may be used to endorse or promote products derived from this software
//    without specific prior written permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// POSSIBILITY OF SUCH DAMAGE.
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// Created on: Thu Oct 01 15:45:55 CEST 2020
//             *      spn_regs.h Author: <RDL Generator>
//
////////////////////////////////////////////////////////////////////////////////

#ifndef _SPN_REGS_H_
#define _SPN_REGS_H_

#include <util/bit_field.h>
#include <cstdint>

#define SPN_REG_START               0x00
#define SPN_REG_RET_VAL             0x10
#define SPN_REG_MODE                0x20
#define SPN_REG_INPUT_LENGTH        0x30
#define SPN_REG_INPUT_ADDR          0x40
#define SPN_REG_OUTPUT_ADDR         0x50
#define SPN_REG_NUM_OF_INPUT_BEATS  0x60
#define SPN_REG_NUM_OF_OUTPUT_BEATS 0x70

template<uint32_t BASE_ADDR>
class spn_regs {
public:
    // storage declarations
    BEGIN_BF_DECL(start_t, uint32_t);
        BF_FIELD(start, 0, 1);
    END_BF_DECL() r_start;

    uint32_t r_ret_val;

    uint32_t r_mode;

    uint32_t r_input_length;

    uint32_t r_input_addr;

    uint32_t r_output_addr;

    uint32_t r_num_of_input_beats;

    uint32_t r_num_of_output_beats;

    static inline start_t& start_reg(){
        return *reinterpret_cast<start_t*>(BASE_ADDR+SPN_REG_START);
    }
};

#endif // _SPN_REGS_H_