/* * Copyright (c) 2023 - 2024 MINRES Technologies GmbH * * SPDX-License-Identifier: Apache-2.0 * * Generated at 2024-03-28 11:32:47 UTC * by peakrdl_mnrs version 1.2.4 */ #ifndef _BSP_APB3TIMER_H #define _BSP_APB3TIMER_H #include typedef struct __attribute((__packed__)) { volatile uint32_t PRESCALER; volatile uint32_t T0_CTRL; volatile uint32_t T0_OVERFLOW; volatile uint32_t T0_VALUE; volatile uint32_t T1_CTRL; volatile uint32_t T1_OVERFLOW; volatile uint32_t T1_VALUE; }apb3timer_t; #define TIMER_PRESCALER_OFFS 0 #define TIMER_PRESCALER_MASK 0xffff #define TIMER_PRESCALER(V) ((V & TIMER_PRESCALER_MASK) << TIMER_PRESCALER_OFFS) #define TIMER_T0_CTRL_ENABLE_OFFS 0 #define TIMER_T0_CTRL_ENABLE_MASK 0x7 #define TIMER_T0_CTRL_ENABLE(V) ((V & TIMER_T0_CTRL_ENABLE_MASK) << TIMER_T0_CTRL_ENABLE_OFFS) #define TIMER_T0_CTRL_CLEAR_OFFS 3 #define TIMER_T0_CTRL_CLEAR_MASK 0x3 #define TIMER_T0_CTRL_CLEAR(V) ((V & TIMER_T0_CTRL_CLEAR_MASK) << TIMER_T0_CTRL_CLEAR_OFFS) #define TIMER_T0_OVERFLOW_OFFS 0 #define TIMER_T0_OVERFLOW_MASK 0xffffffff #define TIMER_T0_OVERFLOW(V) ((V & TIMER_T0_OVERFLOW_MASK) << TIMER_T0_OVERFLOW_OFFS) #define TIMER_T0_VALUE_OFFS 0 #define TIMER_T0_VALUE_MASK 0xffffffff #define TIMER_T0_VALUE(V) ((V & TIMER_T0_VALUE_MASK) << TIMER_T0_VALUE_OFFS) #define TIMER_T1_CTRL_ENABLE_OFFS 0 #define TIMER_T1_CTRL_ENABLE_MASK 0x7 #define TIMER_T1_CTRL_ENABLE(V) ((V & TIMER_T1_CTRL_ENABLE_MASK) << TIMER_T1_CTRL_ENABLE_OFFS) #define TIMER_T1_CTRL_CLEAR_OFFS 3 #define TIMER_T1_CTRL_CLEAR_MASK 0x3 #define TIMER_T1_CTRL_CLEAR(V) ((V & TIMER_T1_CTRL_CLEAR_MASK) << TIMER_T1_CTRL_CLEAR_OFFS) #define TIMER_T1_OVERFLOW_OFFS 0 #define TIMER_T1_OVERFLOW_MASK 0xffffffff #define TIMER_T1_OVERFLOW(V) ((V & TIMER_T1_OVERFLOW_MASK) << TIMER_T1_OVERFLOW_OFFS) #define TIMER_T1_VALUE_OFFS 0 #define TIMER_T1_VALUE_MASK 0xffffffff #define TIMER_T1_VALUE(V) ((V & TIMER_T1_VALUE_MASK) << TIMER_T1_VALUE_OFFS) //TIMER_PRESCALER inline uint32_t get_timer_prescaler(volatile apb3timer_t* reg){ return (reg->PRESCALER >> 0) & 0xffff; } inline void set_timer_prescaler(volatile apb3timer_t* reg, uint16_t value){ reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0); } //TIMER_T0_CTRL inline uint32_t get_timer_t0_ctrl(volatile apb3timer_t* reg){ return reg->T0_CTRL; } inline void set_timer_t0_ctrl(volatile apb3timer_t* reg, uint32_t value){ reg->T0_CTRL = value; } inline uint32_t get_timer_t0_ctrl_enable(volatile apb3timer_t* reg){ return (reg->T0_CTRL >> 0) & 0x7; } inline void set_timer_t0_ctrl_enable(volatile apb3timer_t* reg, uint8_t value){ reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0); } inline uint32_t get_timer_t0_ctrl_clear(volatile apb3timer_t* reg){ return (reg->T0_CTRL >> 3) & 0x3; } inline void set_timer_t0_ctrl_clear(volatile apb3timer_t* reg, uint8_t value){ reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3); } //TIMER_T0_OVERFLOW inline uint32_t get_timer_t0_overflow(volatile apb3timer_t* reg){ return (reg->T0_OVERFLOW >> 0) & 0xffffffff; } inline void set_timer_t0_overflow(volatile apb3timer_t* reg, uint32_t value){ reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); } //TIMER_T0_VALUE inline uint32_t get_timer_t0_value(volatile apb3timer_t* reg){ return (reg->T0_VALUE >> 0) & 0xffffffff; } //TIMER_T1_CTRL inline uint32_t get_timer_t1_ctrl(volatile apb3timer_t* reg){ return reg->T1_CTRL; } inline void set_timer_t1_ctrl(volatile apb3timer_t* reg, uint32_t value){ reg->T1_CTRL = value; } inline uint32_t get_timer_t1_ctrl_enable(volatile apb3timer_t* reg){ return (reg->T1_CTRL >> 0) & 0x7; } inline void set_timer_t1_ctrl_enable(volatile apb3timer_t* reg, uint8_t value){ reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0); } inline uint32_t get_timer_t1_ctrl_clear(volatile apb3timer_t* reg){ return (reg->T1_CTRL >> 3) & 0x3; } inline void set_timer_t1_ctrl_clear(volatile apb3timer_t* reg, uint8_t value){ reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3); } //TIMER_T1_OVERFLOW inline uint32_t get_timer_t1_overflow(volatile apb3timer_t* reg){ return (reg->T1_OVERFLOW >> 0) & 0xffffffff; } inline void set_timer_t1_overflow(volatile apb3timer_t* reg, uint32_t value){ reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); } //TIMER_T1_VALUE inline uint32_t get_timer_t1_value(volatile apb3timer_t* reg){ return (reg->T1_VALUE >> 0) & 0xffffffff; } #endif /* _BSP_APB3TIMER_H */