From be32d2467c30d35999c856e11285fd0667169caf Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 14 Dec 2025 13:36:11 +0100 Subject: [PATCH] adds all defined aclint regs --- include/minres/devices/gen/aclint.h | 74 +++++++++++++++++++---------- 1 file changed, 48 insertions(+), 26 deletions(-) diff --git a/include/minres/devices/gen/aclint.h b/include/minres/devices/gen/aclint.h index e2430c1..3aba19b 100644 --- a/include/minres/devices/gen/aclint.h +++ b/include/minres/devices/gen/aclint.h @@ -13,26 +13,26 @@ #include typedef struct { - volatile uint32_t MSIP0; - uint8_t fill0[16380]; - volatile uint32_t MTIMECMP0LO; - volatile uint32_t MTIMECMP0HI; - uint8_t fill1[32752]; - volatile uint32_t MTIME_LO; - volatile uint32_t MTIME_HI; + volatile uint32_t MSIP[4096]; + struct { + volatile uint32_t LO; + volatile uint32_t HI; + } MTIMECMP[4096]; + volatile uint32_t MTIME_LO; + volatile uint32_t MTIME_HI; } aclint_t; -#define ACLINT_MSIP0_OFFS 0 -#define ACLINT_MSIP0_MASK 0x1 -#define ACLINT_MSIP0(V) ((V & ACLINT_MSIP0_MASK) << ACLINT_MSIP0_OFFS) +#define ACLINT_MSIP_OFFS 0 +#define ACLINT_MSIP_MASK 0x1 +#define ACLINT_MSIP(V) ((V & ACLINT_MSIP0_MASK) << ACLINT_MSIP0_OFFS) -#define ACLINT_MTIMECMP0LO_OFFS 0 -#define ACLINT_MTIMECMP0LO_MASK 0xffffffff -#define ACLINT_MTIMECMP0LO(V) ((V & ACLINT_MTIMECMP0LO_MASK) << ACLINT_MTIMECMP0LO_OFFS) +#define ACLINT_MTIMECMPLO_OFFS 0 +#define ACLINT_MTIMECMPLO_MASK 0xffffffff +#define ACLINT_MTIMECMPLO(V) ((V & ACLINT_MTIMECMP0LO_MASK) << ACLINT_MTIMECMP0LO_OFFS) -#define ACLINT_MTIMECMP0HI_OFFS 0 -#define ACLINT_MTIMECMP0HI_MASK 0xffffffff -#define ACLINT_MTIMECMP0HI(V) ((V & ACLINT_MTIMECMP0HI_MASK) << ACLINT_MTIMECMP0HI_OFFS) +#define ACLINT_MTIMECMPHI_OFFS 0 +#define ACLINT_MTIMECMPHI_MASK 0xffffffff +#define ACLINT_MTIMECMPHI(V) ((V & ACLINT_MTIMECMP0HI_MASK) << ACLINT_MTIMECMP0HI_OFFS) #define ACLINT_MTIME_LO_OFFS 0 #define ACLINT_MTIME_LO_MASK 0xffffffff @@ -43,33 +43,55 @@ typedef struct { #define ACLINT_MTIME_HI(V) ((V & ACLINT_MTIME_HI_MASK) << ACLINT_MTIME_HI_OFFS) // ACLINT_MSIP0 -static inline uint32_t get_aclint_msip0(volatile aclint_t* reg) { return reg->MSIP0; } -static inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value) { reg->MSIP0 = value; } -static inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg) { return (reg->MSIP0 >> 0) & 0x1; } -static inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value) { reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0); } +static inline uint32_t get_aclint_msip0(volatile aclint_t* reg) { return reg->MSIP[0]; } +static inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value) { reg->MSIP[0] = value; } +static inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg) { return (reg->MSIP[0] >> 0) & 0x1; } +static inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value) { + reg->MSIP[0] = (reg->MSIP[0] & ~(0x1U << 0)) | (value << 0); +} + +// ACLINT_MSIP +static inline uint32_t get_aclint_msip(volatile aclint_t* reg, unsigned idx) { return reg->MSIP[idx]; } +static inline void set_aclint_msip(volatile aclint_t* reg, unsigned idx, uint32_t value) { reg->MSIP[idx] = value; } +static inline uint32_t get_aclint_msip_msip(volatile aclint_t* reg, unsigned idx) { return (reg->MSIP[idx] >> 0) & 0x1; } +static inline void set_aclint_msip_msip(volatile aclint_t* reg, unsigned idx, uint8_t value) { + reg->MSIP[idx] = (reg->MSIP[idx] & ~(0x1U << 0)) | (value << 0); +} // ACLINT_MTIMECMP0LO -static inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg) { return (reg->MTIMECMP0LO >> 0) & 0xffffffff; } +static inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg) { return (reg->MTIMECMP[0].LO >> 0) & 0xffffffff; } static inline void set_aclint_mtimecmp0lo(volatile aclint_t* reg, uint32_t value) { - reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0); + reg->MTIMECMP[0].LO = (reg->MTIMECMP[0].LO & ~(0xffffffffU << 0)) | (value << 0); +} + +// ACLINT_MTIMECMPxLO +static inline uint32_t get_aclint_mtimecmplo(volatile aclint_t* reg, unsigned idx) { return (reg->MTIMECMP[idx].LO >> 0) & 0xffffffff; } +static inline void set_aclint_mtimecmplo(volatile aclint_t* reg, unsigned idx, uint32_t value) { + reg->MTIMECMP[idx].LO = (reg->MTIMECMP[idx].LO & ~(0xffffffffU << 0)) | (value << 0); } // ACLINT_MTIMECMP0HI -static inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg) { return (reg->MTIMECMP0HI >> 0) & 0xffffffff; } +static inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg) { return (reg->MTIMECMP[0].HI >> 0) & 0xffffffff; } static inline void set_aclint_mtimecmp0hi(volatile aclint_t* reg, uint32_t value) { - reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0); + reg->MTIMECMP[0].HI = (reg->MTIMECMP[0].HI & ~(0xffffffffU << 0)) | (value << 0); +} + +// ACLINT_MTIMECMPxHI +static inline uint32_t get_aclint_mtimecmphi(volatile aclint_t* reg, unsigned idx) { return (reg->MTIMECMP[idx].HI >> 0) & 0xffffffff; } +static inline void set_aclint_mtimecmphi(volatile aclint_t* reg, unsigned idx, uint32_t value) { + reg->MTIMECMP[idx].HI = (reg->MTIMECMP[idx].HI & ~(0xffffffffU << 0)) | (value << 0); } // ACLINT_MTIME_LO static inline uint32_t get_aclint_mtime_lo(volatile aclint_t* reg) { return (reg->MTIME_LO >> 0) & 0xffffffff; } static inline void set_aclint_mtime_lo(volatile aclint_t* reg, uint32_t value) { - reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0); + reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0); } // ACLINT_MTIME_HI static inline uint32_t get_aclint_mtime_hi(volatile aclint_t* reg) { return (reg->MTIME_HI >> 0) & 0xffffffff; } static inline void set_aclint_mtime_hi(volatile aclint_t* reg, uint32_t value) { - reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0); + reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0); } #endif /* _BSP_ACLINT_H */