diff --git a/env/ehrenberg/platform.h b/env/ehrenberg/platform.h
index ebeac23..1e75e23 100644
--- a/env/ehrenberg/platform.h
+++ b/env/ehrenberg/platform.h
@@ -38,6 +38,7 @@
 
 
 #define XIP_START_LOC 0xE0040000
+#define RAM_START_LOC 0x80000000
 
 // Misc
 
diff --git a/env/encoding.h b/env/encoding.h
index 615348b..35e0f9f 100644
--- a/env/encoding.h
+++ b/env/encoding.h
@@ -166,36 +166,36 @@
 
 #ifdef __GNUC__
 
-#define read_csr(reg) { unsigned long __tmp; \
+#define read_csr(reg) ({ unsigned long __tmp; \
   asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
-  __tmp; }
+  __tmp; })
 
-#define write_csr(reg, val) { \
+#define write_csr(reg, val) ({ \
   if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
     asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
   else \
-    asm volatile ("csrw " #reg ", %0" :: "r"(val)); }
+    asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
 
-#define swap_csr(reg, val) { unsigned long __tmp; \
+#define swap_csr(reg, val) ({ unsigned long __tmp; \
   if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
     asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
   else \
     asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
-  __tmp; }
+  __tmp; })
 
-#define set_csr(reg, bit) { unsigned long __tmp; \
+#define set_csr(reg, bit) ({ unsigned long __tmp; \
   if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
     asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
   else \
     asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; }
+  __tmp; })
 
-#define clear_csr(reg, bit) { unsigned long __tmp; \
+#define clear_csr(reg, bit) ({ unsigned long __tmp; \
   if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
     asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
   else \
     asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
-  __tmp; }
+  __tmp; })
 
 #define rdtime() read_csr(time)
 #define rdcycle() read_csr(cycle)
diff --git a/include/ehrenberg/devices/qspi.h b/include/ehrenberg/devices/qspi.h
index 61a4003..8361b77 100644
--- a/include/ehrenberg/devices/qspi.h
+++ b/include/ehrenberg/devices/qspi.h
@@ -26,12 +26,12 @@ typedef struct {
 #define SPI_STATUS_CMD_INT_FLAG = (1 << 8)
 #define SPI_STATUS_RSP_INT_FLAG = (1 << 9)
 
-static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){
-    set_apb3spi_config(reg, (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4));
-    set_apb3spi_sclk_config(reg, config->clkDivider);
-    set_apb3spi_ssgen_setup(reg, config->ssSetup);
-    set_apb3spi_ssgen_hold(reg, config->ssHold);
-    set_apb3spi_ssgen_disable(reg, config->ssDisable);
+static inline void spi_configure(volatile qspi_t* qspi, spi_cfg *config){
+    set_apb3spi_config(qspi, (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4));
+    set_apb3spi_sclk_config(qspi, config->clkDivider);
+    set_apb3spi_ssgen_setup(qspi, config->ssSetup);
+    set_apb3spi_ssgen_hold(qspi, config->ssHold);
+    set_apb3spi_ssgen_disable(qspi, config->ssDisable);
 }
 
 static inline void spi_init(volatile qspi_t* spi){
@@ -46,45 +46,37 @@ static inline void spi_init(volatile qspi_t* spi){
     spi_configure(spi, &spiCfg);
 }
 
-static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){
-    return reg->STATUS & 0xFFFF;
+static inline uint32_t spi_cmd_avail(volatile qspi_t* qspi){
+    return qspi->STATUS & 0xFFFF;
 }
-static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){
-    return reg->STATUS >> 16;
+static inline uint32_t spi_rsp_occupied(volatile qspi_t* qspi){
+    return qspi->STATUS >> 16;
 }
 
-static inline void spi_write(volatile qspi_t* reg, uint8_t data){
-    while(spi_cmd_avail(reg) == 0);
-    reg->DATA = data | SPI_CMD_WRITE;
+static inline void spi_write(volatile qspi_t* qspi, uint8_t data){
+    while(spi_cmd_avail(qspi) == 0);
+    qspi->DATA = data | SPI_CMD_WRITE;
 }
 
-static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){
-    while(spi_cmd_avail(reg) == 0);
-    reg->DATA = data | SPI_CMD_READ | SPI_CMD_WRITE;
-    while(spi_rsp_occupied(reg) == 0);
-    return reg->DATA;
+static inline uint8_t spi_read(volatile qspi_t* qspi){
+    while(spi_cmd_avail(qspi) == 0);
+    qspi->DATA = SPI_CMD_READ;
+    while(spi_rsp_occupied(qspi) == 0);
+    while((qspi->DATA & 0x80000000)==0);
+    return qspi->DATA;
 }
 
-
-static inline uint8_t spi_read(volatile qspi_t* reg){
-    while(spi_cmd_avail(reg) == 0);
-    reg->DATA = SPI_CMD_READ;
-    while(spi_rsp_occupied(reg) == 0);
-    while((reg->DATA & 0x80000000)==0);
-    return reg->DATA;
+static inline void spi_select(volatile qspi_t* qspi, uint32_t slaveId){
+    while(spi_cmd_avail(qspi) == 0);
+    qspi->DATA = slaveId | 0x80 | SPI_CMD_SS;
 }
 
-static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){
-    while(spi_cmd_avail(reg) == 0);
-    reg->DATA = slaveId | 0x80 | SPI_CMD_SS;
+static inline void spi_deselect(volatile qspi_t* qspi, uint32_t slaveId){
+    while(spi_cmd_avail(qspi) == 0);
+    qspi->DATA = slaveId | SPI_CMD_SS;
 }
 
-static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){
-    while(spi_cmd_avail(reg) == 0);
-    reg->DATA = slaveId | SPI_CMD_SS;
-}
-
-static inline void spi_wait_tx_idle(volatile qspi_t* reg){
-    while(spi_cmd_avail(reg) < 0x20);
+static inline void spi_wait_tx_idle(volatile qspi_t* qspi){
+    while(spi_cmd_avail(qspi) < 0x20);
 }
 #endif /* _DEVICES_QSPI_H */