From 4d25972e4dd8f0053cc4fbd88be1b85f4b869cae Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Wed, 20 Mar 2024 12:53:12 +0100 Subject: [PATCH] fixes TGCP environment --- env/TGCP/init.c | 7 ++++--- env/TGCP/platform.h | 13 ++++++++++++- libwrap/sys/write.c | 2 -- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/env/TGCP/init.c b/env/TGCP/init.c index 2edaefb..a92c692 100644 --- a/env/TGCP/init.c +++ b/env/TGCP/init.c @@ -110,12 +110,13 @@ void _fini() } int is_uart_ready(int uart_id){ - return 1; + return !UART0_REG(UART_REG_TXFIFO) & 0x80000000; } int try_write_uart_char(int uart_id, char c){ - *((char*)0x10000000) = c; + if(UART0_REG(UART_REG_TXFIFO) & 0x80000000) return 0; + UART0_REG(UART_REG_TXFIFO) = c; return 1; } void write_uart_char(int uart_id, char c){ - *((char*)0x10000000) = c; + UART0_REG(UART_REG_TXFIFO) = c; } diff --git a/env/TGCP/platform.h b/env/TGCP/platform.h index 7dbb739..6e39d89 100644 --- a/env/TGCP/platform.h +++ b/env/TGCP/platform.h @@ -7,7 +7,18 @@ #define MCAUSE_INT 0x80000000 #define MCAUSE_CAUSE 0x7FFFFFFF -#include "bits.h" +#define UART0_BASE_ADDR 0xffff0000ULL + +#define UART_REG_TXFIFO 0x00 +#define UART_REG_RXFIFO 0x04 +#define UART_REG_TXCTRL 0x08 +#define UART_REG_RXCTRL 0x0c +#define UART_REG_IE 0x10 +#define UART_REG_IP 0x14 +#define UART_REG_DIV 0x18 +#define UART_TXEN 0x1 + +#define UART0_REG(ADDR) *((volatile uint32_t*) (UART0_BASE_ADDR + ADDR)) /**************************************************************************** * Platform definitions *****************************************************************************/ diff --git a/libwrap/sys/write.c b/libwrap/sys/write.c index a2be4aa..81cb7d6 100644 --- a/libwrap/sys/write.c +++ b/libwrap/sys/write.c @@ -22,8 +22,6 @@ ssize_t __wrap_write(int fd, const void* ptr, size_t len) } #elif defined(BOARD_iss) *((uint32_t*) 0xFFFF0000) = current[jj]; -#elif defined(BOARD_TGCP) - //TODO: implement #else while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ; UART0_REG(UART_REG_TXFIFO) = current[jj];