From 442384574b57d7646e50332eb7296f94782b8aa5 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Wed, 29 May 2024 20:50:30 +0200 Subject: [PATCH] Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP.git into develop --- include/ehrenberg/devices/aclint.h | 4 +- include/ehrenberg/devices/gen/AClintModule.h | 63 +++++ include/ehrenberg/devices/gen/Apb3AClint.h | 53 ---- include/ehrenberg/devices/gen/Apb3SpiModule.h | 241 ++++++++++++++++++ .../devices/gen/Apb3SpiXdrMasterCtrl.h | 214 ---------------- include/ehrenberg/devices/gen/Apb3Timer.h | 73 ------ include/ehrenberg/devices/gen/Apb3Uart.h | 104 -------- .../devices/gen/{Apb3Gpio.h => GpioModule.h} | 25 +- include/ehrenberg/devices/gen/I2SModule.h | 142 +++++++++++ .../ehrenberg/devices/gen/SimpleDmaModule.h | 120 +++++++++ include/ehrenberg/devices/gen/TimerModule.h | 89 +++++++ include/ehrenberg/devices/gen/UartModule.h | 143 +++++++++++ include/ehrenberg/devices/gpio.h | 4 +- include/ehrenberg/devices/qspi.h | 4 +- include/ehrenberg/devices/timer.h | 8 +- include/ehrenberg/devices/uart.h | 4 +- 16 files changed, 826 insertions(+), 465 deletions(-) create mode 100644 include/ehrenberg/devices/gen/AClintModule.h delete mode 100644 include/ehrenberg/devices/gen/Apb3AClint.h create mode 100644 include/ehrenberg/devices/gen/Apb3SpiModule.h delete mode 100644 include/ehrenberg/devices/gen/Apb3SpiXdrMasterCtrl.h delete mode 100644 include/ehrenberg/devices/gen/Apb3Timer.h delete mode 100644 include/ehrenberg/devices/gen/Apb3Uart.h rename include/ehrenberg/devices/gen/{Apb3Gpio.h => GpioModule.h} (51%) create mode 100644 include/ehrenberg/devices/gen/I2SModule.h create mode 100644 include/ehrenberg/devices/gen/SimpleDmaModule.h create mode 100644 include/ehrenberg/devices/gen/TimerModule.h create mode 100644 include/ehrenberg/devices/gen/UartModule.h diff --git a/include/ehrenberg/devices/aclint.h b/include/ehrenberg/devices/aclint.h index bc53b41..d8061de 100644 --- a/include/ehrenberg/devices/aclint.h +++ b/include/ehrenberg/devices/aclint.h @@ -2,7 +2,7 @@ #define _BSP_ACLINT_H #include -#include "gen/Apb3AClint.h" +#include "gen/AClintModule.h" #define aclint_t apb3aclint_t @@ -26,4 +26,4 @@ static uint64_t get_aclint_mtimecmp(volatile aclint_t* reg){ return value; } -#endif /* _BSP_ACLINT_H */ \ No newline at end of file +#endif /* _BSP_ACLINT_H */ diff --git a/include/ehrenberg/devices/gen/AClintModule.h b/include/ehrenberg/devices/gen/AClintModule.h new file mode 100644 index 0000000..60ff808 --- /dev/null +++ b/include/ehrenberg/devices/gen/AClintModule.h @@ -0,0 +1,63 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_ACLINTMODULE_H +#define _BSP_ACLINTMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t MSIP0; + volatile uint32_t MTIMECMP0LO; + volatile uint32_t MTIMECMP0HI; + volatile uint32_t MTIME_LO; + volatile uint32_t MTIME_HI; +}aclintmodule_t; + +static inline uint32_t get_aclintmodule_msip(volatile aclintmodule_t *reg){ + return (reg->MSIP0 >> 0) & 0x1; +} + +static inline void set_aclintmodule_msip(volatile aclintmodule_t *reg, uint8_t value){ + reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_aclintmodule_mtimecmp_lo(volatile aclintmodule_t *reg){ + return (reg->MTIMECMP0LO >> 0) & 0xffffffff; +} + +static inline void set_aclintmodule_mtimecmp_lo(volatile aclintmodule_t *reg, uint32_t value){ + reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_aclintmodule_mtimecmp_hi(volatile aclintmodule_t *reg){ + return (reg->MTIMECMP0HI >> 0) & 0xffffffff; +} + +static inline void set_aclintmodule_mtimecmp_hi(volatile aclintmodule_t *reg, uint32_t value){ + reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_aclintmodule_mtime_ho(volatile aclintmodule_t *reg){ + return (reg->MTIME_LO >> 0) & 0xffffffff; +} + +static inline void set_aclintmodule_mtime_ho(volatile aclintmodule_t *reg, uint32_t value){ + reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_aclintmodule_mtime_hi(volatile aclintmodule_t *reg){ + return (reg->MTIME_HI >> 0) & 0xffffffff; +} + +static inline void set_aclintmodule_mtime_hi(volatile aclintmodule_t *reg, uint32_t value){ + reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0); +} + +#endif /* _BSP_ACLINTMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/Apb3AClint.h b/include/ehrenberg/devices/gen/Apb3AClint.h deleted file mode 100644 index f9fd1d4..0000000 --- a/include/ehrenberg/devices/gen/Apb3AClint.h +++ /dev/null @@ -1,53 +0,0 @@ -/* -* Copyright (c) 2023 - 2024 MINRES Technologies GmbH -* -* SPDX-License-Identifier: Apache-2.0 -* -* Generated at 2024-02-19 14:24:37 UTC -* by peakrdl_mnrs version 1.2.2 -*/ - -#ifndef _BSP_APB3ACLINT_H -#define _BSP_APB3ACLINT_H - -#include - -typedef struct __attribute((__packed__)) { - volatile uint32_t MSIP0; - volatile uint32_t MTIMECMP0LO; - volatile uint32_t MTIMECMP0HI; - volatile uint32_t MTIME_LO; - volatile uint32_t MTIME_HI; -}apb3aclint_t; - -inline uint32_t get_aclint_msip0(volatile apb3aclint_t *reg){ - return (reg->MSIP0 >> 0) & 0x1; -} -inline void set_aclint_msip0(volatile apb3aclint_t *reg, uint8_t value){ - reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0); -} -inline uint32_t get_aclint_mtimecmp0lo(volatile apb3aclint_t *reg){ - return (reg->MTIMECMP0LO >> 0) & 0xffffffff; -} -inline void set_aclint_mtimecmp0lo(volatile apb3aclint_t *reg, uint32_t value){ - reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0); -} -inline uint32_t get_aclint_mtimecmp0hi(volatile apb3aclint_t *reg){ - return (reg->MTIMECMP0HI >> 0) & 0xffffffff; -} -inline void set_aclint_mtimecmp0hi(volatile apb3aclint_t *reg, uint32_t value){ - reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0); -} -inline uint32_t get_aclint_mtime_lo(volatile apb3aclint_t *reg){ - return (reg->MTIME_LO >> 0) & 0xffffffff; -} -inline void set_aclint_mtime_lo(volatile apb3aclint_t *reg, uint32_t value){ - reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0); -} -inline uint32_t get_aclint_mtime_hi(volatile apb3aclint_t *reg){ - return (reg->MTIME_HI >> 0) & 0xffffffff; -} -inline void set_aclint_mtime_hi(volatile apb3aclint_t *reg, uint32_t value){ - reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0); -} -#endif /* _BSP_APB3ACLINT_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/Apb3SpiModule.h b/include/ehrenberg/devices/gen/Apb3SpiModule.h new file mode 100644 index 0000000..922e04c --- /dev/null +++ b/include/ehrenberg/devices/gen/Apb3SpiModule.h @@ -0,0 +1,241 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_APB3SPIMODULE_H +#define _BSP_APB3SPIMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t DATA; + volatile uint32_t STATUS; + volatile uint32_t CONFIG; + volatile uint32_t INTR; + volatile uint32_t SCLK_CONFIG; + volatile uint32_t SSGEN_SETUP; + volatile uint32_t SSGEN_HOLD; + volatile uint32_t SSGEN_DISABLE; + volatile uint32_t SSGEN_ACTIVE_HIGH; + volatile uint32_t XIP_ENABLE; + volatile uint32_t XIP_CONFIG; + volatile uint32_t XIP_MODE; + volatile uint32_t XIP_WRITE; + volatile uint32_t XIP_READ_WRITE; + volatile uint32_t XIP_READ; +}apb3spimodule_t; + +static inline void set_apb3spimodule_data(volatile apb3spimodule_t *reg, uint8_t value){ + reg->DATA = (reg->DATA & ~(0xffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_write(volatile apb3spimodule_t *reg){ + return (reg->DATA >> 8) & 0x1; +} + +static inline void set_apb3spimodule_write(volatile apb3spimodule_t *reg, uint8_t value){ + reg->DATA = (reg->DATA & ~(0x1U << 8)) | (value << 8); +} + +static inline uint32_t get_apb3spimodule_read(volatile apb3spimodule_t *reg){ + return (reg->DATA >> 9) & 0x1; +} + +static inline void set_apb3spimodule_read(volatile apb3spimodule_t *reg, uint8_t value){ + reg->DATA = (reg->DATA & ~(0x1U << 9)) | (value << 9); +} + +static inline uint32_t get_apb3spimodule_kind(volatile apb3spimodule_t *reg){ + return (reg->DATA >> 11) & 0x1; +} + +static inline void set_apb3spimodule_kind(volatile apb3spimodule_t *reg, uint8_t value){ + reg->DATA = (reg->DATA & ~(0x1U << 11)) | (value << 11); +} + +static inline uint32_t get_apb3spimodule_rx_data_invalid(volatile apb3spimodule_t *reg){ + return (reg->DATA >> 31) & 0x1; +} + +static inline uint32_t get_apb3spimodule_tx_free(volatile apb3spimodule_t *reg){ + return (reg->STATUS >> 0) & 0x3f; +} + +static inline uint32_t get_apb3spimodule_rx_avail(volatile apb3spimodule_t *reg){ + return (reg->STATUS >> 16) & 0x3f; +} + +static inline uint32_t get_apb3spimodule_kind(volatile apb3spimodule_t *reg){ + return (reg->CONFIG >> 0) & 0x3; +} + +static inline void set_apb3spimodule_kind(volatile apb3spimodule_t *reg, uint8_t value){ + reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_mode(volatile apb3spimodule_t *reg){ + return (reg->CONFIG >> 4) & 0x3; +} + +static inline void set_apb3spimodule_mode(volatile apb3spimodule_t *reg, uint8_t value){ + reg->CONFIG = (reg->CONFIG & ~(0x3U << 4)) | (value << 4); +} + +static inline uint32_t get_apb3spimodule_tx_ie(volatile apb3spimodule_t *reg){ + return (reg->INTR >> 0) & 0x1; +} + +static inline void set_apb3spimodule_tx_ie(volatile apb3spimodule_t *reg, uint8_t value){ + reg->INTR = (reg->INTR & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_rx_ie(volatile apb3spimodule_t *reg){ + return (reg->INTR >> 1) & 0x1; +} + +static inline void set_apb3spimodule_rx_ie(volatile apb3spimodule_t *reg, uint8_t value){ + reg->INTR = (reg->INTR & ~(0x1U << 1)) | (value << 1); +} + +static inline uint32_t get_apb3spimodule_tx_ip(volatile apb3spimodule_t *reg){ + return (reg->INTR >> 8) & 0x1; +} + +static inline uint32_t get_apb3spimodule_rx_ip(volatile apb3spimodule_t *reg){ + return (reg->INTR >> 9) & 0x1; +} + +static inline uint32_t get_apb3spimodule_tx_active(volatile apb3spimodule_t *reg){ + return (reg->INTR >> 16) & 0x1; +} + +static inline uint32_t get_apb3spimodule_clk_divider(volatile apb3spimodule_t *reg){ + return (reg->SCLK_CONFIG >> 0) & 0xfff; +} + +static inline void set_apb3spimodule_clk_divider(volatile apb3spimodule_t *reg, uint16_t value){ + reg->SCLK_CONFIG = (reg->SCLK_CONFIG & ~(0xfffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_setup_cycles(volatile apb3spimodule_t *reg){ + return (reg->SSGEN_SETUP >> 0) & 0xfff; +} + +static inline void set_apb3spimodule_setup_cycles(volatile apb3spimodule_t *reg, uint16_t value){ + reg->SSGEN_SETUP = (reg->SSGEN_SETUP & ~(0xfffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_hold_cycles(volatile apb3spimodule_t *reg){ + return (reg->SSGEN_HOLD >> 0) & 0xfff; +} + +static inline void set_apb3spimodule_hold_cycles(volatile apb3spimodule_t *reg, uint16_t value){ + reg->SSGEN_HOLD = (reg->SSGEN_HOLD & ~(0xfffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_disable_cycles(volatile apb3spimodule_t *reg){ + return (reg->SSGEN_DISABLE >> 0) & 0xfff; +} + +static inline void set_apb3spimodule_disable_cycles(volatile apb3spimodule_t *reg, uint16_t value){ + reg->SSGEN_DISABLE = (reg->SSGEN_DISABLE & ~(0xfffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_high_cycles(volatile apb3spimodule_t *reg){ + return (reg->SSGEN_ACTIVE_HIGH >> 0) & 0x1; +} + +static inline void set_apb3spimodule_high_cycles(volatile apb3spimodule_t *reg, uint8_t value){ + reg->SSGEN_ACTIVE_HIGH = (reg->SSGEN_ACTIVE_HIGH & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_enable(volatile apb3spimodule_t *reg){ + return (reg->XIP_ENABLE >> 0) & 0x1; +} + +static inline void set_apb3spimodule_enable(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_ENABLE = (reg->XIP_ENABLE & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_instruction(volatile apb3spimodule_t *reg){ + return (reg->XIP_CONFIG >> 0) & 0xff; +} + +static inline void set_apb3spimodule_instruction(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_enable(volatile apb3spimodule_t *reg){ + return (reg->XIP_CONFIG >> 8) & 0x1; +} + +static inline void set_apb3spimodule_enable(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0x1U << 8)) | (value << 8); +} + +static inline uint32_t get_apb3spimodule_dummy_value(volatile apb3spimodule_t *reg){ + return (reg->XIP_CONFIG >> 16) & 0xff; +} + +static inline void set_apb3spimodule_dummy_value(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 16)) | (value << 16); +} + +static inline uint32_t get_apb3spimodule_dummy_count(volatile apb3spimodule_t *reg){ + return (reg->XIP_CONFIG >> 24) & 0xf; +} + +static inline void set_apb3spimodule_dummy_count(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xfU << 24)) | (value << 24); +} + +static inline uint32_t get_apb3spimodule_instruction(volatile apb3spimodule_t *reg){ + return (reg->XIP_MODE >> 0) & 0x3; +} + +static inline void set_apb3spimodule_instruction(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_address(volatile apb3spimodule_t *reg){ + return (reg->XIP_MODE >> 8) & 0x3; +} + +static inline void set_apb3spimodule_address(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 8)) | (value << 8); +} + +static inline uint32_t get_apb3spimodule_dummy(volatile apb3spimodule_t *reg){ + return (reg->XIP_MODE >> 16) & 0x3; +} + +static inline void set_apb3spimodule_dummy(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 16)) | (value << 16); +} + +static inline uint32_t get_apb3spimodule_payload(volatile apb3spimodule_t *reg){ + return (reg->XIP_MODE >> 24) & 0x3; +} + +static inline void set_apb3spimodule_payload(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 24)) | (value << 24); +} + +static inline void set_apb3spimodule_data(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_WRITE = (reg->XIP_WRITE & ~(0xffU << 0)) | (value << 0); +} + +static inline void set_apb3spimodule_data(volatile apb3spimodule_t *reg, uint8_t value){ + reg->XIP_READ_WRITE = (reg->XIP_READ_WRITE & ~(0xffU << 0)) | (value << 0); +} + +static inline uint32_t get_apb3spimodule_data(volatile apb3spimodule_t *reg){ + return (reg->XIP_READ >> 0) & 0xff; +} + +#endif /* _BSP_APB3SPIMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/Apb3SpiXdrMasterCtrl.h b/include/ehrenberg/devices/gen/Apb3SpiXdrMasterCtrl.h deleted file mode 100644 index 7d7a927..0000000 --- a/include/ehrenberg/devices/gen/Apb3SpiXdrMasterCtrl.h +++ /dev/null @@ -1,214 +0,0 @@ -/* -* Copyright (c) 2023 - 2024 MINRES Technologies GmbH -* -* SPDX-License-Identifier: Apache-2.0 -* -* Generated at 2024-02-19 14:24:37 UTC -* by peakrdl_mnrs version 1.2.2 -*/ - -#ifndef _BSP_APB3SPIXDRMASTERCTRL_H -#define _BSP_APB3SPIXDRMASTERCTRL_H - -#include - -typedef struct __attribute((__packed__)) { - volatile uint32_t DATA; - volatile uint32_t STATUS; - volatile uint32_t CONFIG; - volatile uint32_t INTR; - uint32_t fill0[4]; - volatile uint32_t SCLK_CONFIG; - volatile uint32_t SSGEN_SETUP; - volatile uint32_t SSGEN_HOLD; - volatile uint32_t SSGEN_DISABLE; - volatile uint32_t SSGEN_ACTIVE_HIGH; - uint32_t fill1[3]; - volatile uint32_t XIP_ENABLE; - volatile uint32_t XIP_CONFIG; - volatile uint32_t XIP_MODE; - uint32_t fill2[1]; - volatile uint32_t XIP_WRITE; - volatile uint32_t XIP_READ_WRITE; - volatile uint32_t XIP_READ; -}apb3spixdrmasterctrl_t; - -#define SPI_XIP_CONFIG_INSTRUCTION_OFFS 0 -#define SPI_XIP_CONFIG_INSTRUCTION_MASK 0xff -#define SPI_XIP_CONFIG_INSTRUCTION(V) ((V & SPI_XIP_CONFIG_INSTRUCTION_MASK) << SPI_XIP_CONFIG_INSTRUCTION_OFFS) - -#define SPI_XIP_CONFIG_ENABLE_OFFS 8 -#define SPI_XIP_CONFIG_ENABLE_MASK 1 -#define SPI_XIP_CONFIG_ENABLE(V) ((V & SPI_XIP_CONFIG_ENABLE_MASK) << SPI_XIP_CONFIG_ENABLE_OFFS) - -#define SPI_XIP_CONFIG_DUMMY_VALUE_OFFS 16 -#define SPI_XIP_CONFIG_DUMMY_VALUE_MASK 0xff -#define SPI_XIP_CONFIG_DUMMY_VALUE(V) ((V & SPI_XIP_CONFIG_DUMMY_VALUE_MASK) << SPI_XIP_CONFIG_DUMMY_VALUE_OFFS) - -#define SPI_XIP_CONFIG_DUMMY_COUNT_OFFS 24 -#define SPI_XIP_CONFIG_DUMMY_COUNT_MASK 0xf -#define SPI_XIP_CONFIG_DUMMY_COUNT(V) ((V & SPI_XIP_CONFIG_DUMMY_COUNT_MASK) << SPI_XIP_CONFIG_DUMMY_COUNT_OFFS) - -inline void set_spi_data_data(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->DATA = (reg->DATA & ~(0xffU << 0)) | (value << 0); -} -inline uint32_t get_spi_data_write(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->DATA >> 8) & 0x1; -} -inline void set_spi_data_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->DATA = (reg->DATA & ~(0x1U << 8)) | (value << 8); -} -inline uint32_t get_spi_data_read(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->DATA >> 9) & 0x1; -} -inline void set_spi_data_read(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->DATA = (reg->DATA & ~(0x1U << 9)) | (value << 9); -} -inline uint32_t get_spi_data_kind(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->DATA >> 11) & 0x1; -} -inline void set_spi_data_kind(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->DATA = (reg->DATA & ~(0x1U << 11)) | (value << 11); -} -inline uint32_t get_spi_data_rx_data_invalid(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->DATA >> 31) & 0x1; -} -inline uint32_t get_spi_status_tx_free(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->STATUS >> 0) & 0x3f; -} -inline uint32_t get_spi_status_rx_avail(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->STATUS >> 16) & 0x3f; -} -inline uint32_t get_spi_config_kind(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->CONFIG >> 0) & 0x3; -} -inline void set_spi_config_kind(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0); -} -inline uint32_t get_spi_config_mode(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->CONFIG >> 4) & 0x7; -} -inline void set_spi_config_mode(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->CONFIG = (reg->CONFIG & ~(0x7U << 4)) | (value << 4); -} -inline uint32_t get_spi_intr_tx_ie(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->INTR >> 0) & 0x1; -} -inline void set_spi_intr_tx_ie(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->INTR = (reg->INTR & ~(0x1U << 0)) | (value << 0); -} -inline uint32_t get_spi_intr_rx_ie(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->INTR >> 1) & 0x1; -} -inline void set_spi_intr_rx_ie(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->INTR = (reg->INTR & ~(0x1U << 1)) | (value << 1); -} -inline uint32_t get_spi_intr_tx_ip(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->INTR >> 8) & 0x1; -} -inline uint32_t get_spi_intr_rx_ip(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->INTR >> 9) & 0x1; -} -inline uint32_t get_spi_intr_tx_active(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->INTR >> 16) & 0x1; -} -inline uint32_t get_spi_sclk_config(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->SCLK_CONFIG >> 0) & 0xfff; -} -inline void set_spi_sclk_config(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){ - reg->SCLK_CONFIG = (reg->SCLK_CONFIG & ~(0xfffU << 0)) | (value << 0); -} -inline uint32_t get_spi_ssgen_setup(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->SSGEN_SETUP >> 0) & 0xfff; -} -inline void set_spi_ssgen_setup(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){ - reg->SSGEN_SETUP = (reg->SSGEN_SETUP & ~(0xfffU << 0)) | (value << 0); -} -inline uint32_t get_spi_ssgen_hold(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->SSGEN_HOLD >> 0) & 0xfff; -} -inline void set_spi_ssgen_hold(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){ - reg->SSGEN_HOLD = (reg->SSGEN_HOLD & ~(0xfffU << 0)) | (value << 0); -} -inline uint32_t get_spi_ssgen_disable(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->SSGEN_DISABLE >> 0) & 0xfff; -} -inline void set_spi_ssgen_disable(volatile apb3spixdrmasterctrl_t *reg, uint16_t value){ - reg->SSGEN_DISABLE = (reg->SSGEN_DISABLE & ~(0xfffU << 0)) | (value << 0); -} -inline uint32_t get_spi_ssgen_active_high(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->SSGEN_ACTIVE_HIGH >> 0) & 0x1; -} -inline void set_spi_ssgen_active_high(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->SSGEN_ACTIVE_HIGH = (reg->SSGEN_ACTIVE_HIGH & ~(0x1U << 0)) | (value << 0); -} -inline uint32_t get_spi_xip_enable(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_ENABLE >> 0) & 0x1; -} -inline void set_spi_xip_enable(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_ENABLE = (reg->XIP_ENABLE & ~(0x1U << 0)) | (value << 0); -} -inline uint32_t get_spi_xip_config(volatile apb3spixdrmasterctrl_t *reg){ - return reg->XIP_CONFIG; -} -inline void set_spi_xip_config(volatile apb3spixdrmasterctrl_t *reg, uint32_t value){ - reg->XIP_CONFIG = value; -} -inline uint32_t get_spi_xip_config_instruction(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_CONFIG >> 0) & 0xff; -} -inline void set_spi_xip_config_instruction(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 0)) | (value << 0); -} -inline uint32_t get_spi_xip_config_enable(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_CONFIG >> 8) & 0x1; -} -inline void set_spi_xip_config_enable(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0x1U << 8)) | (value << 8); -} -inline uint32_t get_spi_xip_config_dummy_value(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_CONFIG >> 16) & 0xff; -} -inline void set_spi_xip_config_dummy_value(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 16)) | (value << 16); -} -inline uint32_t get_spi_xip_config_dummy_count(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_CONFIG >> 24) & 0xf; -} -inline void set_spi_xip_config_dummy_count(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xfU << 24)) | (value << 24); -} -inline uint32_t get_spi_xip_mode_instruction(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_MODE >> 0) & 0x7; -} -inline void set_spi_xip_mode_instruction(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 0)) | (value << 0); -} -inline uint32_t get_spi_xip_mode_address(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_MODE >> 8) & 0x7; -} -inline void set_spi_xip_mode_address(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 8)) | (value << 8); -} -inline uint32_t get_spi_xip_mode_dummy(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_MODE >> 16) & 0x7; -} -inline void set_spi_xip_mode_dummy(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 16)) | (value << 16); -} -inline uint32_t get_spi_xip_mode_payload(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_MODE >> 24) & 0x7; -} -inline void set_spi_xip_mode_payload(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_MODE = (reg->XIP_MODE & ~(0x7U << 24)) | (value << 24); -} -inline void set_spi_xip_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_WRITE = (reg->XIP_WRITE & ~(0xffU << 0)) | (value << 0); -} -inline void set_spi_xip_read_write(volatile apb3spixdrmasterctrl_t *reg, uint8_t value){ - reg->XIP_READ_WRITE = (reg->XIP_READ_WRITE & ~(0xffU << 0)) | (value << 0); -} -inline uint32_t get_spi_xip_read(volatile apb3spixdrmasterctrl_t *reg){ - return (reg->XIP_READ >> 0) & 0xff; -} -#endif /* _BSP_APB3SPIXDRMASTERCTRL_H */ diff --git a/include/ehrenberg/devices/gen/Apb3Timer.h b/include/ehrenberg/devices/gen/Apb3Timer.h deleted file mode 100644 index 89fcb8b..0000000 --- a/include/ehrenberg/devices/gen/Apb3Timer.h +++ /dev/null @@ -1,73 +0,0 @@ -/* -* Copyright (c) 2023 - 2024 MINRES Technologies GmbH -* -* SPDX-License-Identifier: Apache-2.0 -* -* Generated at 2024-02-19 14:24:37 UTC -* by peakrdl_mnrs version 1.2.2 -*/ - -#ifndef _BSP_APB3TIMER_H -#define _BSP_APB3TIMER_H - -#include - -typedef struct __attribute((__packed__)) { - volatile uint32_t PRESCALER; - volatile uint32_t T0_CTRL; - volatile uint32_t T0_OVERFLOW; - volatile uint32_t T0_VALUE; - volatile uint32_t T1_CTRL; - volatile uint32_t T1_OVERFLOW; - volatile uint32_t T1_VALUE; -}apb3timer_t; - -inline uint32_t get_timer_prescaler(volatile apb3timer_t *reg){ - return (reg->PRESCALER >> 0) & 0xffff; -} -inline void set_timer_prescaler(volatile apb3timer_t *reg, uint16_t value){ - reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0); -} -inline uint32_t get_timer_t0_ctrl_enable(volatile apb3timer_t *reg){ - return (reg->T0_CTRL >> 0) & 0x7; -} -inline void set_timer_t0_ctrl_enable(volatile apb3timer_t *reg, uint8_t value){ - reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0); -} -inline uint32_t get_timer_t0_ctrl_clear(volatile apb3timer_t *reg){ - return (reg->T0_CTRL >> 3) & 0x3; -} -inline void set_timer_t0_ctrl_clear(volatile apb3timer_t *reg, uint8_t value){ - reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3); -} -inline uint32_t get_timer_t0_overflow(volatile apb3timer_t *reg){ - return (reg->T0_OVERFLOW >> 0) & 0xffffffff; -} -inline void set_timer_t0_overflow(volatile apb3timer_t *reg, uint32_t value){ - reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); -} -inline uint32_t get_timer_t0_value(volatile apb3timer_t *reg){ - return (reg->T0_VALUE >> 0) & 0xffffffff; -} -inline uint32_t get_timer_t1_ctrl_enable(volatile apb3timer_t *reg){ - return (reg->T1_CTRL >> 0) & 0x7; -} -inline void set_timer_t1_ctrl_enable(volatile apb3timer_t *reg, uint8_t value){ - reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0); -} -inline uint32_t get_timer_t1_ctrl_clear(volatile apb3timer_t *reg){ - return (reg->T1_CTRL >> 3) & 0x3; -} -inline void set_timer_t1_ctrl_clear(volatile apb3timer_t *reg, uint8_t value){ - reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3); -} -inline uint32_t get_timer_t1_overflow(volatile apb3timer_t *reg){ - return (reg->T1_OVERFLOW >> 0) & 0xffffffff; -} -inline void set_timer_t1_overflow(volatile apb3timer_t *reg, uint32_t value){ - reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); -} -inline uint32_t get_timer_t1_value(volatile apb3timer_t *reg){ - return (reg->T1_VALUE >> 0) & 0xffffffff; -} -#endif /* _BSP_APB3TIMER_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/Apb3Uart.h b/include/ehrenberg/devices/gen/Apb3Uart.h deleted file mode 100644 index e5d9bee..0000000 --- a/include/ehrenberg/devices/gen/Apb3Uart.h +++ /dev/null @@ -1,104 +0,0 @@ -/* -* Copyright (c) 2023 - 2024 MINRES Technologies GmbH -* -* SPDX-License-Identifier: Apache-2.0 -* -* Generated at 2024-02-19 14:24:37 UTC -* by peakrdl_mnrs version 1.2.2 -*/ - -#ifndef _BSP_APB3UART_H -#define _BSP_APB3UART_H - -#include - -typedef struct __attribute((__packed__)) { - volatile uint32_t RX_TX_REG; - volatile uint32_t INT_CTRL_REG; - volatile uint32_t CLK_DIVIDER_REG; - volatile uint32_t FRAME_CONFIG_REG; - volatile uint32_t STATUS_REG; -}apb3uart_t; - -inline uint32_t get_uart_rx_tx_reg_data(volatile apb3uart_t *reg){ - return (reg->RX_TX_REG >> 0) & 0xff; -} -inline void set_uart_rx_tx_reg_data(volatile apb3uart_t *reg, uint8_t value){ - reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0); -} -inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile apb3uart_t *reg){ - return (reg->RX_TX_REG >> 14) & 0x1; -} -inline uint32_t get_uart_rx_tx_reg_tx_free(volatile apb3uart_t *reg){ - return (reg->RX_TX_REG >> 15) & 0x1; -} -inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg){ - return (reg->INT_CTRL_REG >> 0) & 0x1; -} -inline void set_uart_int_ctrl_reg_write_intr_enable(volatile apb3uart_t *reg, uint8_t value){ - reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0); -} -inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg){ - return (reg->INT_CTRL_REG >> 1) & 0x1; -} -inline void set_uart_int_ctrl_reg_read_intr_enable(volatile apb3uart_t *reg, uint8_t value){ - reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1); -} -inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile apb3uart_t *reg){ - return (reg->INT_CTRL_REG >> 8) & 0x1; -} -inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile apb3uart_t *reg){ - return (reg->INT_CTRL_REG >> 9) & 0x1; -} -inline uint32_t get_uart_clk_divider_reg(volatile apb3uart_t *reg){ - return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff; -} -inline void set_uart_clk_divider_reg(volatile apb3uart_t *reg, uint32_t value){ - reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0); -} -inline uint32_t get_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg){ - return (reg->FRAME_CONFIG_REG >> 0) & 0x7; -} -inline void set_uart_frame_config_reg_data_lenght(volatile apb3uart_t *reg, uint8_t value){ - reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0); -} -inline uint32_t get_uart_frame_config_reg_parity(volatile apb3uart_t *reg){ - return (reg->FRAME_CONFIG_REG >> 3) & 0x3; -} -inline void set_uart_frame_config_reg_parity(volatile apb3uart_t *reg, uint8_t value){ - reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3); -} -inline uint32_t get_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg){ - return (reg->FRAME_CONFIG_REG >> 5) & 0x1; -} -inline void set_uart_frame_config_reg_stop_bit(volatile apb3uart_t *reg, uint8_t value){ - reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5); -} -inline uint32_t get_uart_status_reg_read_error(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 0) & 0x1; -} -inline uint32_t get_uart_status_reg_stall(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 1) & 0x1; -} -inline uint32_t get_uart_status_reg_break(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 8) & 0x1; -} -inline uint32_t get_uart_status_reg_break_detected(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 9) & 0x1; -} -inline void set_uart_status_reg_break_detected(volatile apb3uart_t *reg, uint8_t value){ - reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9); -} -inline uint32_t get_uart_status_reg_set_break(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 10) & 0x1; -} -inline void set_uart_status_reg_set_break(volatile apb3uart_t *reg, uint8_t value){ - reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10); -} -inline uint32_t get_uart_status_reg_clear_break(volatile apb3uart_t *reg){ - return (reg->STATUS_REG >> 11) & 0x1; -} -inline void set_uart_status_reg_clear_break(volatile apb3uart_t *reg, uint8_t value){ - reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11); -} -#endif /* _BSP_APB3UART_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/Apb3Gpio.h b/include/ehrenberg/devices/gen/GpioModule.h similarity index 51% rename from include/ehrenberg/devices/gen/Apb3Gpio.h rename to include/ehrenberg/devices/gen/GpioModule.h index dbd9251..8a5dbad 100644 --- a/include/ehrenberg/devices/gen/Apb3Gpio.h +++ b/include/ehrenberg/devices/gen/GpioModule.h @@ -3,12 +3,12 @@ * * SPDX-License-Identifier: Apache-2.0 * -* Generated at 2024-02-19 14:24:37 UTC +* Generated at 2024-04-22 11:11:53 UTC * by peakrdl_mnrs version 1.2.2 */ -#ifndef _BSP_APB3GPIO_H -#define _BSP_APB3GPIO_H +#ifndef _BSP_GPIOMODULE_H +#define _BSP_GPIOMODULE_H #include @@ -16,21 +16,26 @@ typedef struct __attribute((__packed__)) { volatile uint32_t VALUE; volatile uint32_t WRITE; volatile uint32_t WRITEENABLE; -}apb3gpio_t; +}gpiomodule_t; -inline uint32_t get_gpio_value(volatile apb3gpio_t *reg){ +static inline uint32_t get_gpiomodule_value(volatile gpiomodule_t *reg){ return (reg->VALUE >> 0) & 0xffffffff; } -inline uint32_t get_gpio_write(volatile apb3gpio_t *reg){ + +static inline uint32_t get_gpiomodule_write(volatile gpiomodule_t *reg){ return (reg->WRITE >> 0) & 0xffffffff; } -inline void set_gpio_write(volatile apb3gpio_t *reg, uint32_t value){ + +static inline void set_gpiomodule_write(volatile gpiomodule_t *reg, uint32_t value){ reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0); } -inline uint32_t get_gpio_writeEnable(volatile apb3gpio_t *reg){ + +static inline uint32_t get_gpiomodule_writeEnable(volatile gpiomodule_t *reg){ return (reg->WRITEENABLE >> 0) & 0xffffffff; } -inline void set_gpio_writeEnable(volatile apb3gpio_t *reg, uint32_t value){ + +static inline void set_gpiomodule_writeEnable(volatile gpiomodule_t *reg, uint32_t value){ reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0); } -#endif /* _BSP_APB3GPIO_H */ \ No newline at end of file + +#endif /* _BSP_GPIOMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/I2SModule.h b/include/ehrenberg/devices/gen/I2SModule.h new file mode 100644 index 0000000..508d4e7 --- /dev/null +++ b/include/ehrenberg/devices/gen/I2SModule.h @@ -0,0 +1,142 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_I2SMODULE_H +#define _BSP_I2SMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t LEFT_CH; + volatile uint32_t RIGHT_CH; + volatile uint32_t CONTROL; + volatile uint32_t STATUS; + volatile uint32_t I2S_CLOCK_CTRL; + volatile uint32_t PDM_CLOCK_CTRL; + volatile uint32_t IE; + volatile uint32_t IP; +}i2smodule_t; + +static inline uint32_t get_i2smodule_data_left(volatile i2smodule_t *reg){ + return (reg->LEFT_CH >> 0) & 0xffffffff; +} + +static inline void set_i2smodule_data_left(volatile i2smodule_t *reg, uint32_t value){ + reg->LEFT_CH = (reg->LEFT_CH & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_data_right(volatile i2smodule_t *reg){ + return (reg->RIGHT_CH >> 0) & 0xffffffff; +} + +static inline void set_i2smodule_data_right(volatile i2smodule_t *reg, uint32_t value){ + reg->RIGHT_CH = (reg->RIGHT_CH & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_mode(volatile i2smodule_t *reg){ + return (reg->CONTROL >> 0) & 0x3; +} + +static inline void set_i2smodule_mode(volatile i2smodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x3U << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_disable_left(volatile i2smodule_t *reg){ + return (reg->CONTROL >> 2) & 0x1; +} + +static inline void set_i2smodule_disable_left(volatile i2smodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x1U << 2)) | (value << 2); +} + +static inline uint32_t get_i2smodule_disable_right(volatile i2smodule_t *reg){ + return (reg->CONTROL >> 3) & 0x1; +} + +static inline void set_i2smodule_disable_right(volatile i2smodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x1U << 3)) | (value << 3); +} + +static inline uint32_t get_i2smodule_active_clock(volatile i2smodule_t *reg){ + return (reg->CONTROL >> 4) & 0x1; +} + +static inline void set_i2smodule_active_clock(volatile i2smodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x1U << 4)) | (value << 4); +} + +static inline uint32_t get_i2smodule_pdm_scale(volatile i2smodule_t *reg){ + return (reg->CONTROL >> 5) & 0x7; +} + +static inline void set_i2smodule_pdm_scale(volatile i2smodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x7U << 5)) | (value << 5); +} + +static inline uint32_t get_i2smodule_enabled(volatile i2smodule_t *reg){ + return (reg->STATUS >> 0) & 0x1; +} + +static inline uint32_t get_i2smodule_active(volatile i2smodule_t *reg){ + return (reg->STATUS >> 1) & 0x1; +} + +static inline uint32_t get_i2smodule_left_avail(volatile i2smodule_t *reg){ + return (reg->STATUS >> 2) & 0x1; +} + +static inline uint32_t get_i2smodule_right_avail(volatile i2smodule_t *reg){ + return (reg->STATUS >> 3) & 0x1; +} + +static inline uint32_t get_i2smodule_both_avail(volatile i2smodule_t *reg){ + return (reg->STATUS >> 4) & 0x1; +} + +static inline uint32_t get_i2smodule_divider(volatile i2smodule_t *reg){ + return (reg->I2S_CLOCK_CTRL >> 0) & 0xfffff; +} + +static inline void set_i2smodule_divider(volatile i2smodule_t *reg, uint32_t value){ + reg->I2S_CLOCK_CTRL = (reg->I2S_CLOCK_CTRL & ~(0xfffffU << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_divider(volatile i2smodule_t *reg){ + return (reg->PDM_CLOCK_CTRL >> 0) & 0x3ff; +} + +static inline void set_i2smodule_divider(volatile i2smodule_t *reg, uint16_t value){ + reg->PDM_CLOCK_CTRL = (reg->PDM_CLOCK_CTRL & ~(0x3ffU << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_en_left_sample_avail(volatile i2smodule_t *reg){ + return (reg->IE >> 0) & 0x1; +} + +static inline void set_i2smodule_en_left_sample_avail(volatile i2smodule_t *reg, uint8_t value){ + reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_i2smodule_en_right_sample_avail(volatile i2smodule_t *reg){ + return (reg->IE >> 1) & 0x1; +} + +static inline void set_i2smodule_en_right_sample_avail(volatile i2smodule_t *reg, uint8_t value){ + reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1); +} + +static inline uint32_t get_i2smodule_left_sample_avail(volatile i2smodule_t *reg){ + return (reg->IP >> 0) & 0x1; +} + +static inline uint32_t get_i2smodule_right_sample_avail(volatile i2smodule_t *reg){ + return (reg->IP >> 1) & 0x1; +} + +#endif /* _BSP_I2SMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/SimpleDmaModule.h b/include/ehrenberg/devices/gen/SimpleDmaModule.h new file mode 100644 index 0000000..8272f15 --- /dev/null +++ b/include/ehrenberg/devices/gen/SimpleDmaModule.h @@ -0,0 +1,120 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_SIMPLEDMAMODULE_H +#define _BSP_SIMPLEDMAMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t CONTROL; + volatile uint32_t STATUS; + volatile uint32_t EVENT_SEL; + volatile uint32_t IE; + volatile uint32_t IP; + volatile uint32_t TRANSFER; + volatile uint32_t SRC_START_ADDR; + volatile uint32_t SRC_STRIDE; + volatile uint32_t DST_START_ADDR; + volatile uint32_t DST_STRIDE; +}simpledmamodule_t; + +static inline uint32_t get_simpledmamodule_enable_transfer(volatile simpledmamodule_t *reg){ + return (reg->CONTROL >> 0) & 0x1; +} + +static inline void set_simpledmamodule_enable_transfer(volatile simpledmamodule_t *reg, uint8_t value){ + reg->CONTROL = (reg->CONTROL & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_busy(volatile simpledmamodule_t *reg){ + return (reg->STATUS >> 0) & 0x1; +} + +static inline uint32_t get_simpledmamodule_event_sel(volatile simpledmamodule_t *reg){ + return (reg->EVENT_SEL >> 0) & 0x3; +} + +static inline void set_simpledmamodule_event_sel(volatile simpledmamodule_t *reg, uint8_t value){ + reg->EVENT_SEL = (reg->EVENT_SEL & ~(0x3U << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_en_seg_transfer_done(volatile simpledmamodule_t *reg){ + return (reg->IE >> 0) & 0x1; +} + +static inline void set_simpledmamodule_en_seg_transfer_done(volatile simpledmamodule_t *reg, uint8_t value){ + reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_en_transfer_done(volatile simpledmamodule_t *reg){ + return (reg->IE >> 1) & 0x1; +} + +static inline void set_simpledmamodule_en_transfer_done(volatile simpledmamodule_t *reg, uint8_t value){ + reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1); +} + +static inline uint32_t get_simpledmamodule_seg_transfer_done(volatile simpledmamodule_t *reg){ + return (reg->IP >> 0) & 0x1; +} + +static inline uint32_t get_simpledmamodule_transfer_done(volatile simpledmamodule_t *reg){ + return (reg->IP >> 1) & 0x1; +} + +static inline uint32_t get_simpledmamodule_length(volatile simpledmamodule_t *reg){ + return (reg->TRANSFER >> 0) & 0x3ff; +} + +static inline void set_simpledmamodule_length(volatile simpledmamodule_t *reg, uint16_t value){ + reg->TRANSFER = (reg->TRANSFER & ~(0x3ffU << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_count(volatile simpledmamodule_t *reg){ + return (reg->TRANSFER >> 12) & 0xfffff; +} + +static inline void set_simpledmamodule_count(volatile simpledmamodule_t *reg, uint32_t value){ + reg->TRANSFER = (reg->TRANSFER & ~(0xfffffU << 12)) | (value << 12); +} + +static inline uint32_t get_simpledmamodule_src_start_addr(volatile simpledmamodule_t *reg){ + return (reg->SRC_START_ADDR >> 0) & 0xffffffff; +} + +static inline void set_simpledmamodule_src_start_addr(volatile simpledmamodule_t *reg, uint32_t value){ + reg->SRC_START_ADDR = (reg->SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_src_stride(volatile simpledmamodule_t *reg){ + return (reg->SRC_STRIDE >> 0) & 0xffffffff; +} + +static inline void set_simpledmamodule_src_stride(volatile simpledmamodule_t *reg, uint32_t value){ + reg->SRC_STRIDE = (reg->SRC_STRIDE & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_dst_start_addr(volatile simpledmamodule_t *reg){ + return (reg->DST_START_ADDR >> 0) & 0xffffffff; +} + +static inline void set_simpledmamodule_dst_start_addr(volatile simpledmamodule_t *reg, uint32_t value){ + reg->DST_START_ADDR = (reg->DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_simpledmamodule_dst_stride(volatile simpledmamodule_t *reg){ + return (reg->DST_STRIDE >> 0) & 0xffffffff; +} + +static inline void set_simpledmamodule_dst_stride(volatile simpledmamodule_t *reg, uint32_t value){ + reg->DST_STRIDE = (reg->DST_STRIDE & ~(0xffffffffU << 0)) | (value << 0); +} + +#endif /* _BSP_SIMPLEDMAMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/TimerModule.h b/include/ehrenberg/devices/gen/TimerModule.h new file mode 100644 index 0000000..3637002 --- /dev/null +++ b/include/ehrenberg/devices/gen/TimerModule.h @@ -0,0 +1,89 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_TIMERMODULE_H +#define _BSP_TIMERMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t PRESCALER; + volatile uint32_t T0_CTRL; + volatile uint32_t T0_OVERFLOW; + volatile uint32_t T0_VALUE; + volatile uint32_t T1_CTRL; + volatile uint32_t T1_OVERFLOW; + volatile uint32_t T1_VALUE; +}timermodule_t; + +static inline uint32_t get_timermodule_limit(volatile timermodule_t *reg){ + return (reg->PRESCALER >> 0) & 0xffff; +} + +static inline void set_timermodule_limit(volatile timermodule_t *reg, uint16_t value){ + reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0); +} + +static inline uint32_t get_timermodule_enable(volatile timermodule_t *reg){ + return (reg->T0_CTRL >> 0) & 0x7; +} + +static inline void set_timermodule_enable(volatile timermodule_t *reg, uint8_t value){ + reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0); +} + +static inline uint32_t get_timermodule_clear(volatile timermodule_t *reg){ + return (reg->T0_CTRL >> 3) & 0x3; +} + +static inline void set_timermodule_clear(volatile timermodule_t *reg, uint8_t value){ + reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3); +} + +static inline uint32_t get_timermodule_limit(volatile timermodule_t *reg){ + return (reg->T0_OVERFLOW >> 0) & 0xffffffff; +} + +static inline void set_timermodule_limit(volatile timermodule_t *reg, uint32_t value){ + reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_timermodule_value(volatile timermodule_t *reg){ + return (reg->T0_VALUE >> 0) & 0xffffffff; +} + +static inline uint32_t get_timermodule_enable(volatile timermodule_t *reg){ + return (reg->T1_CTRL >> 0) & 0x7; +} + +static inline void set_timermodule_enable(volatile timermodule_t *reg, uint8_t value){ + reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0); +} + +static inline uint32_t get_timermodule_clear(volatile timermodule_t *reg){ + return (reg->T1_CTRL >> 3) & 0x3; +} + +static inline void set_timermodule_clear(volatile timermodule_t *reg, uint8_t value){ + reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3); +} + +static inline uint32_t get_timermodule_limit(volatile timermodule_t *reg){ + return (reg->T1_OVERFLOW >> 0) & 0xffffffff; +} + +static inline void set_timermodule_limit(volatile timermodule_t *reg, uint32_t value){ + reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0); +} + +static inline uint32_t get_timermodule_value(volatile timermodule_t *reg){ + return (reg->T1_VALUE >> 0) & 0xffffffff; +} + +#endif /* _BSP_TIMERMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gen/UartModule.h b/include/ehrenberg/devices/gen/UartModule.h new file mode 100644 index 0000000..551ac35 --- /dev/null +++ b/include/ehrenberg/devices/gen/UartModule.h @@ -0,0 +1,143 @@ +/* +* Copyright (c) 2023 - 2024 MINRES Technologies GmbH +* +* SPDX-License-Identifier: Apache-2.0 +* +* Generated at 2024-04-22 11:11:53 UTC +* by peakrdl_mnrs version 1.2.2 +*/ + +#ifndef _BSP_UARTMODULE_H +#define _BSP_UARTMODULE_H + +#include + +typedef struct __attribute((__packed__)) { + volatile uint32_t RX_TX_REG; + volatile uint32_t INT_CTRL_REG; + volatile uint32_t CLK_DIVIDER_REG; + volatile uint32_t FRAME_CONFIG_REG; + volatile uint32_t STATUS_REG; +}uartmodule_t; + +static inline uint32_t get_uartmodule_data(volatile uartmodule_t *reg){ + return (reg->RX_TX_REG >> 0) & 0xff; +} + +static inline void set_uartmodule_data(volatile uartmodule_t *reg, uint8_t value){ + reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0); +} + +static inline uint32_t get_uartmodule_rx_avail(volatile uartmodule_t *reg){ + return (reg->RX_TX_REG >> 14) & 0x1; +} + +static inline uint32_t get_uartmodule_tx_free(volatile uartmodule_t *reg){ + return (reg->RX_TX_REG >> 15) & 0x1; +} + +static inline uint32_t get_uartmodule_write_intr_enable(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 0) & 0x1; +} + +static inline void set_uartmodule_write_intr_enable(volatile uartmodule_t *reg, uint8_t value){ + reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0); +} + +static inline uint32_t get_uartmodule_read_intr_enable(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 1) & 0x1; +} + +static inline void set_uartmodule_read_intr_enable(volatile uartmodule_t *reg, uint8_t value){ + reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1); +} + +static inline uint32_t get_uartmodule_break_intr_enable(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 2) & 0x1; +} + +static inline void set_uartmodule_break_intr_enable(volatile uartmodule_t *reg, uint8_t value){ + reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 2)) | (value << 2); +} + +static inline uint32_t get_uartmodule_write_intr_pend(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 8) & 0x1; +} + +static inline uint32_t get_uartmodule_read_intr_pend(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 9) & 0x1; +} + +static inline uint32_t get_uartmodule_break_intr_pend(volatile uartmodule_t *reg){ + return (reg->INT_CTRL_REG >> 10) & 0x1; +} + +static inline uint32_t get_uartmodule_clock_divider(volatile uartmodule_t *reg){ + return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff; +} + +static inline void set_uartmodule_clock_divider(volatile uartmodule_t *reg, uint32_t value){ + reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0); +} + +static inline uint32_t get_uartmodule_data_lenght(volatile uartmodule_t *reg){ + return (reg->FRAME_CONFIG_REG >> 0) & 0x7; +} + +static inline void set_uartmodule_data_lenght(volatile uartmodule_t *reg, uint8_t value){ + reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0); +} + +static inline uint32_t get_uartmodule_parity(volatile uartmodule_t *reg){ + return (reg->FRAME_CONFIG_REG >> 3) & 0x3; +} + +static inline void set_uartmodule_parity(volatile uartmodule_t *reg, uint8_t value){ + reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3); +} + +static inline uint32_t get_uartmodule_stop_bit(volatile uartmodule_t *reg){ + return (reg->FRAME_CONFIG_REG >> 5) & 0x1; +} + +static inline void set_uartmodule_stop_bit(volatile uartmodule_t *reg, uint8_t value){ + reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5); +} + +static inline uint32_t get_uartmodule_read_error(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 0) & 0x1; +} + +static inline uint32_t get_uartmodule_stall(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 1) & 0x1; +} + +static inline uint32_t get_uartmodule_break_line(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 8) & 0x1; +} + +static inline uint32_t get_uartmodule_break_detected(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 9) & 0x1; +} + +static inline void set_uartmodule_break_detected(volatile uartmodule_t *reg, uint8_t value){ + reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9); +} + +static inline uint32_t get_uartmodule_set_break(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 10) & 0x1; +} + +static inline void set_uartmodule_set_break(volatile uartmodule_t *reg, uint8_t value){ + reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10); +} + +static inline uint32_t get_uartmodule_clear_break(volatile uartmodule_t *reg){ + return (reg->STATUS_REG >> 11) & 0x1; +} + +static inline void set_uartmodule_clear_break(volatile uartmodule_t *reg, uint8_t value){ + reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11); +} + +#endif /* _BSP_UARTMODULE_H */ \ No newline at end of file diff --git a/include/ehrenberg/devices/gpio.h b/include/ehrenberg/devices/gpio.h index 26135da..11a50c7 100644 --- a/include/ehrenberg/devices/gpio.h +++ b/include/ehrenberg/devices/gpio.h @@ -2,9 +2,9 @@ #define _BSP_GPIO_H #include -#include "gen/Apb3Gpio.h" +#include "gen/GpioModule.h" -#define gpio_t apb3gpio_t +#define gpio_t gpiomodule_t inline void gpio_init(gpio_t* reg) { set_gpio_write(reg, 0); diff --git a/include/ehrenberg/devices/qspi.h b/include/ehrenberg/devices/qspi.h index f651077..af1ade7 100644 --- a/include/ehrenberg/devices/qspi.h +++ b/include/ehrenberg/devices/qspi.h @@ -2,9 +2,9 @@ #define _BSP_QSPI_H #include -#include "gen/Apb3SpiXdrMasterCtrl.h" +#include "gen/Apb3SpiModule.h" -#define qspi_t apb3spixdrmasterctrl_t +#define qspi_t apb3spimodule_t typedef struct { uint32_t cpol; uint32_t cpha; diff --git a/include/ehrenberg/devices/timer.h b/include/ehrenberg/devices/timer.h index 57d2d0d..4c77087 100644 --- a/include/ehrenberg/devices/timer.h +++ b/include/ehrenberg/devices/timer.h @@ -1,11 +1,13 @@ #ifndef _BSP_TIMER_H #define _BSP_TIMER_H -#include "gen/Apb3Timer.h" #include +#include "gen/TimerModule.h" -inline void prescaler_init(apb3timer_t *reg, uint16_t value) { - set_timer_prescaler(reg, value); +#define timer_t timermodule_t + +inline void prescaler_init(timer_t* reg, uint16_t value){ + set_timer_prescaler(reg, value); } inline void timer_t0__init(apb3timer_t *reg) { diff --git a/include/ehrenberg/devices/uart.h b/include/ehrenberg/devices/uart.h index e03b67f..0a2e12b 100644 --- a/include/ehrenberg/devices/uart.h +++ b/include/ehrenberg/devices/uart.h @@ -2,9 +2,9 @@ #define _BSP_UART_H #include -#include "gen/Apb3Uart.h" +#include "gen/UartModule.h" -#define uart_t apb3uart_t +#define uart_t uartmodule_t static inline uint32_t uart_get_tx_free(volatile uart_t *reg){ return (reg->STATUS_REG >> 16) & 0xFF;