#ifndef SRC_INIT_H_
#define SRC_INIT_H_

#include <cstdio>
#include <array>

#include "delay.h"
#include "bsp.h"
#include "plic/plic_driver.h"

typedef void (*function_ptr_t) (void);
//! Instance data for the PLIC.
plic_instance_t g_plic;
std::array<function_ptr_t,PLIC_NUM_INTERRUPTS>  g_ext_interrupt_handlers;
bool hw_interrupt{true};


/*! \brief external interrupt handler
 *
 * routes the peripheral interrupts to the the respective handler
 *
 */
extern "C" void handle_m_ext_interrupt() {
    plic_source int_num  = PLIC_claim_interrupt(&g_plic);
    if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS))
      g_ext_interrupt_handlers[int_num]();
    else
      exit(1 + (uintptr_t) int_num);
    PLIC_complete_interrupt(&g_plic, int_num);
}
/*! \brief dummy interrupt handler
 *
 */
void no_interrupt_handler (void) {};
/*! \brief configure the per-interrupt handler
 *
 */
void configure_irq(size_t irq_num, function_ptr_t handler, unsigned char prio=1) {
    g_ext_interrupt_handlers[irq_num] = handler;
    // Priority must be set > 0 to trigger the interrupt.
    PLIC_set_priority(&g_plic, irq_num, prio);
    // Have to enable the interrupt both at the GPIO level, and at the PLIC level.
    PLIC_enable_interrupt(&g_plic, irq_num);
}

static void msi_interrupt_handler(){
	hw_interrupt = false;
}

void wait_for_interrupt() {
    // wait until HW is done
    if(hw_interrupt) {
        do{
            asm("wfi");
            asm("nop");
        }while(hw_interrupt);
    }
	hw_interrupt=true;
}

/*!\brief initializes platform
 *
 */
void platform_init(){
	// UART init section TODO: clarify how to get the functions from init.c?
	GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
	GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
	UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;

    F_CPU=PRCI_measure_mcycle_freq(20, RTC_FREQ);
    printf("core freq at %d Hz\n", F_CPU);
    // initialie interupt & trap handling
    write_csr(mtvec, &trap_entry);

    PLIC_init(&g_plic, PLIC_CTRL_ADDR, PLIC_NUM_INTERRUPTS, PLIC_NUM_PRIORITIES, 0);
    // Disable the machine & timer interrupts until setup is done.
    clear_csr(mie, MIP_MEIP);
    clear_csr(mie, MIP_MTIP);
    for (auto& h:g_ext_interrupt_handlers) h=no_interrupt_handler;
    configure_irq(2, msi_interrupt_handler);
    // Enable interrupts in general.
    set_csr(mstatus, MSTATUS_MIE);
    // Enable the Machine-External bit in MIE
    set_csr(mie, MIP_MEIP);

	//hw_interrupt = false;
}

#endif /* SRC_INIT_H_ */
