From 9dd7dcb4ce261d89809912fd866d3f9e0eae5a51 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 20 Aug 2023 16:39:20 +0200 Subject: [PATCH] adds TGC5L environment --- CMakeLists.txt | 27 +++-- bare-metal-bsp/env/TGC5L/.gitignore | 1 + bare-metal-bsp/env/TGC5L/init.c | 121 +++++++++++++++++++ bare-metal-bsp/env/TGC5L/link.lds | 174 ++++++++++++++++++++++++++++ bare-metal-bsp/env/TGC5L/platform.h | 32 +++++ 5 files changed, 343 insertions(+), 12 deletions(-) create mode 100644 bare-metal-bsp/env/TGC5L/.gitignore create mode 100644 bare-metal-bsp/env/TGC5L/init.c create mode 100644 bare-metal-bsp/env/TGC5L/link.lds create mode 100644 bare-metal-bsp/env/TGC5L/platform.h diff --git a/CMakeLists.txt b/CMakeLists.txt index d8aa834..7f492c8 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,12 +1,15 @@ - add_custom_target(fw-hello-world ALL - COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world - USES_TERMINAL - WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) - add_custom_target(fw-dhrystone ALL - COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone - USES_TERMINAL - WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) - add_custom_target(fw-coremark ALL - COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark/cm PORT_DIR=../tgc - USES_TERMINAL - WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) +if (NOT DEFINED TARGET) + set(TARGET iss) +endif() +add_custom_target(fw-hello-world ALL + COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world BOARD=${TARGET} + USES_TERMINAL + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) +add_custom_target(fw-dhrystone ALL + COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone BOARD=${TARGET} + USES_TERMINAL + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) +add_custom_target(fw-coremark ALL + COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark/cm PORT_DIR=../tgc BOARD=${TARGET} + USES_TERMINAL + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}) diff --git a/bare-metal-bsp/env/TGC5L/.gitignore b/bare-metal-bsp/env/TGC5L/.gitignore new file mode 100644 index 0000000..cc5bb74 --- /dev/null +++ b/bare-metal-bsp/env/TGC5L/.gitignore @@ -0,0 +1 @@ +/*.o diff --git a/bare-metal-bsp/env/TGC5L/init.c b/bare-metal-bsp/env/TGC5L/init.c new file mode 100644 index 0000000..2edaefb --- /dev/null +++ b/bare-metal-bsp/env/TGC5L/init.c @@ -0,0 +1,121 @@ +#include +#include +#include + +#include "platform.h" +#include "encoding.h" + +extern int main(int argc, char** argv); +extern void trap_entry(); + +static unsigned long mtime_lo(void) +{ + unsigned long ret; + __asm volatile("rdtime %0":"=r"(ret)); + return ret; +} + + +#if __riscv_xlen==32 + +static uint32_t mtime_hi(void) +{ + unsigned long ret; + __asm volatile("rdtimeh %0":"=r"(ret)); + return ret; +} + +uint64_t get_timer_value() +{ + while (1) { + uint32_t hi = mtime_hi(); + uint32_t lo = mtime_lo(); + if (hi == mtime_hi()) + return ((uint64_t)hi << 32) | lo; + } +} + +#elif __riscv_xlen==64 + +uint64_t get_timer_value() +{ + return mtime_lo(); +} + +#endif + +unsigned long get_timer_freq() +{ + return 32768; +} + +unsigned long get_cpu_freq() +{ + return 10000000; +} + +void init_pll(void){ + +} + +#ifdef USE_PLIC +extern void handle_m_ext_interrupt(); +#endif + +#ifdef USE_M_TIME +extern void handle_m_time_interrupt(); +#endif + +uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc) +{ + if (0){ +#ifdef USE_PLIC + // External Machine-Level interrupt from PLIC + } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) { + handle_m_ext_interrupt(); +#endif +#ifdef USE_M_TIME + // External Machine-Level interrupt from PLIC + } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){ + handle_m_time_interrupt(); +#endif + } + else { + char* result = "trap 0\n"; + result[5]=(mcause&0xff)+'0'; + //write(1, "trap\n", 5); + write(1, result, 7); + _exit(1 + mcause); + } + return epc; +} + +void _init() +{ + +#ifndef NO_INIT + init_pll(); + printf("core freq at %d Hz\n", get_cpu_freq()); + write_csr(mtvec, &trap_entry); + if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present + write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping + write_csr(fcsr, 0); // initialize rounding mode, undefined at reset + } +#endif + +} + +void _fini() +{ +} + +int is_uart_ready(int uart_id){ + return 1; +} +int try_write_uart_char(int uart_id, char c){ + *((char*)0x10000000) = c; + return 1; +} +void write_uart_char(int uart_id, char c){ + *((char*)0x10000000) = c; +} diff --git a/bare-metal-bsp/env/TGC5L/link.lds b/bare-metal-bsp/env/TGC5L/link.lds new file mode 100644 index 0000000..86a83a4 --- /dev/null +++ b/bare-metal-bsp/env/TGC5L/link.lds @@ -0,0 +1,174 @@ +OUTPUT_ARCH( "riscv" ) + +ENTRY( _start ) + +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 64k + ram (wxa!ri) : ORIGIN = 0x80010000, LENGTH = 64k +} + +PHDRS +{ + flash PT_LOAD; + ram_init PT_LOAD; + ram PT_NULL; +} + +SECTIONS +{ + __stack_size = DEFINED(__stack_size) ? __stack_size : 2K; + + .init ORIGIN(flash) : + { + KEEP (*(SORT_NONE(.init))) + } >flash AT>flash :flash + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >flash AT>flash :flash + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + } >flash AT>flash :flash + + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + } >flash AT>flash :flash + + . = ALIGN(4); + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >flash AT>flash :flash + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >flash AT>flash :flash + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >flash AT>flash :flash + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >flash AT>flash :flash + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >flash AT>flash :flash + + .lalign : + { + . = ALIGN(4); + PROVIDE( _data_lma = . ); + } >flash AT>flash :flash + + .dalign : + { + . = ALIGN(4); + PROVIDE( _data = . ); + } >ram AT>flash :ram_init + + .data : + { + __DATA_BEGIN__ = .; + *(.data .data.*) + *(.gnu.linkonce.d.*) + } >ram AT>flash :ram_init + + .srodata : + { + PROVIDE( _gp = . + 0x800 ); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >ram AT>flash :ram_init + + .sdata : + { + __SDATA_BEGIN__ = .; + *(.sdata .sdata.*) + *(.gnu.linkonce.s.*) + } >ram AT>flash :ram_init + + . = ALIGN(4); + PROVIDE( _edata = . ); + PROVIDE( edata = . ); + + PROVIDE( _fbss = . ); + PROVIDE( __bss_start = . ); + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + } >ram AT>ram :ram + + . = ALIGN(8); + __BSS_END__ = .; + __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800, MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800)); + PROVIDE( _end = . ); + PROVIDE( end = . ); + + .stack ORIGIN(ram) + LENGTH(ram) - __stack_size : + { + PROVIDE( _heap_end = . ); + . = __stack_size; + PROVIDE( _sp = . ); + } >ram AT>ram :ram + + PROVIDE( tohost = 0xfffffff0 ); + PROVIDE( fromhost = 0xfffffff8 ); +} diff --git a/bare-metal-bsp/env/TGC5L/platform.h b/bare-metal-bsp/env/TGC5L/platform.h new file mode 100644 index 0000000..e5115cc --- /dev/null +++ b/bare-metal-bsp/env/TGC5L/platform.h @@ -0,0 +1,32 @@ +// See LICENSE for license details. + +#ifndef _ISS_PLATFORM_H +#define _ISS_PLATFORM_H + +// Some things missing from the official encoding.h +#define MCAUSE_INT 0x80000000 +#define MCAUSE_CAUSE 0x7FFFFFFF + +#include "rtl/const.h" +/**************************************************************************** + * Platform definitions + *****************************************************************************/ + +#define MEM_BASE_ADDR _AC(0x00000000,UL) + +// Helper functions +#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i))) +#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i))) + +// Misc + +#include + +void init_pll(void); +unsigned long get_cpu_freq(void); +unsigned long get_timer_freq(void); +uint64_t get_timer_value(void); +int is_uart_ready(int uart_id); +int try_write_uart_char(int uart_id, char); +void write_uart_char(int uart_id, char); +#endif /* _ISS_PLATFORM_H */