diff --git a/bare-metal-bsp b/bare-metal-bsp
index 4d25972..3389875 160000
--- a/bare-metal-bsp
+++ b/bare-metal-bsp
@@ -1 +1 @@
-Subproject commit 4d25972e4dd8f0053cc4fbd88be1b85f4b869cae
+Subproject commit 33898756434cc490557540dadbfc9bf1f0626d4d
diff --git a/benchmarks/coremark/tgc/core_portme.mak b/benchmarks/coremark/tgc/core_portme.mak
index a0b9726..2c4deea 100755
--- a/benchmarks/coremark/tgc/core_portme.mak
+++ b/benchmarks/coremark/tgc/core_portme.mak
@@ -25,6 +25,7 @@ else
     RISCV_ABI:=ilp32
 endif
 BSP_BASE = ../../../bare-metal-bsp
+LINKER_SCRIPT=link.lds
 
 TRIPLET?=riscv64-unknown-elf
 # Flag : OUTFLAG
@@ -58,7 +59,8 @@ ASFLAGS =
 OFLAG 	= -o
 COUT 	= -c
 
-LFLAGS_END = 
+LFLAGS_END = -T $(BSP_BASE)/env/$(BOARD)/$(LINKER_SCRIPT)
+
 # Flag : PORT_SRCS
 # 	Port specific source files can be added here
 #	You may also need cvt.c if the fcvt functions are not provided as intrinsics by your compiler!
diff --git a/benchmarks/dhrystone/Makefile b/benchmarks/dhrystone/Makefile
index c82e0b3..4416463 100644
--- a/benchmarks/dhrystone/Makefile
+++ b/benchmarks/dhrystone/Makefile
@@ -5,7 +5,7 @@ ASM_SRCS :=
 C_SRCS := dhry_stubs.c dhry_1.c dhry_2.c
 HEADERS := dhry.h
 
-BOARD=iss
+BOARD?=iss
 LINK_TARGET=link
 RISCV_ARCH:=rv32$(ISA)
 ifeq ($(ISA),e)