2020-10-01 17:18:29 +02:00
|
|
|
#include "raven_spn.h"
|
|
|
|
#include "spn_regs.h"
|
2020-12-14 08:43:11 +01:00
|
|
|
#include "init.h"
|
2021-03-25 09:36:16 +01:00
|
|
|
#include "spn_checker_regs.h"
|
2020-10-01 17:18:29 +02:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
using spn_1 = spn_regs<0x90000000>;
|
|
|
|
using spn_2 = spn_regs<0xC0000000>;
|
2021-03-25 09:36:16 +01:00
|
|
|
using spn_checker = spn_checker_regs<0x10040000>;
|
2020-10-01 17:18:29 +02:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
void run_xspn1(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
|
|
|
|
spn_1::mode_reg() = 0;
|
|
|
|
spn_1::input_length_reg() = num_samples; // each sample consists of 5 uint8 values
|
|
|
|
spn_1::input_addr_reg() = in_addr;
|
|
|
|
spn_1::output_addr_reg() = out_addr;
|
|
|
|
spn_1::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data
|
|
|
|
spn_1::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data
|
|
|
|
spn_1::start_reg() = 1;
|
2021-04-20 20:36:00 +02:00
|
|
|
printf("Starting first XSPN instance\n");
|
2020-12-14 12:52:05 +01:00
|
|
|
}
|
2020-12-14 08:43:11 +01:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
void run_xspn2(int in_addr, int out_addr, int num_samples, int in_beats, int out_beats) {
|
|
|
|
spn_2::mode_reg() = 0;
|
|
|
|
spn_2::input_length_reg() = num_samples; // each sample consists of 5 uint8 values
|
|
|
|
spn_2::input_addr_reg() = in_addr;
|
|
|
|
spn_2::output_addr_reg() = out_addr;
|
|
|
|
spn_2::num_of_in_beats_reg() = in_beats; // Number of AXI4 burst beats needed to load all input data
|
|
|
|
spn_2::num_of_out_beats_reg() = out_beats; // Number of AXI4 burst beats needed to store all result data
|
2021-04-20 20:36:00 +02:00
|
|
|
printf("Starting second XSPN instance\n");
|
2021-04-20 08:30:39 +02:00
|
|
|
spn_2::start_reg() = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spn1_interrupt_handler(){
|
|
|
|
spn1_hw_interrupt = false;
|
|
|
|
spn_1::interrupt_reg() = 1;
|
|
|
|
}
|
2020-12-07 12:55:10 +01:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
static void spn2_interrupt_handler(){
|
|
|
|
spn2_hw_interrupt = false;
|
|
|
|
spn_2::interrupt_reg() = 1;
|
|
|
|
}
|
2020-10-01 17:18:29 +02:00
|
|
|
/*! \brief main function
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
int main() {
|
2021-03-04 11:19:35 +01:00
|
|
|
|
|
|
|
|
2020-10-01 17:18:29 +02:00
|
|
|
platform_init();
|
2021-04-20 08:30:39 +02:00
|
|
|
configure_irq(2, spn1_interrupt_handler);
|
|
|
|
configure_irq(22, spn2_interrupt_handler);
|
2020-12-14 12:52:05 +01:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
spn_1::mode_reg() = 1;
|
|
|
|
spn_1::start_reg() = 1;
|
|
|
|
wait_for_spn1_interrupt();
|
|
|
|
uint32_t readout = spn_1::readout_reg();
|
|
|
|
printf("READOUT first HW instance:0x%x\n", readout);
|
|
|
|
|
|
|
|
spn_2::mode_reg() = 1;
|
|
|
|
spn_2::start_reg() = 1;
|
|
|
|
wait_for_spn2_interrupt();
|
|
|
|
uint32_t readout2 = spn_2::readout_reg();
|
|
|
|
printf("READOUT second HW instance:0x%x\n", readout2);
|
2020-11-04 17:41:56 +01:00
|
|
|
|
2021-03-04 11:19:35 +01:00
|
|
|
uint32_t axi_bytes = readout;
|
|
|
|
axi_bytes = axi_bytes & 0xff;
|
|
|
|
axi_bytes = 1 << axi_bytes;
|
2020-11-04 17:41:56 +01:00
|
|
|
|
2021-03-04 11:19:35 +01:00
|
|
|
printf("AXI Bytes: %d\n", axi_bytes);
|
2021-01-08 09:30:47 +01:00
|
|
|
|
2021-03-04 11:19:35 +01:00
|
|
|
uint32_t sample_bytes = readout;
|
|
|
|
sample_bytes = sample_bytes >> 16;
|
|
|
|
sample_bytes = sample_bytes / 8;
|
|
|
|
printf("Sample Bytes: %d\n", sample_bytes);
|
|
|
|
|
|
|
|
uint32_t result_bytes = 8;
|
|
|
|
printf("Result Bytes: %d\n", result_bytes);
|
|
|
|
|
2021-04-12 13:12:04 +02:00
|
|
|
const uint32_t amount_of_input_samples = 50000;
|
2021-04-14 08:45:21 +02:00
|
|
|
uint32_t step = 50000;
|
2021-04-20 08:30:39 +02:00
|
|
|
uint32_t iterations = 5;
|
2021-03-04 11:19:35 +01:00
|
|
|
|
|
|
|
uint32_t in_beats = (step * sample_bytes) / axi_bytes;
|
|
|
|
if (in_beats * axi_bytes < step * sample_bytes) in_beats++;
|
|
|
|
uint32_t out_beats = (step * result_bytes) / axi_bytes;
|
|
|
|
if (out_beats * axi_bytes < step * result_bytes) out_beats++;
|
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
int in_addr = 0x20010000; // place input samples in the SPI memory
|
|
|
|
int out_addr1 = 0x20510000;
|
2021-04-20 20:36:00 +02:00
|
|
|
int out_addr2 = 0x205F0000;
|
2021-03-26 10:36:15 +01:00
|
|
|
|
|
|
|
// inject SPN input data
|
|
|
|
spn_checker::input_addr_reg() = in_addr;
|
|
|
|
spn_checker::num_input_samples_reg() = sample_bytes * step * iterations;
|
|
|
|
spn_checker::start_data_trans_reg() = 1;
|
2021-03-04 11:19:35 +01:00
|
|
|
|
2021-04-20 08:30:39 +02:00
|
|
|
spn_checker::output_addr_reg() = out_addr1;
|
2021-04-20 20:36:00 +02:00
|
|
|
spn_checker::output_addr2_reg() = out_addr2;
|
2021-03-04 11:19:35 +01:00
|
|
|
for (int k = 0; k < iterations*step; k+=step) {
|
2021-04-20 08:30:39 +02:00
|
|
|
run_xspn1(in_addr, out_addr1, step, in_beats, out_beats);
|
|
|
|
run_xspn2(in_addr, out_addr2, step, in_beats, out_beats);
|
2021-05-17 11:54:37 +02:00
|
|
|
wait_for_spn_interrupts();
|
2021-03-04 11:19:35 +01:00
|
|
|
printf("XSPN finished\n");
|
2021-03-25 09:36:16 +01:00
|
|
|
spn_checker::offset_reg() = k;
|
|
|
|
spn_checker::length_reg() = step;
|
2021-03-26 10:36:15 +01:00
|
|
|
spn_checker::start_result_check_reg() = 1;
|
|
|
|
|
2021-03-10 12:05:23 +01:00
|
|
|
in_addr += step * sample_bytes; // 5 bytes in each sample
|
2021-04-12 13:12:04 +02:00
|
|
|
if (k == amount_of_input_samples) {
|
|
|
|
in_addr = 0x20010000;
|
|
|
|
}
|
2021-03-04 11:19:35 +01:00
|
|
|
}
|
2020-10-01 17:18:29 +02:00
|
|
|
|
2021-03-04 11:19:35 +01:00
|
|
|
return 0;
|
2020-10-01 17:18:29 +02:00
|
|
|
}
|