Eyck Jentzsch d00087bebd Another try 2 months ago
.settings Adapted generated code to support translation block linking 9 months ago
cmake Adapted plugin behavior obeying availabiltiy of instrumentation 9 months ago
dbt-core @ 2f4aab87b0 Updated to changes in SCC and DBT-RISE 2 months ago
etc Cleanup using clang-tidy & clang-format, updated license statements 4 months ago
external Cleanup and typo fixes 4 months ago
html Adapted hierarchy names 4 months ago
platform Updated to changes in SCC and DBT-RISE 2 months ago
riscv Updated to changes in SCC and DBT-RISE 2 months ago
riscv.sc Changed handling of elf file specs to allow loading of multiple files 4 months ago
sc-components @ 3e07630fd2 Updated to changes in SCC and DBT-RISE 2 months ago
softfloat Cleanup of cmake files 4 months ago
.clang-format Added clang-format formatting 1 year ago
.cproject Cleanup, BLDC load configurable 3 months ago
.gitignore Fixed WS output 4 months ago
.gitmodules Added pwm unit 6 months ago
.project Disabled SystemC many writer check 6 months ago
CMakeLists.txt Cleanup using clang-tidy & clang-format, updated license statements 4 months ago
LICENSE Initial commit 1 year ago
README.md Updated README 3 months ago
build.sh Moved to cmake4eclipse builder 10 months ago
conanfile.txt Another try 2 months ago
cycles.txt Made plugin call configurable 9 months ago
system-terminal.json Cleanup and typo fixes 4 months ago
system.json Extended CLI interface to also specify trace db name 3 months ago

README.md

RISCV-VP

An instruction set simulator based on DBT-RISE implementing the RISC-V ISA

RISCV-VP README

This is work in progress, so use at your own risk. The project implements SiFives HiFive1 as SystemC based Virtual Prototypes. DBT-RISE and code generation is used to allow easy extension and adaptation of the used instruction set. The RISC-V ISS runs at 65MIPS on recent Intel processors.

The implementation is based on LLVM >=4.0. Eclipse CDT is recommended as IDE.

RISCV-VP uses libGIS (https://github.com/vsergeev/libGIS) as well as ELFIO (http://elfio.sourceforge.net/), both under MIT license.

Quick start

  • you need to have a C++11 capable compiler, make, python, and cmake installed
  • install LLVM >= 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution e.g by Ubuntu 18.04)
  • install conan.io (see also http://docs.conan.io/en/latest/installation.html): pip install --user conan
  • setup conan to use the minres repo: conan remote add minres https://api.bintray.com/conan/minres/conan-repo conan remote add bincrafters https://api.bintray.com/conan/bincrafters/public-conan
  • checkout source from git
  • start an out-of-source build: cd DBT-RISE-RiscV mkdir build cd build cmake .. cmake --build .
  • if you encounter issues when linking wrt. c++11 symbols you might have run into GCC ABI incompatibility introduced from GCC 5.0 onwards. You can fix this by adding '-s compiler.libcxx=libstdc++11' to the conan call or changing compiler.libcxx to compiler.libcxx=libstdc++11 in $HOME/.conan/profiles/default

Detailed Setup steps

prepare Ubuntu 18.04

    sudo apt-get install -y git python-pip build-essential cmake libloki-dev zlib1g-dev libncurses5-dev \	
        libboost-dev libboost-program-options-dev libboost-system-dev libboost-filesystem-dev \
        libboost-thread-dev llvm-dev
    pip install --user conan
    export PATH=${PATH}:$HOME/.local/bin

prepare Fedora 28

    #prepare system
    dnf install @development-tools gcc-c++ boost-devel zlib-devel loki-lib-devel cmake python2 python3 llvm-devel llvm-static
    #install conan
    pip3 install --user conan
    export PATH=${PATH}:$HOME/.local/bin

Build the ISS

    # configure conan
    conan remote add minres https://api.bintray.com/conan/minres/conan-repo
    conan remote add bincrafters https://api.bintray.com/conan/bincrafters/public-conan
    conan profile new default --detect
    # clone and build DBT-RISE-RISCV
    git clone --recursive https://git.minres.com/DVCon2018/RISCV-VP
    cd RISCV-VP/
    git checkout develop
    mkdir build;
    (cd build; MAKE_FLAGS="-j4" cmake ..)
    make -C build -j4

Run a SystemC simulation

You need to have a firmware image available. Examples can be found in the Freedom Studio which can be found at https://www.sifive.com/products/tools/ or at https://git.minres.com/DVCon2018/Firmware/src/branch/master/riscv-bldc-forced-commutation

    build/bin/riscv.vp -v4 -t1 -c system.json -l <path to FW ELF file>

If you get a SystemC error E115 please execute it as

    SC_SIGNAL_WRITE_CHECK=DISABLE build/bin/riscv.vp -v4 -t1 -c system.json -l <path to FW ELF file>