import "CoreDSL-Instruction-Set-Description/RISCVBase.core_desc"
import "CoreDSL-Instruction-Set-Description/RV32I.core_desc"
import "CoreDSL-Instruction-Set-Description/RVM.core_desc"
import "CoreDSL-Instruction-Set-Description/RVC.core_desc"

InstructionSet X_RB_MAC extends RISCVBase {
  architectural_state {
    register unsigned<64> ACC;
  }

  instructions {
    RESET_ACC { // v-- funct7       v-- funct3
      encoding: 7'd0 :: 10'b0 :: 3'd0 :: 5'b0 :: 7'b0001011;
      behavior: ACC = 0;
    }
    
    GET_ACC_LO {
      encoding: 7'd1 :: 10'b0 :: 3'd0 :: rd[4:0] :: 7'b0001011;
      behavior: if (rd != 0) X[rd] = ACC[31:0];
    }
    
    GET_ACC_HI {
      encoding: 7'd2 :: 10'b0 :: 3'd0 :: rd[4:0] :: 7'b0001011;
      behavior: if (rd != 0) X[rd] = ACC[63:32];
    }
    
    MACU_32 {
      encoding: 7'd0 :: rs2[4:0] :: rs1[4:0] :: 3'd1 :: 5'b0 :: 7'b0001011;
      behavior: {
        unsigned<64> mul = X[rs1]    * X[rs2];
        unsigned<33> add = mul[31:0] + ACC[31:0];
        ACC = add[31:0];
      }
    }
    
    MACS_32 {
      encoding: 7'd1 :: rs2[4:0] :: rs1[4:0] :: 3'd1 :: 5'b0 :: 7'b0001011;
      behavior: {
        signed<64> mul = ((signed) X[rs1])    * ((signed) X[rs2]);
        signed<33> add = ((signed) mul[31:0]) + ((signed) ACC[31:0]);
        ACC = add[31:0]; // bit range always yields unsigned type
      }
    }
    
    MACU_64 {
      encoding: 7'd0 :: rs2[4:0] :: rs1[4:0] :: 3'd2 :: 5'b0 :: 7'b0001011;
      behavior: {
        unsigned<64> mul = X[rs1] * X[rs2];
        unsigned<65> add = mul    + ACC;
        ACC = add[63:0];
      }
    }
    
    MACS_64 {
      encoding: 7'd1 :: rs2[4:0] :: rs1[4:0] :: 3'd2 :: 5'b0 :: 7'b0001011;
      behavior: {
        signed<64> mul = ((signed) X[rs1]) * ((signed) X[rs2]);
        signed<65> add =           mul     + ((signed) ACC);
        ACC = add[63:0];
      }
    }
  }
}

Core TGC_D_XRB_MAC provides RV32I, Zicsr, Zifencei, RV32M, RV32IC, X_RB_MAC {
    architectural_state {
        XLEN=32;
        // definitions for the architecture wrapper
        //                    XL    ZYXWVUTSRQPONMLKJIHGFEDCBA
        unsigned MISA_VAL = 0b01000000000000000001000100000100;
        unsigned MARCHID_VAL = 0x80000004;
    }
}