hello: file format elf32-littleriscv
Disassembly of section .init:
00000020 <_start>:
.section .init
.globl _start
.type _start,@function
_start:
la gp, _gp
20: 10000197 auipc gp,0x10000
24: 7e018193 addi gp,gp,2016 # 10000800 <_gp>
la sp, _sp
28: 10004117 auipc sp,0x10004
2c: fd810113 addi sp,sp,-40 # 10004000 <_sp>
/* Load data section */
la a0, _data_lma
30: 00001517 auipc a0,0x1
34: 72850513 addi a0,a0,1832 # 1758 <_data_lma>
la a1, _data
38: 10000597 auipc a1,0x10000
3c: fc858593 addi a1,a1,-56 # 10000000 <_data>
la a2, _edata
40: 10000617 auipc a2,0x10000
44: fc860613 addi a2,a2,-56 # 10000008 <__bss_start>
bgeu a1, a2, 2f
48: 00c5fc63 bgeu a1,a2,60 <_start+0x40>
1:
lw t0, (a0)
4c: 00052283 lw t0,0(a0)
sw t0, (a1)
50: 0055a023 sw t0,0(a1)
addi a0, a0, 4
54: 00450513 addi a0,a0,4
addi a1, a1, 4
58: 00458593 addi a1,a1,4
bltu a1, a2, 1b
5c: fec5e8e3 bltu a1,a2,4c <_start+0x2c>
2:
/* Clear bss section */
la a0, __bss_start
60: 10000517 auipc a0,0x10000
64: fa850513 addi a0,a0,-88 # 10000008 <__bss_start>
la a1, _end
68: 10000597 auipc a1,0x10000
6c: fa058593 addi a1,a1,-96 # 10000008 <__bss_start>
bgeu a0, a1, 2f
70: 00b57863 bgeu a0,a1,80 <_start+0x60>
1:
sw zero, (a0)
74: 00052023 sw zero,0(a0)
addi a0, a0, 4
78: 00450513 addi a0,a0,4
bltu a0, a1, 1b
7c: feb56ce3 bltu a0,a1,74 <_start+0x54>
fssr x0
1:
#endif
/* argc = argv = 0 */
li a0, 0
80: 00000513 li a0,0
li a1, 0
84: 00000593 li a1,0
call main
88: 008000ef jal ra,90 <main>
tail _exit
8c: 3300006f j 3bc <__wrap__exit>
Disassembly of section .text:
00000090 <main>:
return result;
}
int main()
{
90: fe010113 addi sp,sp,-32
volatile int result = 1;
94: 00100793 li a5,1
{
98: 00812c23 sw s0,24(sp)
9c: 00912a23 sw s1,20(sp)
a0: 00112e23 sw ra,28(sp)
volatile int result = 1;
a4: 00f12623 sw a5,12(sp)
for (int ii = 1; ii <= i; ii++) {
a8: 00100413 li s0,1
ac: 00b00493 li s1,11
result = result * ii;
b0: 00c12503 lw a0,12(sp)
b4: 00040593 mv a1,s0
for (int ii = 1; ii <= i; ii++) {
b8: 00140413 addi s0,s0,1
result = result * ii;
bc: 2b0010ef jal ra,136c <__mulsi3>
c0: 00a12623 sw a0,12(sp)
for (int ii = 1; ii <= i; ii++) {
c4: fe9416e3 bne s0,s1,b0 <main+0x20>
return result;
c8: 00c12783 lw a5,12(sp)
// *(uint32_t*)(GPIO_CTRL_ADDR+GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
// *(uint32_t*)(GPIO_CTRL_ADDR+GPIO_IOF_EN) |= IOF0_UART0_MASK;
volatile int result = factorial (10);
printf("Factorial is %d\n", result);
cc: 00001517 auipc a0,0x1
d0: 3c450513 addi a0,a0,964 # 1490 <__clzsi2+0x4c>
volatile int result = factorial (10);
d4: 00f12423 sw a5,8(sp)
printf("Factorial is %d\n", result);
d8: 00812583 lw a1,8(sp)
dc: 285000ef jal ra,b60 <__wrap_printf>
printf("End of execution");
e0: 00001517 auipc a0,0x1
e4: 3c450513 addi a0,a0,964 # 14a4 <__clzsi2+0x60>
e8: 279000ef jal ra,b60 <__wrap_printf>
return 0;
}
ec: 01c12083 lw ra,28(sp)
f0: 01812403 lw s0,24(sp)
f4: 01412483 lw s1,20(sp)
f8: 00000513 li a0,0
fc: 02010113 addi sp,sp,32
100: 00008067 ret
00000104 <trap_entry>:
.section .text.entry
.align 2
.global trap_entry
trap_entry:
addi sp, sp, -32*REGBYTES
104: f8010113 addi sp,sp,-128
STORE x1, 1*REGBYTES(sp)
108: 00112223 sw ra,4(sp)
STORE x2, 2*REGBYTES(sp)
10c: 00212423 sw sp,8(sp)
STORE x3, 3*REGBYTES(sp)
110: 00312623 sw gp,12(sp)
STORE x4, 4*REGBYTES(sp)
114: 00412823 sw tp,16(sp)
STORE x5, 5*REGBYTES(sp)
118: 00512a23 sw t0,20(sp)
STORE x6, 6*REGBYTES(sp)
11c: 00612c23 sw t1,24(sp)
STORE x7, 7*REGBYTES(sp)
120: 00712e23 sw t2,28(sp)
STORE x8, 8*REGBYTES(sp)
124: 02812023 sw s0,32(sp)
STORE x9, 9*REGBYTES(sp)
128: 02912223 sw s1,36(sp)
STORE x10, 10*REGBYTES(sp)
12c: 02a12423 sw a0,40(sp)
STORE x11, 11*REGBYTES(sp)
130: 02b12623 sw a1,44(sp)
STORE x12, 12*REGBYTES(sp)
134: 02c12823 sw a2,48(sp)
STORE x13, 13*REGBYTES(sp)
138: 02d12a23 sw a3,52(sp)
STORE x14, 14*REGBYTES(sp)
13c: 02e12c23 sw a4,56(sp)
STORE x15, 15*REGBYTES(sp)
140: 02f12e23 sw a5,60(sp)
#ifndef __riscv_abi_rve
STORE x16, 16*REGBYTES(sp)
144: 05012023 sw a6,64(sp)
STORE x17, 17*REGBYTES(sp)
148: 05112223 sw a7,68(sp)
STORE x18, 18*REGBYTES(sp)
14c: 05212423 sw s2,72(sp)
STORE x19, 19*REGBYTES(sp)
150: 05312623 sw s3,76(sp)
STORE x20, 20*REGBYTES(sp)
154: 05412823 sw s4,80(sp)
STORE x21, 21*REGBYTES(sp)
158: 05512a23 sw s5,84(sp)
STORE x22, 22*REGBYTES(sp)
15c: 05612c23 sw s6,88(sp)
STORE x23, 23*REGBYTES(sp)
160: 05712e23 sw s7,92(sp)
STORE x24, 24*REGBYTES(sp)
164: 07812023 sw s8,96(sp)
STORE x25, 25*REGBYTES(sp)
168: 07912223 sw s9,100(sp)
STORE x26, 26*REGBYTES(sp)
16c: 07a12423 sw s10,104(sp)
STORE x27, 27*REGBYTES(sp)
170: 07b12623 sw s11,108(sp)
STORE x28, 28*REGBYTES(sp)
174: 07c12823 sw t3,112(sp)
STORE x29, 29*REGBYTES(sp)
178: 07d12a23 sw t4,116(sp)
STORE x30, 30*REGBYTES(sp)
17c: 07e12c23 sw t5,120(sp)
STORE x31, 31*REGBYTES(sp)
180: 07f12e23 sw t6,124(sp)
#endif
csrr a0, mcause
184: 34202573 csrr a0,mcause
csrr a1, mepc
188: 341025f3 csrr a1,mepc
mv a2, sp
18c: 00010613 mv a2,sp
call handle_trap
190: 11c000ef jal ra,2ac <handle_trap>
csrw mepc, a0
194: 34151073 csrw mepc,a0
# Remain in M-mode after mret
li t0, MSTATUS_MPP
198: 000022b7 lui t0,0x2
19c: 80028293 addi t0,t0,-2048 # 1800 <_data_lma+0xa8>
csrs mstatus, t0
1a0: 3002a073 csrs mstatus,t0
LOAD x1, 1*REGBYTES(sp)
1a4: 00412083 lw ra,4(sp)
LOAD x2, 2*REGBYTES(sp)
1a8: 00812103 lw sp,8(sp)
LOAD x3, 3*REGBYTES(sp)
1ac: 00c12183 lw gp,12(sp)
LOAD x4, 4*REGBYTES(sp)
1b0: 01012203 lw tp,16(sp)
LOAD x5, 5*REGBYTES(sp)
1b4: 01412283 lw t0,20(sp)
LOAD x6, 6*REGBYTES(sp)
1b8: 01812303 lw t1,24(sp)
LOAD x7, 7*REGBYTES(sp)
1bc: 01c12383 lw t2,28(sp)
LOAD x8, 8*REGBYTES(sp)
1c0: 02012403 lw s0,32(sp)
LOAD x9, 9*REGBYTES(sp)
1c4: 02412483 lw s1,36(sp)
LOAD x10, 10*REGBYTES(sp)
1c8: 02812503 lw a0,40(sp)
LOAD x11, 11*REGBYTES(sp)
1cc: 02c12583 lw a1,44(sp)
LOAD x12, 12*REGBYTES(sp)
1d0: 03012603 lw a2,48(sp)
LOAD x13, 13*REGBYTES(sp)
1d4: 03412683 lw a3,52(sp)
LOAD x14, 14*REGBYTES(sp)
1d8: 03812703 lw a4,56(sp)
LOAD x15, 15*REGBYTES(sp)
1dc: 03c12783 lw a5,60(sp)
#ifndef __riscv_abi_rve
LOAD x16, 16*REGBYTES(sp)
1e0: 04012803 lw a6,64(sp)
LOAD x17, 17*REGBYTES(sp)
1e4: 04412883 lw a7,68(sp)
LOAD x18, 18*REGBYTES(sp)
1e8: 04812903 lw s2,72(sp)
LOAD x19, 19*REGBYTES(sp)
1ec: 04c12983 lw s3,76(sp)
LOAD x20, 20*REGBYTES(sp)
1f0: 05012a03 lw s4,80(sp)
LOAD x21, 21*REGBYTES(sp)
1f4: 05412a83 lw s5,84(sp)
LOAD x22, 22*REGBYTES(sp)
1f8: 05812b03 lw s6,88(sp)
LOAD x23, 23*REGBYTES(sp)
1fc: 05c12b83 lw s7,92(sp)
LOAD x24, 24*REGBYTES(sp)
200: 06012c03 lw s8,96(sp)
LOAD x25, 25*REGBYTES(sp)
204: 06412c83 lw s9,100(sp)
LOAD x26, 26*REGBYTES(sp)
208: 06812d03 lw s10,104(sp)
LOAD x27, 27*REGBYTES(sp)
20c: 06c12d83 lw s11,108(sp)
LOAD x28, 28*REGBYTES(sp)
210: 07012e03 lw t3,112(sp)
LOAD x29, 29*REGBYTES(sp)
214: 07412e83 lw t4,116(sp)
LOAD x30, 30*REGBYTES(sp)
218: 07812f03 lw t5,120(sp)
LOAD x31, 31*REGBYTES(sp)
21c: 07c12f83 lw t6,124(sp)
#endif
addi sp, sp, 32*REGBYTES
220: 08010113 addi sp,sp,128
mret
224: 30200073 mret
.weak handle_trap
handle_trap:
1:
j 1b
228: 0000006f j 228 <trap_entry+0x124>
0000022c <factorial>:
int factorial(int i){
22c: fe010113 addi sp,sp,-32
volatile int result = 1;
230: 00100793 li a5,1
int factorial(int i){
234: 00112e23 sw ra,28(sp)
238: 00812c23 sw s0,24(sp)
23c: 00912a23 sw s1,20(sp)
volatile int result = 1;
240: 00f12623 sw a5,12(sp)
for (int ii = 1; ii <= i; ii++) {
244: 02a05263 blez a0,268 <factorial+0x3c>
248: 00150493 addi s1,a0,1
24c: 00100413 li s0,1
result = result * ii;
250: 00c12503 lw a0,12(sp)
254: 00040593 mv a1,s0
for (int ii = 1; ii <= i; ii++) {
258: 00140413 addi s0,s0,1
result = result * ii;
25c: 110010ef jal ra,136c <__mulsi3>
260: 00a12623 sw a0,12(sp)
for (int ii = 1; ii <= i; ii++) {
264: fe9416e3 bne s0,s1,250 <factorial+0x24>
}
268: 01c12083 lw ra,28(sp)
26c: 01812403 lw s0,24(sp)
return result;
270: 00c12503 lw a0,12(sp)
}
274: 01412483 lw s1,20(sp)
278: 02010113 addi sp,sp,32
27c: 00008067 ret
00000280 <get_timer_value>:
#if __riscv_xlen==32
static uint32_t mtime_hi(void)
{
unsigned long ret;
__asm volatile("rdtimeh %0":"=r"(ret));
280: c81027f3 rdtimeh a5
__asm volatile("rdtime %0":"=r"(ret));
284: c0102573 rdtime a0
__asm volatile("rdtimeh %0":"=r"(ret));
288: c81025f3 rdtimeh a1
uint64_t get_timer_value()
{
while (1) {
uint32_t hi = mtime_hi();
uint32_t lo = mtime_lo();
if (hi == mtime_hi())
28c: fef59ae3 bne a1,a5,280 <get_timer_value>
return ((uint64_t)hi << 32) | lo;
}
}
290: 00008067 ret
00000294 <get_timer_freq>:
#endif
unsigned long get_timer_freq()
{
return 32768;
}
294: 00008537 lui a0,0x8
298: 00008067 ret
0000029c <get_cpu_freq>:
unsigned long get_cpu_freq()
{
return 10000000;
29c: 00989537 lui a0,0x989
}
2a0: 68050513 addi a0,a0,1664 # 989680 <_data_lma+0x987f28>
2a4: 00008067 ret
000002a8 <init_pll>:
void init_pll(void){
}
2a8: 00008067 ret
000002ac <handle_trap>:
#ifdef USE_M_TIME
extern void handle_m_time_interrupt();
#endif
uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
{
2ac: ff010113 addi sp,sp,-16
2b0: 00812423 sw s0,8(sp)
} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
handle_m_time_interrupt();
#endif
}
else {
write(1, "trap\n", 5);
2b4: 00500613 li a2,5
{
2b8: 00050413 mv s0,a0
write(1, "trap\n", 5);
2bc: 00001597 auipc a1,0x1
2c0: 1fc58593 addi a1,a1,508 # 14b8 <__clzsi2+0x74>
2c4: 00100513 li a0,1
{
2c8: 00112623 sw ra,12(sp)
write(1, "trap\n", 5);
2cc: 05c000ef jal ra,328 <__wrap_write>
_exit(1 + mcause);
2d0: 00140513 addi a0,s0,1
2d4: 0e8000ef jal ra,3bc <__wrap__exit>
000002d8 <_init>:
void _init()
{
#ifndef NO_INIT
init_pll();
printf("core freq at %d Hz\n", get_cpu_freq());
2d8: 009895b7 lui a1,0x989
{
2dc: ff010113 addi sp,sp,-16
printf("core freq at %d Hz\n", get_cpu_freq());
2e0: 68058593 addi a1,a1,1664 # 989680 <_data_lma+0x987f28>
2e4: 00001517 auipc a0,0x1
2e8: 1dc50513 addi a0,a0,476 # 14c0 <__clzsi2+0x7c>
{
2ec: 00112623 sw ra,12(sp)
printf("core freq at %d Hz\n", get_cpu_freq());
2f0: 071000ef jal ra,b60 <__wrap_printf>
write_csr(mtvec, &trap_entry);
2f4: 00000797 auipc a5,0x0
2f8: e1078793 addi a5,a5,-496 # 104 <trap_entry>
2fc: 30579073 csrw mtvec,a5
if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
300: 301027f3 csrr a5,misa
304: 0207f793 andi a5,a5,32
308: 00078863 beqz a5,318 <_init+0x40>
write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
30c: 000067b7 lui a5,0x6
310: 30079073 csrw mstatus,a5
write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
314: 00305073 csrwi fcsr,0
}
#endif
}
318: 00c12083 lw ra,12(sp)
31c: 01010113 addi sp,sp,16
320: 00008067 ret
00000324 <_fini>:
void _fini()
{
}
324: 00008067 ret
00000328 <__wrap_write>:
#include "platform.h"
#include "stub.h"
ssize_t __wrap_write(int fd, const void* ptr, size_t len)
{
328: ff010113 addi sp,sp,-16
32c: 00812423 sw s0,8(sp)
330: 00912223 sw s1,4(sp)
334: 00112623 sw ra,12(sp)
338: 00058413 mv s0,a1
33c: 00060493 mv s1,a2
const uint8_t * current = (const char *)ptr;
if (isatty(fd)) {
340: 070000ef jal ra,3b0 <__wrap_isatty>
344: 06050263 beqz a0,3a8 <__wrap_write+0x80>
for (size_t jj = 0; jj < len; jj++) {
348: 02048c63 beqz s1,380 <__wrap_write+0x58>
34c: 00040593 mv a1,s0
350: 00940833 add a6,s0,s1
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
354: ffff0737 lui a4,0xffff0
UART0_REG(UART_REG_TXFIFO) = current[jj];
if (current[jj] == '\n') {
358: 00a00693 li a3,10
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
UART0_REG(UART_REG_TXFIFO) = '\r';
35c: 00d00613 li a2,13
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
360: 00072783 lw a5,0(a4) # ffff0000 <tohost+0xffff0010>
364: fe07cee3 bltz a5,360 <__wrap_write+0x38>
UART0_REG(UART_REG_TXFIFO) = current[jj];
368: 0005c783 lbu a5,0(a1)
36c: 00f72023 sw a5,0(a4)
if (current[jj] == '\n') {
370: 0005c783 lbu a5,0(a1)
374: 02d78263 beq a5,a3,398 <__wrap_write+0x70>
for (size_t jj = 0; jj < len; jj++) {
378: 00158593 addi a1,a1,1
37c: ff0592e3 bne a1,a6,360 <__wrap_write+0x38>
}
}
return len;
380: 00048513 mv a0,s1
}
return _stub(EBADF);
}
384: 00c12083 lw ra,12(sp)
388: 00812403 lw s0,8(sp)
38c: 00412483 lw s1,4(sp)
390: 01010113 addi sp,sp,16
394: 00008067 ret
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
398: 00072783 lw a5,0(a4)
39c: fe07cee3 bltz a5,398 <__wrap_write+0x70>
UART0_REG(UART_REG_TXFIFO) = '\r';
3a0: 00c72023 sw a2,0(a4)
3a4: fd5ff06f j 378 <__wrap_write+0x50>
return _stub(EBADF);
3a8: fff00513 li a0,-1
3ac: fd9ff06f j 384 <__wrap_write+0x5c>
000003b0 <__wrap_isatty>:
#include <unistd.h>
int __wrap_isatty(int fd)
{
if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
3b0: fff50513 addi a0,a0,-1
return 1;
return 0;
}
3b4: 00253513 sltiu a0,a0,2
3b8: 00008067 ret
000003bc <__wrap__exit>:
extern volatile uint32_t fromhost;
void __wrap__exit(int code)
{
//volatile uint32_t* leds = (uint32_t*) (GPIO_BASE_ADDR + GPIO_OUT_OFFSET);
const char message[] = "\nProgam has exited with code:";
3bc: 00001797 auipc a5,0x1
3c0: 11878793 addi a5,a5,280 # 14d4 <__clzsi2+0x90>
3c4: 0007ae83 lw t4,0(a5)
3c8: 0047ae03 lw t3,4(a5)
3cc: 0087a303 lw t1,8(a5)
3d0: 00c7a883 lw a7,12(a5)
3d4: 0107a803 lw a6,16(a5)
3d8: 0147a683 lw a3,20(a5)
3dc: 0187a703 lw a4,24(a5)
3e0: 01c7d783 lhu a5,28(a5)
{
3e4: fd010113 addi sp,sp,-48
//*leds = (~(code));
write(STDERR_FILENO, message, sizeof(message) - 1);
3e8: 01d00613 li a2,29
{
3ec: 02812423 sw s0,40(sp)
write(STDERR_FILENO, message, sizeof(message) - 1);
3f0: 00010593 mv a1,sp
{
3f4: 00050413 mv s0,a0
write(STDERR_FILENO, message, sizeof(message) - 1);
3f8: 00200513 li a0,2
const char message[] = "\nProgam has exited with code:";
3fc: 00f11e23 sh a5,28(sp)
{
400: 02112623 sw ra,44(sp)
const char message[] = "\nProgam has exited with code:";
404: 01d12023 sw t4,0(sp)
408: 01c12223 sw t3,4(sp)
40c: 00612423 sw t1,8(sp)
410: 01112623 sw a7,12(sp)
414: 01012823 sw a6,16(sp)
418: 00d12a23 sw a3,20(sp)
41c: 00e12c23 sw a4,24(sp)
write(STDERR_FILENO, message, sizeof(message) - 1);
420: f09ff0ef jal ra,328 <__wrap_write>
write_hex(STDERR_FILENO, code);
424: 00040593 mv a1,s0
428: 00200513 li a0,2
42c: 028000ef jal ra,454 <write_hex>
write(STDERR_FILENO, "\n", 1);
430: 00100613 li a2,1
434: 00001597 auipc a1,0x1
438: 08858593 addi a1,a1,136 # 14bc <__clzsi2+0x78>
43c: 00200513 li a0,2
tohost = code+1;
440: 00140413 addi s0,s0,1
write(STDERR_FILENO, "\n", 1);
444: ee5ff0ef jal ra,328 <__wrap_write>
tohost = code+1;
448: 00000797 auipc a5,0x0
44c: ba87a423 sw s0,-1112(a5) # fffffff0 <tohost+0x0>
for (;;);
450: 0000006f j 450 <__wrap__exit+0x94>
00000454 <write_hex>:
#include <stdint.h>
#include <unistd.h>
#include "platform.h"
void write_hex(int fd, uint32_t hex)
{
454: fd010113 addi sp,sp,-48
458: 02912223 sw s1,36(sp)
uint8_t ii;
uint8_t jj;
char towrite;
write(fd , "0x", 2);
45c: 00200613 li a2,2
{
460: 00058493 mv s1,a1
write(fd , "0x", 2);
464: 00001597 auipc a1,0x1
468: 09058593 addi a1,a1,144 # 14f4 <__clzsi2+0xb0>
{
46c: 02812423 sw s0,40(sp)
470: 03212023 sw s2,32(sp)
474: 01312e23 sw s3,28(sp)
478: 01412c23 sw s4,24(sp)
47c: 01512a23 sw s5,20(sp)
480: 02112623 sw ra,44(sp)
484: 00050913 mv s2,a0
write(fd , "0x", 2);
488: 01c00413 li s0,28
48c: e9dff0ef jal ra,328 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
jj = ii - 1;
uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
490: 00f00a93 li s5,15
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
494: 00900a13 li s4,9
for (ii = 8 ; ii > 0; ii--) {
498: ffc00993 li s3,-4
49c: 0240006f j 4c0 <write_hex+0x6c>
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
4a0: 0ff6f793 zext.b a5,a3
for (ii = 8 ; ii > 0; ii--) {
4a4: ffc40413 addi s0,s0,-4
write(fd, &towrite, 1);
4a8: 00100613 li a2,1
4ac: 00f10593 addi a1,sp,15
4b0: 00090513 mv a0,s2
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
4b4: 00f107a3 sb a5,15(sp)
write(fd, &towrite, 1);
4b8: e71ff0ef jal ra,328 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
4bc: 05340063 beq s0,s3,4fc <write_hex+0xa8>
uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
4c0: 008a97b3 sll a5,s5,s0
4c4: 0097f7b3 and a5,a5,s1
4c8: 0087d7b3 srl a5,a5,s0
4cc: 0ff7f793 zext.b a5,a5
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
4d0: 03078693 addi a3,a5,48
4d4: 03778713 addi a4,a5,55
4d8: fcfa74e3 bgeu s4,a5,4a0 <write_hex+0x4c>
4dc: 0ff77793 zext.b a5,a4
for (ii = 8 ; ii > 0; ii--) {
4e0: ffc40413 addi s0,s0,-4
write(fd, &towrite, 1);
4e4: 00100613 li a2,1
4e8: 00f10593 addi a1,sp,15
4ec: 00090513 mv a0,s2
towrite = digit < 0xA ? ('0' + digit) : ('A' + (digit - 0xA));
4f0: 00f107a3 sb a5,15(sp)
write(fd, &towrite, 1);
4f4: e35ff0ef jal ra,328 <__wrap_write>
for (ii = 8 ; ii > 0; ii--) {
4f8: fd3414e3 bne s0,s3,4c0 <write_hex+0x6c>
}
}
4fc: 02c12083 lw ra,44(sp)
500: 02812403 lw s0,40(sp)
504: 02412483 lw s1,36(sp)
508: 02012903 lw s2,32(sp)
50c: 01c12983 lw s3,28(sp)
510: 01812a03 lw s4,24(sp)
514: 01412a83 lw s5,20(sp)
518: 03010113 addi sp,sp,48
51c: 00008067 ret
00000520 <sprintf_putch>:
}
static void sprintf_putch(int ch, void** data)
{
char** pstr = (char**)data;
**pstr = ch;
520: 0005a783 lw a5,0(a1)
524: 00a78023 sb a0,0(a5)
(*pstr)++;
528: 0005a783 lw a5,0(a1)
52c: 00178793 addi a5,a5,1
530: 00f5a023 sw a5,0(a1)
}
534: 00008067 ret
00000538 <putchar>:
{
538: fe010113 addi sp,sp,-32
53c: 00a12623 sw a0,12(sp)
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
540: 00100613 li a2,1
544: 00c10593 addi a1,sp,12
548: 00100513 li a0,1
{
54c: 00112e23 sw ra,28(sp)
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
550: dd9ff0ef jal ra,328 <__wrap_write>
554: 00100793 li a5,1
558: 00f51a63 bne a0,a5,56c <putchar+0x34>
55c: 00c12503 lw a0,12(sp)
}
560: 01c12083 lw ra,28(sp)
564: 02010113 addi sp,sp,32
568: 00008067 ret
return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
56c: fff00513 li a0,-1
570: ff1ff06f j 560 <putchar+0x28>
00000574 <vprintfmt>:
for (char* p = buf; p < pbuf; p++)
putch(*p, putdat);
}
static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt, va_list ap)
{
574: f1010113 addi sp,sp,-240
578: 0d512a23 sw s5,212(sp)
57c: 40000ab7 lui s5,0x40000
580: fffa8793 addi a5,s5,-1 # 3fffffff <_sp+0x2fffbfff>
584: 0d912223 sw s9,196(sp)
u.u &= ~(1ULL << 63);
588: 80000cb7 lui s9,0x80000
58c: 00f12223 sw a5,4(sp)
590: fffcc793 not a5,s9
{
594: 0e812423 sw s0,232(sp)
598: 0e912223 sw s1,228(sp)
59c: 0f212023 sw s2,224(sp)
5a0: 0d312e23 sw s3,220(sp)
5a4: 0e112623 sw ra,236(sp)
5a8: 0d412c23 sw s4,216(sp)
5ac: 0d612823 sw s6,208(sp)
5b0: 0d712623 sw s7,204(sp)
5b4: 0d812423 sw s8,200(sp)
5b8: 0da12023 sw s10,192(sp)
5bc: 0bb12e23 sw s11,188(sp)
5c0: 00050913 mv s2,a0
5c4: 00058493 mv s1,a1
5c8: 00060413 mv s0,a2
5cc: 00d12023 sw a3,0(sp)
unsigned long num;
int base, lflag, width, precision, altflag;
char padc;
while (1) {
while ((ch = *(unsigned char *) fmt) != '%') {
5d0: 02500993 li s3,37
u.u &= ~(1ULL << 63);
5d4: 00f12423 sw a5,8(sp)
while ((ch = *(unsigned char *) fmt) != '%') {
5d8: 0140006f j 5ec <vprintfmt+0x78>
if (ch == '\0')
5dc: 06050263 beqz a0,640 <vprintfmt+0xcc>
return;
fmt++;
putch(ch, putdat);
5e0: 00048593 mv a1,s1
fmt++;
5e4: 00140413 addi s0,s0,1
putch(ch, putdat);
5e8: 000900e7 jalr s2
while ((ch = *(unsigned char *) fmt) != '%') {
5ec: 00044503 lbu a0,0(s0)
5f0: ff3516e3 bne a0,s3,5dc <vprintfmt+0x68>
width = -1;
precision = -1;
lflag = 0;
altflag = 0;
reswitch:
switch (ch = *(unsigned char *) fmt++) {
5f4: 00144683 lbu a3,1(s0)
fmt++;
5f8: 00140d93 addi s11,s0,1
5fc: 000d8713 mv a4,s11
padc = ' ';
600: 02000b93 li s7,32
precision = -1;
604: fff00d13 li s10,-1
width = -1;
608: fff00b13 li s6,-1
switch (ch = *(unsigned char *) fmt++) {
60c: 05500593 li a1,85
case '8':
case '9':
for (precision = 0; ; ++fmt) {
precision = precision * 10 + ch - '0';
ch = *fmt;
if (ch < '0' || ch > '9')
610: 00900513 li a0,9
switch (ch = *(unsigned char *) fmt++) {
614: fdd68793 addi a5,a3,-35
618: 0ff7f793 zext.b a5,a5
61c: 00170413 addi s0,a4,1
620: 06f5ec63 bltu a1,a5,698 <vprintfmt+0x124>
624: 00001617 auipc a2,0x1
628: edc60613 addi a2,a2,-292 # 1500 <__clzsi2+0xbc>
62c: 00279793 slli a5,a5,0x2
630: 00c787b3 add a5,a5,a2
634: 0007a783 lw a5,0(a5)
638: 00c787b3 add a5,a5,a2
63c: 00078067 jr a5
putch('%', putdat);
fmt = last_fmt;
break;
}
}
}
640: 0ec12083 lw ra,236(sp)
644: 0e812403 lw s0,232(sp)
648: 0e412483 lw s1,228(sp)
64c: 0e012903 lw s2,224(sp)
650: 0dc12983 lw s3,220(sp)
654: 0d812a03 lw s4,216(sp)
658: 0d412a83 lw s5,212(sp)
65c: 0d012b03 lw s6,208(sp)
660: 0cc12b83 lw s7,204(sp)
664: 0c812c03 lw s8,200(sp)
668: 0c412c83 lw s9,196(sp)
66c: 0c012d03 lw s10,192(sp)
670: 0bc12d83 lw s11,188(sp)
674: 0f010113 addi sp,sp,240
678: 00008067 ret
padc = '0';
67c: 00068b93 mv s7,a3
goto reswitch;
680: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
684: 00040713 mv a4,s0
688: 00170413 addi s0,a4,1
68c: fdd68793 addi a5,a3,-35
690: 0ff7f793 zext.b a5,a5
694: f8f5f8e3 bgeu a1,a5,624 <vprintfmt+0xb0>
putch('%', putdat);
698: 00048593 mv a1,s1
69c: 02500513 li a0,37
6a0: 000900e7 jalr s2
fmt = last_fmt;
6a4: 000d8413 mv s0,s11
break;
6a8: f45ff06f j 5ec <vprintfmt+0x78>
ch = *fmt;
6ac: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
6b0: 00040713 mv a4,s0
goto reswitch;
6b4: f61ff06f j 614 <vprintfmt+0xa0>
ch = *fmt;
6b8: 00174603 lbu a2,1(a4)
precision = precision * 10 + ch - '0';
6bc: fd068d13 addi s10,a3,-48
switch (ch = *(unsigned char *) fmt++) {
6c0: 00040713 mv a4,s0
if (ch < '0' || ch > '9')
6c4: fd060793 addi a5,a2,-48
ch = *fmt;
6c8: 00060693 mv a3,a2
if (ch < '0' || ch > '9')
6cc: 02f56663 bltu a0,a5,6f8 <vprintfmt+0x184>
precision = precision * 10 + ch - '0';
6d0: 002d1793 slli a5,s10,0x2
6d4: 01a787b3 add a5,a5,s10
for (precision = 0; ; ++fmt) {
6d8: 00170713 addi a4,a4,1
precision = precision * 10 + ch - '0';
6dc: 00179793 slli a5,a5,0x1
6e0: 00c787b3 add a5,a5,a2
ch = *fmt;
6e4: 00074603 lbu a2,0(a4)
precision = precision * 10 + ch - '0';
6e8: fd078d13 addi s10,a5,-48
if (ch < '0' || ch > '9')
6ec: fd060793 addi a5,a2,-48
ch = *fmt;
6f0: 00060693 mv a3,a2
if (ch < '0' || ch > '9')
6f4: fcf57ee3 bgeu a0,a5,6d0 <vprintfmt+0x15c>
if (width < 0)
6f8: f00b5ee3 bgez s6,614 <vprintfmt+0xa0>
width = precision, precision = -1;
6fc: 000d0b13 mv s6,s10
700: fff00d13 li s10,-1
704: f11ff06f j 614 <vprintfmt+0xa0>
putch(ch, putdat);
708: 00048593 mv a1,s1
70c: 02500513 li a0,37
710: 000900e7 jalr s2
break;
714: ed9ff06f j 5ec <vprintfmt+0x78>
precision = va_arg(ap, int);
718: 00012783 lw a5,0(sp)
ch = *fmt;
71c: 00174683 lbu a3,1(a4)
switch (ch = *(unsigned char *) fmt++) {
720: 00040713 mv a4,s0
precision = va_arg(ap, int);
724: 0007ad03 lw s10,0(a5)
728: 00478793 addi a5,a5,4
72c: 00f12023 sw a5,0(sp)
goto process_precision;
730: fc9ff06f j 6f8 <vprintfmt+0x184>
switch (ch = *(unsigned char *) fmt++) {
734: 01000a93 li s5,16
return va_arg(*ap, unsigned int);
738: 00012783 lw a5,0(sp)
73c: 0007ac03 lw s8,0(a5)
740: 00478793 addi a5,a5,4
744: 00f12023 sw a5,0(sp)
digs[pos++] = num % base;
748: 000a8593 mv a1,s5
74c: 000c0513 mv a0,s8
750: 491000ef jal ra,13e0 <__umodsi3>
754: 02a12823 sw a0,48(sp)
758: 00050d13 mv s10,a0
75c: 03410a13 addi s4,sp,52
760: 00100c93 li s9,1
if (num < base)
764: 355c6e63 bltu s8,s5,ac0 <__stack_size+0x2c0>
num /= base;
768: 000a8593 mv a1,s5
76c: 000c0513 mv a0,s8
770: 429000ef jal ra,1398 <__udivsi3>
digs[pos++] = num % base;
774: 000a8593 mv a1,s5
num /= base;
778: 00050c13 mv s8,a0
digs[pos++] = num % base;
77c: 465000ef jal ra,13e0 <__umodsi3>
780: 00aa2023 sw a0,0(s4)
784: 000c8d93 mv s11,s9
788: 00050d13 mv s10,a0
if (num < base)
78c: 004a0a13 addi s4,s4,4
digs[pos++] = num % base;
790: 001c8c93 addi s9,s9,1 # 80000001 <tohost+0x80000011>
if (num < base)
794: fd5c7ae3 bgeu s8,s5,768 <vprintfmt+0x1f4>
while (width-- > pos)
798: 016cdc63 bge s9,s6,7b0 <vprintfmt+0x23c>
79c: fffb0b13 addi s6,s6,-1
putch(padc, putdat);
7a0: 00048593 mv a1,s1
7a4: 000b8513 mv a0,s7
7a8: 000900e7 jalr s2
while (width-- > pos)
7ac: ff6cc8e3 blt s9,s6,79c <vprintfmt+0x228>
7b0: 00412783 lw a5,4(sp)
7b4: 02c10b93 addi s7,sp,44
putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
7b8: 00900b13 li s6,9
7bc: 00fd8db3 add s11,s11,a5
7c0: 002d9d93 slli s11,s11,0x2
7c4: 03010793 addi a5,sp,48
7c8: 01b78db3 add s11,a5,s11
7cc: 00c0006f j 7d8 <vprintfmt+0x264>
7d0: 000dad03 lw s10,0(s11)
7d4: ffcd8d93 addi s11,s11,-4
7d8: 01ab37b3 sltu a5,s6,s10
7dc: 40f007b3 neg a5,a5
7e0: 0277f793 andi a5,a5,39
7e4: 03078793 addi a5,a5,48
7e8: 00048593 mv a1,s1
7ec: 01a78533 add a0,a5,s10
7f0: 000900e7 jalr s2
while (pos-- > 0)
7f4: fdbb9ee3 bne s7,s11,7d0 <vprintfmt+0x25c>
7f8: df5ff06f j 5ec <vprintfmt+0x78>
if ((p = va_arg(ap, char *)) == NULL)
7fc: 00012783 lw a5,0(sp)
800: 0007ad83 lw s11,0(a5)
804: 00478a13 addi s4,a5,4
808: 2e0d8c63 beqz s11,b00 <__stack_size+0x300>
if (width > 0 && padc != '-')
80c: 0b605263 blez s6,8b0 <__stack_size+0xb0>
810: 02d00793 li a5,45
814: 04fb9e63 bne s7,a5,870 <__stack_size+0x70>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
818: 000dc503 lbu a0,0(s11)
81c: 02050863 beqz a0,84c <__stack_size+0x4c>
820: fff00b93 li s7,-1
824: 000d4663 bltz s10,830 <__stack_size+0x30>
828: fffd0d13 addi s10,s10,-1
82c: 017d0e63 beq s10,s7,848 <__stack_size+0x48>
putch(ch, putdat);
830: 00048593 mv a1,s1
p++;
834: 001d8d93 addi s11,s11,1
putch(ch, putdat);
838: 000900e7 jalr s2
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
83c: 000dc503 lbu a0,0(s11)
840: fffb0b13 addi s6,s6,-1
844: fe0510e3 bnez a0,824 <__stack_size+0x24>
for (; width > 0; width--)
848: 01605c63 blez s6,860 <__stack_size+0x60>
84c: fffb0b13 addi s6,s6,-1
putch(' ', putdat);
850: 00048593 mv a1,s1
854: 02000513 li a0,32
858: 000900e7 jalr s2
for (; width > 0; width--)
85c: fe0b18e3 bnez s6,84c <__stack_size+0x4c>
if ((p = va_arg(ap, char *)) == NULL)
860: 01412023 sw s4,0(sp)
864: d89ff06f j 5ec <vprintfmt+0x78>
p = "(null)";
868: 00001d97 auipc s11,0x1
86c: c90d8d93 addi s11,s11,-880 # 14f8 <__clzsi2+0xb4>
while (n-- > 0 && *str) str++;
870: 000d8793 mv a5,s11
874: 01ad86b3 add a3,s11,s10
878: 000d1863 bnez s10,888 <__stack_size+0x88>
87c: 0200006f j 89c <__stack_size+0x9c>
880: 00178793 addi a5,a5,1
884: 00d78663 beq a5,a3,890 <__stack_size+0x90>
888: 0007c703 lbu a4,0(a5)
88c: fe071ae3 bnez a4,880 <__stack_size+0x80>
return str - start;
890: 41b787b3 sub a5,a5,s11
for (width -= strnlen(p, precision); width > 0; width--)
894: 40fb0b33 sub s6,s6,a5
898: 01605c63 blez s6,8b0 <__stack_size+0xb0>
89c: fffb0b13 addi s6,s6,-1
putch(padc, putdat);
8a0: 00048593 mv a1,s1
8a4: 000b8513 mv a0,s7
8a8: 000900e7 jalr s2
for (width -= strnlen(p, precision); width > 0; width--)
8ac: fe0b18e3 bnez s6,89c <__stack_size+0x9c>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
8b0: 000dc503 lbu a0,0(s11)
8b4: fa0506e3 beqz a0,860 <__stack_size+0x60>
8b8: fff00b93 li s7,-1
8bc: f69ff06f j 824 <__stack_size+0x24>
putch(va_arg(ap, int), putdat);
8c0: 00012783 lw a5,0(sp)
8c4: 00048593 mv a1,s1
8c8: 0007a503 lw a0,0(a5)
8cc: 00478a13 addi s4,a5,4
8d0: 000900e7 jalr s2
8d4: 01412023 sw s4,0(sp)
break;
8d8: d15ff06f j 5ec <vprintfmt+0x78>
return va_arg(*ap, int);
8dc: 00012783 lw a5,0(sp)
8e0: 0007ac03 lw s8,0(a5)
8e4: 00478a13 addi s4,a5,4
if ((long) num < 0) {
8e8: 000c5a63 bgez s8,8fc <__stack_size+0xfc>
putch('-', putdat);
8ec: 00048593 mv a1,s1
8f0: 02d00513 li a0,45
8f4: 000900e7 jalr s2
num = -(long) num;
8f8: 41800c33 neg s8,s8
return va_arg(*ap, int);
8fc: 01412023 sw s4,0(sp)
num = -(long) num;
900: 00a00a93 li s5,10
904: e45ff06f j 748 <vprintfmt+0x1d4>
print_double(putch, putdat, va_arg(ap, double), width, precision);
908: 00012783 lw a5,0(sp)
90c: 00778a13 addi s4,a5,7
910: ff8a7a13 andi s4,s4,-8
914: 004a2d83 lw s11,4(s4)
918: 000a2a83 lw s5,0(s4)
91c: 008a0793 addi a5,s4,8
920: 00f12023 sw a5,0(sp)
u.d = num;
924: 000d8713 mv a4,s11
928: 000a8693 mv a3,s5
if (u.u & (1ULL << 63)) {
92c: 1a0dc063 bltz s11,acc <__stack_size+0x2cc>
for (int i = 0; i < prec; i++)
930: 05a05263 blez s10,974 <__stack_size+0x174>
934: 0ffff797 auipc a5,0xffff
938: 6cc78793 addi a5,a5,1740 # 10000000 <_data>
u.d *= 10;
93c: 0007ab03 lw s6,0(a5)
940: 0047ab83 lw s7,4(a5)
for (int i = 0; i < prec; i++)
944: 00000a13 li s4,0
u.d *= 10;
948: 00068513 mv a0,a3
94c: 00070593 mv a1,a4
950: 000b8693 mv a3,s7
954: 000b0613 mv a2,s6
958: 2cc000ef jal ra,c24 <__muldf3>
for (int i = 0; i < prec; i++)
95c: 001a0a13 addi s4,s4,1
u.d *= 10;
960: 00050a93 mv s5,a0
964: 00058d93 mv s11,a1
968: 00050693 mv a3,a0
96c: 00058713 mv a4,a1
for (int i = 0; i < prec; i++)
970: fd4d1ce3 bne s10,s4,948 <__stack_size+0x148>
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
974: 000d8593 mv a1,s11
978: 000a8513 mv a0,s5
97c: 175000ef jal ra,12f0 <__fixunsdfsi>
digs[pos++] = num % base;
980: 00a00593 li a1,10
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
984: 00050b13 mv s6,a0
digs[pos++] = num % base;
988: 259000ef jal ra,13e0 <__umodsi3>
98c: 02a12823 sw a0,48(sp)
if (num < base)
990: 00900793 li a5,9
994: 1967f663 bgeu a5,s6,b20 <__stack_size+0x320>
998: 03410a13 addi s4,sp,52
digs[pos++] = num % base;
99c: 00100d93 li s11,1
if (num < base)
9a0: 06300b93 li s7,99
num /= base;
9a4: 00a00593 li a1,10
9a8: 000b0513 mv a0,s6
9ac: 1ed000ef jal ra,1398 <__udivsi3>
digs[pos++] = num % base;
9b0: 00a00593 li a1,10
9b4: 000b0a93 mv s5,s6
num /= base;
9b8: 00050b13 mv s6,a0
digs[pos++] = num % base;
9bc: 225000ef jal ra,13e0 <__umodsi3>
9c0: 00aa2023 sw a0,0(s4)
9c4: 000d8613 mv a2,s11
if (num < base)
9c8: 004a0a13 addi s4,s4,4
digs[pos++] = num % base;
9cc: 001d8d93 addi s11,s11,1
if (num < base)
9d0: fd5beae3 bltu s7,s5,9a4 <__stack_size+0x1a4>
9d4: 03010813 addi a6,sp,48
9d8: 00261713 slli a4,a2,0x2
9dc: 00e80733 add a4,a6,a4
putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
9e0: 01010693 addi a3,sp,16
9e4: 00900893 li a7,9
9e8: 00c0006f j 9f4 <__stack_size+0x1f4>
9ec: ffc72503 lw a0,-4(a4)
9f0: 00058713 mv a4,a1
9f4: 00a8b7b3 sltu a5,a7,a0
9f8: 40f007b3 neg a5,a5
9fc: 0277f793 andi a5,a5,39
a00: 03078793 addi a5,a5,48
a04: 00a787b3 add a5,a5,a0
**pstr = ch;
a08: 0ff7f793 zext.b a5,a5
a0c: 00f68023 sb a5,0(a3)
while (pos-- > 0)
a10: ffc70593 addi a1,a4,-4
(*pstr)++;
a14: 00168693 addi a3,a3,1
while (pos-- > 0)
a18: fce81ae3 bne a6,a4,9ec <__stack_size+0x1ec>
(*pstr)++;
a1c: 01160713 addi a4,a2,17
a20: 00270bb3 add s7,a4,sp
if (prec > 0) {
a24: 03a05a63 blez s10,a58 <__stack_size+0x258>
a28: 000b8713 mv a4,s7
a2c: 41ab86b3 sub a3,s7,s10
a30: 0080006f j a38 <__stack_size+0x238>
pbuf[-i] = pbuf[-i-1];
a34: fff74783 lbu a5,-1(a4)
a38: 00f70023 sb a5,0(a4)
for (int i = 0; i < prec; i++) {
a3c: fff70713 addi a4,a4,-1
a40: fed71ae3 bne a4,a3,a34 <__stack_size+0x234>
pbuf[-prec] = '.';
a44: 41ab8bb3 sub s7,s7,s10
a48: 02e00793 li a5,46
a4c: 00fb8023 sb a5,0(s7)
pbuf++;
a50: 01260793 addi a5,a2,18
a54: 00278bb3 add s7,a5,sp
for (char* p = buf; p < pbuf; p++)
a58: 01010b13 addi s6,sp,16
a5c: b97b78e3 bgeu s6,s7,5ec <vprintfmt+0x78>
putch(*p, putdat);
a60: 000b4503 lbu a0,0(s6)
a64: 00048593 mv a1,s1
for (char* p = buf; p < pbuf; p++)
a68: 001b0b13 addi s6,s6,1
putch(*p, putdat);
a6c: 000900e7 jalr s2
for (char* p = buf; p < pbuf; p++)
a70: ff7b18e3 bne s6,s7,a60 <__stack_size+0x260>
a74: b79ff06f j 5ec <vprintfmt+0x78>
putch('0', putdat);
a78: 03000513 li a0,48
a7c: 00048593 mv a1,s1
a80: 000900e7 jalr s2
putch('x', putdat);
a84: 00048593 mv a1,s1
a88: 07800513 li a0,120
a8c: 000900e7 jalr s2
return va_arg(*ap, unsigned long);
a90: 00012783 lw a5,0(sp)
a94: 01000a93 li s5,16
a98: 00478793 addi a5,a5,4
a9c: 00f12023 sw a5,0(sp)
aa0: ffc7ac03 lw s8,-4(a5)
aa4: ca5ff06f j 748 <vprintfmt+0x1d4>
if (width < 0)
aa8: fffb4793 not a5,s6
aac: 41f7d793 srai a5,a5,0x1f
ch = *fmt;
ab0: 00174683 lbu a3,1(a4)
ab4: 00fb7b33 and s6,s6,a5
switch (ch = *(unsigned char *) fmt++) {
ab8: 00040713 mv a4,s0
goto reswitch;
abc: b59ff06f j 614 <vprintfmt+0xa0>
while (width-- > pos)
ac0: 00000d93 li s11,0
ac4: cd6ccce3 blt s9,s6,79c <vprintfmt+0x228>
ac8: ce9ff06f j 7b0 <vprintfmt+0x23c>
putch('-', putdat);
acc: 00048593 mv a1,s1
ad0: 02d00513 li a0,45
ad4: 01512623 sw s5,12(sp)
ad8: 000900e7 jalr s2
u.u &= ~(1ULL << 63);
adc: 00812783 lw a5,8(sp)
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
ae0: 00c12683 lw a3,12(sp)
u.u &= ~(1ULL << 63);
ae4: 01b7f733 and a4,a5,s11
printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
ae8: 00070d93 mv s11,a4
aec: e45ff06f j 930 <__stack_size+0x130>
switch (ch = *(unsigned char *) fmt++) {
af0: 00800a93 li s5,8
af4: c45ff06f j 738 <vprintfmt+0x1c4>
af8: 00a00a93 li s5,10
afc: c3dff06f j 738 <vprintfmt+0x1c4>
if (width > 0 && padc != '-')
b00: 01605663 blez s6,b0c <__stack_size+0x30c>
b04: 02d00793 li a5,45
b08: d6fb90e3 bne s7,a5,868 <__stack_size+0x68>
b0c: 00001d97 auipc s11,0x1
b10: 9ecd8d93 addi s11,s11,-1556 # 14f8 <__clzsi2+0xb4>
for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
b14: 02800513 li a0,40
b18: fff00b93 li s7,-1
b1c: d09ff06f j 824 <__stack_size+0x24>
while (pos-- > 0)
b20: 00000613 li a2,0
b24: eb1ff06f j 9d4 <__stack_size+0x1d4>
00000b28 <strnlen>:
while (n-- > 0 && *str) str++;
b28: 00b506b3 add a3,a0,a1
b2c: 00050793 mv a5,a0
b30: 00059863 bnez a1,b40 <strnlen+0x18>
b34: 0240006f j b58 <strnlen+0x30>
b38: 00178793 addi a5,a5,1
b3c: 00f68a63 beq a3,a5,b50 <strnlen+0x28>
b40: 0007c703 lbu a4,0(a5)
b44: fe071ae3 bnez a4,b38 <strnlen+0x10>
return str - start;
b48: 40a78533 sub a0,a5,a0
}
b4c: 00008067 ret
return str - start;
b50: 40a68533 sub a0,a3,a0
b54: 00008067 ret
while (n-- > 0 && *str) str++;
b58: 00000513 li a0,0
b5c: 00008067 ret
00000b60 <__wrap_printf>:
int __wrap_printf(const char* fmt, ...)
{
b60: fc010113 addi sp,sp,-64
va_list ap;
va_start(ap, fmt);
b64: 02410313 addi t1,sp,36
{
b68: 00050e13 mv t3,a0
b6c: 02b12223 sw a1,36(sp)
b70: 02c12423 sw a2,40(sp)
b74: 02d12623 sw a3,44(sp)
vprintfmt((void*)putchar, 0, fmt, ap);
b78: 00000517 auipc a0,0x0
b7c: 9c050513 addi a0,a0,-1600 # 538 <putchar>
b80: 00030693 mv a3,t1
b84: 000e0613 mv a2,t3
b88: 00000593 li a1,0
{
b8c: 00112e23 sw ra,28(sp)
b90: 02e12823 sw a4,48(sp)
b94: 02f12a23 sw a5,52(sp)
b98: 03012c23 sw a6,56(sp)
b9c: 03112e23 sw a7,60(sp)
va_start(ap, fmt);
ba0: 00612623 sw t1,12(sp)
vprintfmt((void*)putchar, 0, fmt, ap);
ba4: 9d1ff0ef jal ra,574 <vprintfmt>
va_end(ap);
return 0; // incorrect return value, but who cares, anyway?
}
ba8: 01c12083 lw ra,28(sp)
bac: 00000513 li a0,0
bb0: 04010113 addi sp,sp,64
bb4: 00008067 ret
00000bb8 <__wrap_sprintf>:
int __wrap_sprintf(char* str, const char* fmt, ...)
{
bb8: fb010113 addi sp,sp,-80
va_list ap;
char* str0 = str;
va_start(ap, fmt);
bbc: 03810313 addi t1,sp,56
{
bc0: 02812423 sw s0,40(sp)
bc4: 00a12623 sw a0,12(sp)
bc8: 02c12c23 sw a2,56(sp)
bcc: 02d12e23 sw a3,60(sp)
char* str0 = str;
bd0: 00050413 mv s0,a0
vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
bd4: 00058613 mv a2,a1
bd8: 00000517 auipc a0,0x0
bdc: 94850513 addi a0,a0,-1720 # 520 <sprintf_putch>
be0: 00c10593 addi a1,sp,12
be4: 00030693 mv a3,t1
{
be8: 02112623 sw ra,44(sp)
bec: 04f12223 sw a5,68(sp)
bf0: 04e12023 sw a4,64(sp)
bf4: 05012423 sw a6,72(sp)
bf8: 05112623 sw a7,76(sp)
va_start(ap, fmt);
bfc: 00612e23 sw t1,28(sp)
vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
c00: 975ff0ef jal ra,574 <vprintfmt>
*str = 0;
c04: 00c12783 lw a5,12(sp)
c08: 00078023 sb zero,0(a5)
va_end(ap);
return str - str0;
c0c: 00c12503 lw a0,12(sp)
}
c10: 02c12083 lw ra,44(sp)
c14: 40850533 sub a0,a0,s0
c18: 02812403 lw s0,40(sp)
c1c: 05010113 addi sp,sp,80
c20: 00008067 ret
00000c24 <__muldf3>:
#include "soft-fp.h"
#include "double.h"
DFtype
__muldf3 (DFtype a, DFtype b)
{
c24: fd010113 addi sp,sp,-48
c28: 01312e23 sw s3,28(sp)
FP_DECL_D (B);
FP_DECL_D (R);
DFtype r;
FP_INIT_ROUNDMODE;
FP_UNPACK_D (A, a);
c2c: 0145d993 srli s3,a1,0x14
{
c30: 02812423 sw s0,40(sp)
c34: 02912223 sw s1,36(sp)
c38: 01412c23 sw s4,24(sp)
c3c: 01512a23 sw s5,20(sp)
c40: 01712623 sw s7,12(sp)
FP_UNPACK_D (A, a);
c44: 00c59493 slli s1,a1,0xc
{
c48: 02112623 sw ra,44(sp)
c4c: 03212023 sw s2,32(sp)
c50: 01612823 sw s6,16(sp)
FP_UNPACK_D (A, a);
c54: 7ff9f993 andi s3,s3,2047
{
c58: 00050413 mv s0,a0
c5c: 00060b93 mv s7,a2
c60: 00068a13 mv s4,a3
FP_UNPACK_D (A, a);
c64: 00c4d493 srli s1,s1,0xc
c68: 01f5da93 srli s5,a1,0x1f
c6c: 3c098863 beqz s3,103c <__muldf3+0x418>
c70: 7ff00793 li a5,2047
c74: 42f98663 beq s3,a5,10a0 <__muldf3+0x47c>
c78: 00349493 slli s1,s1,0x3
c7c: 01d55793 srli a5,a0,0x1d
c80: 0097e7b3 or a5,a5,s1
c84: 008004b7 lui s1,0x800
c88: 0097e4b3 or s1,a5,s1
c8c: 00351913 slli s2,a0,0x3
c90: c0198993 addi s3,s3,-1023
c94: 00000b13 li s6,0
FP_UNPACK_D (B, b);
c98: 014a5713 srli a4,s4,0x14
c9c: 00ca1413 slli s0,s4,0xc
ca0: 7ff77713 andi a4,a4,2047
ca4: 00c45413 srli s0,s0,0xc
ca8: 01fa5a13 srli s4,s4,0x1f
cac: 42070663 beqz a4,10d8 <__muldf3+0x4b4>
cb0: 7ff00793 li a5,2047
cb4: 48f70663 beq a4,a5,1140 <__muldf3+0x51c>
cb8: 00341413 slli s0,s0,0x3
cbc: 01dbd793 srli a5,s7,0x1d
cc0: 0087e7b3 or a5,a5,s0
cc4: 00800437 lui s0,0x800
cc8: 0087e433 or s0,a5,s0
ccc: c0170713 addi a4,a4,-1023
cd0: 003b9793 slli a5,s7,0x3
cd4: 00000613 li a2,0
FP_MUL_D (R, A, B);
cd8: 00e989b3 add s3,s3,a4
cdc: 002b1713 slli a4,s6,0x2
ce0: 00c76733 or a4,a4,a2
ce4: 00a00693 li a3,10
ce8: 014ac833 xor a6,s5,s4
cec: 00198893 addi a7,s3,1
cf0: 4ce6c863 blt a3,a4,11c0 <__muldf3+0x59c>
cf4: 00200693 li a3,2
cf8: 48e6c063 blt a3,a4,1178 <__muldf3+0x554>
cfc: fff70713 addi a4,a4,-1
d00: 00100693 li a3,1
d04: 48e6fc63 bgeu a3,a4,119c <__muldf3+0x578>
d08: 00010a37 lui s4,0x10
d0c: fffa0393 addi t2,s4,-1 # ffff <_data_lma+0xe8a7>
d10: 0107d293 srli t0,a5,0x10
d14: 00797e33 and t3,s2,t2
d18: 0077f7b3 and a5,a5,t2
d1c: 01095f93 srli t6,s2,0x10
d20: 000e0513 mv a0,t3
d24: 00078593 mv a1,a5
d28: 644000ef jal ra,136c <__mulsi3>
d2c: 00050e93 mv t4,a0
d30: 00028593 mv a1,t0
d34: 000e0513 mv a0,t3
d38: 634000ef jal ra,136c <__mulsi3>
d3c: 00050713 mv a4,a0
d40: 00078593 mv a1,a5
d44: 000f8513 mv a0,t6
d48: 624000ef jal ra,136c <__mulsi3>
d4c: 00050913 mv s2,a0
d50: 00028593 mv a1,t0
d54: 000f8513 mv a0,t6
d58: 614000ef jal ra,136c <__mulsi3>
d5c: 010ed313 srli t1,t4,0x10
d60: 01270733 add a4,a4,s2
d64: 00e30333 add t1,t1,a4
d68: 00050f13 mv t5,a0
d6c: 01237463 bgeu t1,s2,d74 <__muldf3+0x150>
d70: 01450f33 add t5,a0,s4
d74: 01035913 srli s2,t1,0x10
d78: 00737333 and t1,t1,t2
d7c: 007efeb3 and t4,t4,t2
d80: 01031313 slli t1,t1,0x10
d84: 007473b3 and t2,s0,t2
d88: 01d30333 add t1,t1,t4
d8c: 01045a13 srli s4,s0,0x10
d90: 000e0513 mv a0,t3
d94: 00038593 mv a1,t2
d98: 5d4000ef jal ra,136c <__mulsi3>
d9c: 00050e93 mv t4,a0
da0: 000a0593 mv a1,s4
da4: 000e0513 mv a0,t3
da8: 5c4000ef jal ra,136c <__mulsi3>
dac: 00050e13 mv t3,a0
db0: 00038593 mv a1,t2
db4: 000f8513 mv a0,t6
db8: 5b4000ef jal ra,136c <__mulsi3>
dbc: 00050413 mv s0,a0
dc0: 000a0593 mv a1,s4
dc4: 000f8513 mv a0,t6
dc8: 5a4000ef jal ra,136c <__mulsi3>
dcc: 010ed713 srli a4,t4,0x10
dd0: 008e0e33 add t3,t3,s0
dd4: 01c70733 add a4,a4,t3
dd8: 00050693 mv a3,a0
ddc: 00877663 bgeu a4,s0,de8 <__muldf3+0x1c4>
de0: 00010637 lui a2,0x10
de4: 00c506b3 add a3,a0,a2
de8: 00010b37 lui s6,0x10
dec: fffb0e13 addi t3,s6,-1 # ffff <_data_lma+0xe8a7>
df0: 01075f93 srli t6,a4,0x10
df4: 01c77733 and a4,a4,t3
df8: 01071713 slli a4,a4,0x10
dfc: 01cefeb3 and t4,t4,t3
e00: 01d70eb3 add t4,a4,t4
e04: 01c4fe33 and t3,s1,t3
e08: 00df8fb3 add t6,t6,a3
e0c: 01d90933 add s2,s2,t4
e10: 0104da93 srli s5,s1,0x10
e14: 000e0513 mv a0,t3
e18: 00078593 mv a1,a5
e1c: 550000ef jal ra,136c <__mulsi3>
e20: 00050413 mv s0,a0
e24: 00028593 mv a1,t0
e28: 000e0513 mv a0,t3
e2c: 540000ef jal ra,136c <__mulsi3>
e30: 00050493 mv s1,a0
e34: 00078593 mv a1,a5
e38: 000a8513 mv a0,s5
e3c: 530000ef jal ra,136c <__mulsi3>
e40: 00050b93 mv s7,a0
e44: 00028593 mv a1,t0
e48: 000a8513 mv a0,s5
e4c: 520000ef jal ra,136c <__mulsi3>
e50: 01045793 srli a5,s0,0x10
e54: 017484b3 add s1,s1,s7
e58: 009787b3 add a5,a5,s1
e5c: 00050713 mv a4,a0
e60: 0177f463 bgeu a5,s7,e68 <__muldf3+0x244>
e64: 01650733 add a4,a0,s6
e68: 000104b7 lui s1,0x10
e6c: fff48693 addi a3,s1,-1 # ffff <_data_lma+0xe8a7>
e70: 0107d293 srli t0,a5,0x10
e74: 00e282b3 add t0,t0,a4
e78: 00d7f733 and a4,a5,a3
e7c: 00d47433 and s0,s0,a3
e80: 01071713 slli a4,a4,0x10
e84: 00870733 add a4,a4,s0
e88: 000e0513 mv a0,t3
e8c: 00038593 mv a1,t2
e90: 4dc000ef jal ra,136c <__mulsi3>
e94: 00050413 mv s0,a0
e98: 000a0593 mv a1,s4
e9c: 000e0513 mv a0,t3
ea0: 4cc000ef jal ra,136c <__mulsi3>
ea4: 00050e13 mv t3,a0
ea8: 00038593 mv a1,t2
eac: 000a8513 mv a0,s5
eb0: 4bc000ef jal ra,136c <__mulsi3>
eb4: 00050393 mv t2,a0
eb8: 000a0593 mv a1,s4
ebc: 000a8513 mv a0,s5
ec0: 4ac000ef jal ra,136c <__mulsi3>
ec4: 01045793 srli a5,s0,0x10
ec8: 007e0e33 add t3,t3,t2
ecc: 01c78e33 add t3,a5,t3
ed0: 00050593 mv a1,a0
ed4: 007e7463 bgeu t3,t2,edc <__muldf3+0x2b8>
ed8: 009505b3 add a1,a0,s1
edc: 000106b7 lui a3,0x10
ee0: fff68693 addi a3,a3,-1 # ffff <_data_lma+0xe8a7>
ee4: 00de77b3 and a5,t3,a3
ee8: 00d47433 and s0,s0,a3
eec: 01079793 slli a5,a5,0x10
ef0: 012f0f33 add t5,t5,s2
ef4: 008787b3 add a5,a5,s0
ef8: 01df3eb3 sltu t4,t5,t4
efc: 01f787b3 add a5,a5,t6
f00: 01d78533 add a0,a5,t4
f04: 00ef0f33 add t5,t5,a4
f08: 00ef3733 sltu a4,t5,a4
f0c: 005506b3 add a3,a0,t0
f10: 00e68633 add a2,a3,a4
f14: 01f7b433 sltu s0,a5,t6
f18: 01d53533 sltu a0,a0,t4
f1c: 010e5793 srli a5,t3,0x10
f20: 00e63733 sltu a4,a2,a4
f24: 00a46433 or s0,s0,a0
f28: 0056b6b3 sltu a3,a3,t0
f2c: 00f40433 add s0,s0,a5
f30: 00e6e6b3 or a3,a3,a4
f34: 00d40433 add s0,s0,a3
f38: 00b40433 add s0,s0,a1
f3c: 01765793 srli a5,a2,0x17
f40: 00941413 slli s0,s0,0x9
f44: 00f46433 or s0,s0,a5
f48: 009f1793 slli a5,t5,0x9
f4c: 0067e7b3 or a5,a5,t1
f50: 00f037b3 snez a5,a5
f54: 017f5f13 srli t5,t5,0x17
f58: 00961713 slli a4,a2,0x9
f5c: 01e7e7b3 or a5,a5,t5
f60: 00e7e7b3 or a5,a5,a4
f64: 01000737 lui a4,0x1000
f68: 00e47733 and a4,s0,a4
f6c: 28070663 beqz a4,11f8 <__muldf3+0x5d4>
f70: 0017d713 srli a4,a5,0x1
f74: 0017f793 andi a5,a5,1
f78: 00f76733 or a4,a4,a5
f7c: 01f41793 slli a5,s0,0x1f
f80: 00f767b3 or a5,a4,a5
f84: 00145413 srli s0,s0,0x1
FP_PACK_D (r, R);
f88: 3ff88693 addi a3,a7,1023
f8c: 26d05a63 blez a3,1200 <__muldf3+0x5dc>
f90: 0077f713 andi a4,a5,7
f94: 02070063 beqz a4,fb4 <__muldf3+0x390>
f98: 00f7f713 andi a4,a5,15
f9c: 00400613 li a2,4
fa0: 00c70a63 beq a4,a2,fb4 <__muldf3+0x390>
fa4: 00478713 addi a4,a5,4
fa8: 00f737b3 sltu a5,a4,a5
fac: 00f40433 add s0,s0,a5
fb0: 00070793 mv a5,a4
fb4: 01000737 lui a4,0x1000
fb8: 00e47733 and a4,s0,a4
fbc: 00070a63 beqz a4,fd0 <__muldf3+0x3ac>
fc0: ff000737 lui a4,0xff000
fc4: fff70713 addi a4,a4,-1 # feffffff <tohost+0xff00000f>
fc8: 00e47433 and s0,s0,a4
fcc: 40088693 addi a3,a7,1024
fd0: 7fe00713 li a4,2046
fd4: 2ed74e63 blt a4,a3,12d0 <__muldf3+0x6ac>
fd8: 01d41713 slli a4,s0,0x1d
fdc: 0037d793 srli a5,a5,0x3
fe0: 00f76733 or a4,a4,a5
fe4: 00345413 srli s0,s0,0x3
fe8: 7ff007b7 lui a5,0x7ff00
fec: 01469693 slli a3,a3,0x14
ff0: 00c41413 slli s0,s0,0xc
ff4: 00f6f6b3 and a3,a3,a5
ff8: 00c45413 srli s0,s0,0xc
FP_HANDLE_EXCEPTIONS;
return r;
}
ffc: 02c12083 lw ra,44(sp)
FP_PACK_D (r, R);
1000: 0086e6b3 or a3,a3,s0
}
1004: 02812403 lw s0,40(sp)
FP_PACK_D (r, R);
1008: 01f81813 slli a6,a6,0x1f
100c: 0106e7b3 or a5,a3,a6
}
1010: 02412483 lw s1,36(sp)
1014: 02012903 lw s2,32(sp)
1018: 01c12983 lw s3,28(sp)
101c: 01812a03 lw s4,24(sp)
1020: 01412a83 lw s5,20(sp)
1024: 01012b03 lw s6,16(sp)
1028: 00c12b83 lw s7,12(sp)
102c: 00070513 mv a0,a4
1030: 00078593 mv a1,a5
1034: 03010113 addi sp,sp,48
1038: 00008067 ret
FP_UNPACK_D (A, a);
103c: 00a4e933 or s2,s1,a0
1040: 06090c63 beqz s2,10b8 <__muldf3+0x494>
1044: 04048063 beqz s1,1084 <__muldf3+0x460>
1048: 00048513 mv a0,s1
104c: 3f8000ef jal ra,1444 <__clzsi2>
1050: ff550713 addi a4,a0,-11
1054: 01c00793 li a5,28
1058: 02e7cc63 blt a5,a4,1090 <__muldf3+0x46c>
105c: 01d00793 li a5,29
1060: ff850913 addi s2,a0,-8
1064: 40e787b3 sub a5,a5,a4
1068: 012494b3 sll s1,s1,s2
106c: 00f457b3 srl a5,s0,a5
1070: 0097e4b3 or s1,a5,s1
1074: 01241933 sll s2,s0,s2
1078: c0d00993 li s3,-1011
107c: 40a989b3 sub s3,s3,a0
1080: c15ff06f j c94 <__muldf3+0x70>
1084: 3c0000ef jal ra,1444 <__clzsi2>
1088: 02050513 addi a0,a0,32
108c: fc5ff06f j 1050 <__muldf3+0x42c>
1090: fd850493 addi s1,a0,-40
1094: 009414b3 sll s1,s0,s1
1098: 00000913 li s2,0
109c: fddff06f j 1078 <__muldf3+0x454>
10a0: 00a4e933 or s2,s1,a0
10a4: 02090263 beqz s2,10c8 <__muldf3+0x4a4>
10a8: 00050913 mv s2,a0
10ac: 7ff00993 li s3,2047
10b0: 00300b13 li s6,3
10b4: be5ff06f j c98 <__muldf3+0x74>
10b8: 00000493 li s1,0
10bc: 00000993 li s3,0
10c0: 00100b13 li s6,1
10c4: bd5ff06f j c98 <__muldf3+0x74>
10c8: 00000493 li s1,0
10cc: 7ff00993 li s3,2047
10d0: 00200b13 li s6,2
10d4: bc5ff06f j c98 <__muldf3+0x74>
FP_UNPACK_D (B, b);
10d8: 017467b3 or a5,s0,s7
10dc: 06078e63 beqz a5,1158 <__muldf3+0x534>
10e0: 04040063 beqz s0,1120 <__muldf3+0x4fc>
10e4: 00040513 mv a0,s0
10e8: 35c000ef jal ra,1444 <__clzsi2>
10ec: ff550693 addi a3,a0,-11
10f0: 01c00793 li a5,28
10f4: 02d7ce63 blt a5,a3,1130 <__muldf3+0x50c>
10f8: 01d00713 li a4,29
10fc: ff850793 addi a5,a0,-8
1100: 40d70733 sub a4,a4,a3
1104: 00f41433 sll s0,s0,a5
1108: 00ebd733 srl a4,s7,a4
110c: 00876433 or s0,a4,s0
1110: 00fb97b3 sll a5,s7,a5
1114: c0d00713 li a4,-1011
1118: 40a70733 sub a4,a4,a0
111c: bb9ff06f j cd4 <__muldf3+0xb0>
1120: 000b8513 mv a0,s7
1124: 320000ef jal ra,1444 <__clzsi2>
1128: 02050513 addi a0,a0,32
112c: fc1ff06f j 10ec <__muldf3+0x4c8>
1130: fd850413 addi s0,a0,-40
1134: 008b9433 sll s0,s7,s0
1138: 00000793 li a5,0
113c: fd9ff06f j 1114 <__muldf3+0x4f0>
1140: 017467b3 or a5,s0,s7
1144: 02078263 beqz a5,1168 <__muldf3+0x544>
1148: 000b8793 mv a5,s7
114c: 7ff00713 li a4,2047
1150: 00300613 li a2,3
1154: b85ff06f j cd8 <__muldf3+0xb4>
1158: 00000413 li s0,0
115c: 00000713 li a4,0
1160: 00100613 li a2,1
1164: b75ff06f j cd8 <__muldf3+0xb4>
1168: 00000413 li s0,0
116c: 7ff00713 li a4,2047
1170: 00200613 li a2,2
1174: b65ff06f j cd8 <__muldf3+0xb4>
1178: 00100693 li a3,1
117c: 00e696b3 sll a3,a3,a4
1180: 5306f713 andi a4,a3,1328
1184: 04071863 bnez a4,11d4 <__muldf3+0x5b0>
1188: 2406f593 andi a1,a3,576
118c: 12059463 bnez a1,12b4 <__muldf3+0x690>
1190: 0886f693 andi a3,a3,136
1194: b6068ae3 beqz a3,d08 <__muldf3+0xe4>
1198: 000a0813 mv a6,s4
FP_PACK_D (r, R);
119c: 00200713 li a4,2
11a0: 12e60863 beq a2,a4,12d0 <__muldf3+0x6ac>
11a4: 00300713 li a4,3
11a8: 10e60e63 beq a2,a4,12c4 <__muldf3+0x6a0>
11ac: 00100713 li a4,1
11b0: dce61ce3 bne a2,a4,f88 <__muldf3+0x364>
11b4: 00000413 li s0,0
11b8: 00000713 li a4,0
11bc: 0bc0006f j 1278 <__muldf3+0x654>
FP_MUL_D (R, A, B);
11c0: 00f00693 li a3,15
11c4: 02d70063 beq a4,a3,11e4 <__muldf3+0x5c0>
11c8: 00b00693 li a3,11
11cc: fcd706e3 beq a4,a3,1198 <__muldf3+0x574>
FP_UNPACK_D (A, a);
11d0: 000a8813 mv a6,s5
FP_MUL_D (R, A, B);
11d4: 00048413 mv s0,s1
11d8: 00090793 mv a5,s2
11dc: 000b0613 mv a2,s6
11e0: fbdff06f j 119c <__muldf3+0x578>
11e4: 00080437 lui s0,0x80
11e8: 00000793 li a5,0
11ec: 00000813 li a6,0
11f0: 00300613 li a2,3
11f4: fb1ff06f j 11a4 <__muldf3+0x580>
11f8: 00098893 mv a7,s3
11fc: d8dff06f j f88 <__muldf3+0x364>
FP_PACK_D (r, R);
1200: 00100613 li a2,1
1204: 40d60633 sub a2,a2,a3
1208: 03800713 li a4,56
120c: fac744e3 blt a4,a2,11b4 <__muldf3+0x590>
1210: 01f00713 li a4,31
1214: 06c74663 blt a4,a2,1280 <__muldf3+0x65c>
1218: 41e88893 addi a7,a7,1054
121c: 01141733 sll a4,s0,a7
1220: 00c7d6b3 srl a3,a5,a2
1224: 011798b3 sll a7,a5,a7
1228: 00d76733 or a4,a4,a3
122c: 011038b3 snez a7,a7
1230: 011767b3 or a5,a4,a7
1234: 00c45433 srl s0,s0,a2
1238: 0077f713 andi a4,a5,7
123c: 02070063 beqz a4,125c <__muldf3+0x638>
1240: 00f7f713 andi a4,a5,15
1244: 00400693 li a3,4
1248: 00d70a63 beq a4,a3,125c <__muldf3+0x638>
124c: 00478713 addi a4,a5,4 # 7ff00004 <_sp+0x6fefc004>
1250: 00f737b3 sltu a5,a4,a5
1254: 00f40433 add s0,s0,a5
1258: 00070793 mv a5,a4
125c: 00800737 lui a4,0x800
1260: 00e47733 and a4,s0,a4
1264: 06071e63 bnez a4,12e0 <__muldf3+0x6bc>
1268: 01d41713 slli a4,s0,0x1d
126c: 0037d793 srli a5,a5,0x3
1270: 00f76733 or a4,a4,a5
1274: 00345413 srli s0,s0,0x3
1278: 00000693 li a3,0
127c: d6dff06f j fe8 <__muldf3+0x3c4>
1280: fe100713 li a4,-31
1284: 40d70733 sub a4,a4,a3
1288: 02000593 li a1,32
128c: 00e45733 srl a4,s0,a4
1290: 00000693 li a3,0
1294: 00b60663 beq a2,a1,12a0 <__muldf3+0x67c>
1298: 43e88893 addi a7,a7,1086
129c: 011416b3 sll a3,s0,a7
12a0: 00f6e6b3 or a3,a3,a5
12a4: 00d036b3 snez a3,a3
12a8: 00d767b3 or a5,a4,a3
12ac: 00000413 li s0,0
12b0: f89ff06f j 1238 <__muldf3+0x614>
FP_MUL_D (R, A, B);
12b4: 00080437 lui s0,0x80
FP_PACK_D (r, R);
12b8: 7ff00693 li a3,2047
12bc: 00000813 li a6,0
12c0: d29ff06f j fe8 <__muldf3+0x3c4>
12c4: 00080437 lui s0,0x80
12c8: 00000713 li a4,0
12cc: fedff06f j 12b8 <__muldf3+0x694>
12d0: 00000413 li s0,0
12d4: 00000713 li a4,0
12d8: 7ff00693 li a3,2047
12dc: d0dff06f j fe8 <__muldf3+0x3c4>
12e0: 00000413 li s0,0
12e4: 00000713 li a4,0
12e8: 00100693 li a3,1
12ec: cfdff06f j fe8 <__muldf3+0x3c4>
000012f0 <__fixunsdfsi>:
FP_DECL_EX;
FP_DECL_D (A);
USItype r;
FP_INIT_EXCEPTIONS;
FP_UNPACK_RAW_D (A, a);
12f0: 0145d713 srli a4,a1,0x14
12f4: 00100637 lui a2,0x100
{
12f8: 00050693 mv a3,a0
FP_UNPACK_RAW_D (A, a);
12fc: fff60793 addi a5,a2,-1 # fffff <_data_lma+0xfe8a7>
1300: 7ff77713 andi a4,a4,2047
FP_TO_INT_D (r, A, SI_BITS, 0);
1304: 3fe00513 li a0,1022
FP_UNPACK_RAW_D (A, a);
1308: 00b7f7b3 and a5,a5,a1
130c: 01f5d593 srli a1,a1,0x1f
FP_TO_INT_D (r, A, SI_BITS, 0);
1310: 04e55a63 bge a0,a4,1364 <__fixunsdfsi+0x74>
1314: 00000513 li a0,0
1318: 00059863 bnez a1,1328 <__fixunsdfsi+0x38>
131c: 41e00593 li a1,1054
1320: fff00513 li a0,-1
1324: 00e5d463 bge a1,a4,132c <__fixunsdfsi+0x3c>
FP_HANDLE_EXCEPTIONS;
return r;
}
1328: 00008067 ret
FP_TO_INT_D (r, A, SI_BITS, 0);
132c: 00c7e7b3 or a5,a5,a2
1330: 43300613 li a2,1075
1334: 40e60633 sub a2,a2,a4
1338: 01f00593 li a1,31
133c: 00c5cc63 blt a1,a2,1354 <__fixunsdfsi+0x64>
1340: bed70713 addi a4,a4,-1043 # 7ffbed <_data_lma+0x7fe495>
1344: 00e797b3 sll a5,a5,a4
1348: 00c6d533 srl a0,a3,a2
134c: 00a7e533 or a0,a5,a0
1350: 00008067 ret
1354: 41300693 li a3,1043
1358: 40e68733 sub a4,a3,a4
135c: 00e7d533 srl a0,a5,a4
1360: 00008067 ret
1364: 00000513 li a0,0
1368: 00008067 ret
0000136c <__mulsi3>:
/* Our RV64 64-bit routine is equivalent to our RV32 32-bit routine. */
# define __muldi3 __mulsi3
#endif
FUNC_BEGIN (__muldi3)
mv a2, a0
136c: 00050613 mv a2,a0
li a0, 0
1370: 00000513 li a0,0
.L1:
andi a3, a1, 1
1374: 0015f693 andi a3,a1,1
beqz a3, .L2
1378: 00068463 beqz a3,1380 <__mulsi3+0x14>
add a0, a0, a2
137c: 00c50533 add a0,a0,a2
.L2:
srli a1, a1, 1
1380: 0015d593 srli a1,a1,0x1
slli a2, a2, 1
1384: 00161613 slli a2,a2,0x1
bnez a1, .L1
1388: fe0596e3 bnez a1,1374 <__mulsi3+0x8>
ret
138c: 00008067 ret
00001390 <__divsi3>:
li t0, -1
beq a1, t0, .L20
#endif
FUNC_BEGIN (__divdi3)
bltz a0, .L10
1390: 06054063 bltz a0,13f0 <__umodsi3+0x10>
bltz a1, .L11
1394: 0605c663 bltz a1,1400 <__umodsi3+0x20>
00001398 <__udivsi3>:
/* Since the quotient is positive, fall into __udivdi3. */
FUNC_BEGIN (__udivdi3)
mv a2, a1
1398: 00058613 mv a2,a1
mv a1, a0
139c: 00050593 mv a1,a0
li a0, -1
13a0: fff00513 li a0,-1
beqz a2, .L5
13a4: 02060c63 beqz a2,13dc <__udivsi3+0x44>
li a3, 1
13a8: 00100693 li a3,1
bgeu a2, a1, .L2
13ac: 00b67a63 bgeu a2,a1,13c0 <__udivsi3+0x28>
.L1:
blez a2, .L2
13b0: 00c05863 blez a2,13c0 <__udivsi3+0x28>
slli a2, a2, 1
13b4: 00161613 slli a2,a2,0x1
slli a3, a3, 1
13b8: 00169693 slli a3,a3,0x1
bgtu a1, a2, .L1
13bc: feb66ae3 bltu a2,a1,13b0 <__udivsi3+0x18>
.L2:
li a0, 0
13c0: 00000513 li a0,0
.L3:
bltu a1, a2, .L4
13c4: 00c5e663 bltu a1,a2,13d0 <__udivsi3+0x38>
sub a1, a1, a2
13c8: 40c585b3 sub a1,a1,a2
or a0, a0, a3
13cc: 00d56533 or a0,a0,a3
.L4:
srli a3, a3, 1
13d0: 0016d693 srli a3,a3,0x1
srli a2, a2, 1
13d4: 00165613 srli a2,a2,0x1
bnez a3, .L3
13d8: fe0696e3 bnez a3,13c4 <__udivsi3+0x2c>
.L5:
ret
13dc: 00008067 ret
000013e0 <__umodsi3>:
FUNC_END (__udivdi3)
FUNC_BEGIN (__umoddi3)
/* Call __udivdi3(a0, a1), then return the remainder, which is in a1. */
move t0, ra
13e0: 00008293 mv t0,ra
jal __udivdi3
13e4: fb5ff0ef jal ra,1398 <__udivsi3>
move a0, a1
13e8: 00058513 mv a0,a1
jr t0
13ec: 00028067 jr t0
FUNC_END (__umoddi3)
/* Handle negative arguments to __divdi3. */
.L10:
neg a0, a0
13f0: 40a00533 neg a0,a0
/* Zero is handled as a negative so that the result will not be inverted. */
bgtz a1, .L12 /* Compute __udivdi3(-a0, a1), then negate the result. */
13f4: 00b04863 bgtz a1,1404 <__umodsi3+0x24>
neg a1, a1
13f8: 40b005b3 neg a1,a1
j __udivdi3 /* Compute __udivdi3(-a0, -a1). */
13fc: f9dff06f j 1398 <__udivsi3>
.L11: /* Compute __udivdi3(a0, -a1), then negate the result. */
neg a1, a1
1400: 40b005b3 neg a1,a1
.L12:
move t0, ra
1404: 00008293 mv t0,ra
jal __udivdi3
1408: f91ff0ef jal ra,1398 <__udivsi3>
neg a0, a0
140c: 40a00533 neg a0,a0
jr t0
1410: 00028067 jr t0
00001414 <__modsi3>:
FUNC_END (__divdi3)
FUNC_BEGIN (__moddi3)
move t0, ra
1414: 00008293 mv t0,ra
bltz a1, .L31
1418: 0005ca63 bltz a1,142c <__modsi3+0x18>
bltz a0, .L32
141c: 00054c63 bltz a0,1434 <__modsi3+0x20>
.L30:
jal __udivdi3 /* The dividend is not negative. */
1420: f79ff0ef jal ra,1398 <__udivsi3>
move a0, a1
1424: 00058513 mv a0,a1
jr t0
1428: 00028067 jr t0
.L31:
neg a1, a1
142c: 40b005b3 neg a1,a1
bgez a0, .L30
1430: fe0558e3 bgez a0,1420 <__modsi3+0xc>
.L32:
neg a0, a0
1434: 40a00533 neg a0,a0
jal __udivdi3 /* The dividend is hella negative. */
1438: f61ff0ef jal ra,1398 <__udivsi3>
neg a0, a1
143c: 40b00533 neg a0,a1
jr t0
1440: 00028067 jr t0
00001444 <__clzsi2>:
int
__clzSI2 (UWtype x)
{
Wtype ret;
count_leading_zeros (ret, x);
1444: 000107b7 lui a5,0x10
1448: 02f57a63 bgeu a0,a5,147c <__clzsi2+0x38>
144c: 10053793 sltiu a5,a0,256
1450: 0017c793 xori a5,a5,1
1454: 00379793 slli a5,a5,0x3
1458: 00001737 lui a4,0x1
145c: 02000693 li a3,32
1460: 40f686b3 sub a3,a3,a5
1464: 00f55533 srl a0,a0,a5
1468: 65870793 addi a5,a4,1624 # 1658 <__clz_tab>
146c: 00a787b3 add a5,a5,a0
1470: 0007c503 lbu a0,0(a5) # 10000 <_data_lma+0xe8a8>
return ret;
}
1474: 40a68533 sub a0,a3,a0
1478: 00008067 ret
count_leading_zeros (ret, x);
147c: 01000737 lui a4,0x1000
1480: 01000793 li a5,16
1484: fce56ae3 bltu a0,a4,1458 <__clzsi2+0x14>
1488: 01800793 li a5,24
148c: fcdff06f j 1458 <__clzsi2+0x14>