From e382217e049a0fe3f840997d7534b3ba90714425 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Wed, 11 May 2022 18:52:15 +0200 Subject: [PATCH] update vm_tgc_c due reworked CoreDSL generator --- src/vm/interp/vm_tgc_c.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp index b366450..f6605ee 100644 --- a/src/vm/interp/vm_tgc_c.cpp +++ b/src/vm/interp/vm_tgc_c.cpp @@ -1921,7 +1921,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - if((rd % traits::RFS) != 0) *(X+rd) = (uint32_t)(int32_t)sext<6>(imm); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int8_t)sext<6>(imm); } } catch(...){} }