diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 2a39f83..bf1e32a 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -256,7 +256,7 @@ public: return traits::MISA_VAL&0b0100; } constexpr reg_t get_pc_mask() { - return has_compressed()?~1:~3; + return has_compressed()?(reg_t)~1:(reg_t)~3; } riscv_hart_m_p(feature_config cfg = feature_config{}); @@ -477,11 +477,11 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) } // special handling & overrides csr_rd_cb[time] = &this_class::read_time; - csr_rd_cb[timeh] = &this_class::read_time; + if(traits::XLEN==32) csr_rd_cb[timeh] = &this_class::read_time; csr_rd_cb[cycle] = &this_class::read_cycle; - csr_rd_cb[cycleh] = &this_class::read_cycle; + if(traits::XLEN==32) csr_rd_cb[cycleh] = &this_class::read_cycle; csr_rd_cb[instret] = &this_class::read_instret; - csr_rd_cb[instreth] = &this_class::read_instret; + if(traits::XLEN==32) csr_rd_cb[instreth] = &this_class::read_instret; csr_rd_cb[mcycle] = &this_class::read_cycle; csr_wr_cb[mcycle] = &this_class::write_cycle; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 06c8830..94f7e08 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -508,11 +508,11 @@ riscv_hart_mu_p::riscv_hart_mu_p(feature_config cfg) } // special handling & overrides csr_rd_cb[time] = &this_class::read_time; - csr_rd_cb[timeh] = &this_class::read_time; + if(traits::XLEN==32) csr_rd_cb[timeh] = &this_class::read_time; csr_rd_cb[cycle] = &this_class::read_cycle; - csr_rd_cb[cycleh] = &this_class::read_cycle; + if(traits::XLEN==32) csr_rd_cb[cycleh] = &this_class::read_cycle; csr_rd_cb[instret] = &this_class::read_instret; - csr_rd_cb[instreth] = &this_class::read_instret; + if(traits::XLEN==32) csr_rd_cb[instreth] = &this_class::read_instret; csr_rd_cb[mcycle] = &this_class::read_cycle; csr_wr_cb[mcycle] = &this_class::write_cycle;