From d78fcc48e54aef4ebffab1ceb079349b00fb44ef Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Thu, 30 Sep 2021 19:27:03 +0200 Subject: [PATCH] use marchid in platform --- incl/iss/arch/riscv_hart_m_p.h | 4 ++-- incl/iss/arch/riscv_hart_msu_vp.h | 2 +- incl/iss/arch/riscv_hart_mu_p.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/incl/iss/arch/riscv_hart_m_p.h b/incl/iss/arch/riscv_hart_m_p.h index 9d93bd2..406b946 100644 --- a/incl/iss/arch/riscv_hart_m_p.h +++ b/incl/iss/arch/riscv_hart_m_p.h @@ -307,7 +307,7 @@ riscv_hart_m_p::riscv_hart_m_p() // reset values csr[misa] = traits::MISA_VAL; csr[mvendorid] = 0x669; - csr[marchid] = 0x80000003; + csr[marchid] = traits::MARCHID_VAL; csr[mimpid] = 1; uart_buf.str(""); @@ -922,7 +922,7 @@ template uint64_t riscv_hart_m_p::enter_trap(uint64_t flag csr[mepc] = static_cast(addr) & get_pc_mask(); // store actual address instruction of exception switch(cause){ case 0: - csr[mtval] = instr; + csr[mtval] = addr; break; case 2: csr[mtval] = (instr & 0x3)==3?instr:instr&0xffff; diff --git a/incl/iss/arch/riscv_hart_msu_vp.h b/incl/iss/arch/riscv_hart_msu_vp.h index 2dbfef2..aa88e6d 100644 --- a/incl/iss/arch/riscv_hart_msu_vp.h +++ b/incl/iss/arch/riscv_hart_msu_vp.h @@ -419,7 +419,7 @@ riscv_hart_msu_vp::riscv_hart_msu_vp() // reset values csr[misa] = traits::MISA_VAL; csr[mvendorid] = 0x669; - csr[marchid] = 0x80000003; + csr[marchid] = traits::MARCHID_VAL; csr[mimpid] = 1; uart_buf.str(""); diff --git a/incl/iss/arch/riscv_hart_mu_p.h b/incl/iss/arch/riscv_hart_mu_p.h index b931fb2..b6ea430 100644 --- a/incl/iss/arch/riscv_hart_mu_p.h +++ b/incl/iss/arch/riscv_hart_mu_p.h @@ -349,7 +349,7 @@ riscv_hart_mu_p::riscv_hart_mu_p() // reset values csr[misa] = traits::MISA_VAL; csr[mvendorid] = 0x669; - csr[marchid] = 0x80000004; + csr[marchid] = traits::MARCHID_VAL; csr[mimpid] = 1; csr[mclicbase] = 0xc0000000; // TODO: should be taken from YAML file