From cf7b62a3f9bf218a69850a99172f1830789c7ee9 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Thu, 13 May 2021 15:38:33 +0200 Subject: [PATCH] update names --- CMakeLists.txt | 5 +-- gen_input/TGFS.core_desc | 14 ++++++-- incl/iss/arch/.gitignore | 2 +- incl/iss/arch/{tgf_c.h => tgc_c.h} | 34 ++++++++++---------- src/iss/.gitignore | 2 +- src/iss/{tgf_c.cpp => tgc_c.cpp} | 22 ++++++------- src/main.cpp | 14 +++++--- src/sysc/core_complex.cpp | 10 ++++-- src/vm/interp/.gitignore | 2 +- src/vm/interp/{vm_tgf_c.cpp => vm_tgc_c.cpp} | 8 ++--- 10 files changed, 67 insertions(+), 46 deletions(-) rename incl/iss/arch/{tgf_c.h => tgc_c.h} (91%) rename src/iss/{tgf_c.cpp => tgc_c.cpp} (84%) rename src/vm/interp/{vm_tgf_c.cpp => vm_tgc_c.cpp} (99%) diff --git a/CMakeLists.txt b/CMakeLists.txt index 84028de..92f4351 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -66,7 +66,8 @@ set_target_properties(${PROJECT_NAME} PROPERTIES if(SystemC_FOUND) add_library(${PROJECT_NAME}_sc src/sysc/core_complex.cpp) - target_compile_definitions(${PROJECT_NAME}_sc PUBLIC WITH_SYSTEMC) + target_compile_definitions(${PROJECT_NAME}_sc PUBLIC WITH_SYSTEMC) + target_compile_definitions(${PROJECT_NAME}_sc PRIVATE CORE_${CORE_NAME}) target_include_directories(${PROJECT_NAME}_sc PUBLIC ../incl ${SystemC_INCLUDE_DIRS} ${CCI_INCLUDE_DIRS}) if(SCV_FOUND) @@ -87,7 +88,7 @@ endif() project(tgc-sim) add_executable(${PROJECT_NAME} src/main.cpp) # This sets the include directory for the reference project. This is the -I flag in gcc. - +target_compile_definitions(${PROJECT_NAME} PRIVATE CORE_${CORE_NAME}) if(WITH_LLVM) target_compile_definitions(${PROJECT_NAME} PRIVATE WITH_LLVM) target_link_libraries(${PROJECT_NAME} PUBLIC ${llvm_libs}) diff --git a/gen_input/TGFS.core_desc b/gen_input/TGFS.core_desc index 56b3674..ba2a63f 100644 --- a/gen_input/TGFS.core_desc +++ b/gen_input/TGFS.core_desc @@ -2,7 +2,7 @@ import "CoreDSL-Instruction-Set-Description/RV32I.core_desc" import "CoreDSL-Instruction-Set-Description/RVM.core_desc" import "CoreDSL-Instruction-Set-Description/RVC.core_desc" -Core TGF_B provides RV32I { +Core TGC_B provides RV32I { architectural_state { unsigned XLEN=32; unsigned PCLEN=32; @@ -14,7 +14,7 @@ Core TGF_B provides RV32I { } } -Core TGF_C provides RV32I, RV32M, RV32IC { +Core TGC_C provides RV32I, RV32M, RV32IC { architectural_state { unsigned XLEN=32; unsigned PCLEN=32; @@ -25,3 +25,13 @@ Core TGF_C provides RV32I, RV32M, RV32IC { unsigned PGMASK = 0xfff; //PGSIZE-1 } } + +Core TGC_D provides RV32I, RV32M, RV32IC { + architectural_state { + unsigned XLEN=32; + unsigned PCLEN=32; + // definitions for the architecture wrapper + // XL ZYXWVUTSRQPONMLKJIHGFEDCBA + unsigned MISA_VAL = 0b01000000000000000001000100000100; + } +} diff --git a/incl/iss/arch/.gitignore b/incl/iss/arch/.gitignore index 52ab34f..52334de 100644 --- a/incl/iss/arch/.gitignore +++ b/incl/iss/arch/.gitignore @@ -1 +1 @@ -/tgf_b.h +/tgc_*.h diff --git a/incl/iss/arch/tgf_c.h b/incl/iss/arch/tgc_c.h similarity index 91% rename from incl/iss/arch/tgf_c.h rename to incl/iss/arch/tgc_c.h index 8facd1b..bf4f958 100644 --- a/incl/iss/arch/tgf_c.h +++ b/incl/iss/arch/tgc_c.h @@ -30,8 +30,8 @@ * *******************************************************************************/ -#ifndef _TGF_C_H_ -#define _TGF_C_H_ +#ifndef _TGC_C_H_ +#define _TGC_C_H_ #include #include @@ -41,11 +41,11 @@ namespace iss { namespace arch { -struct tgf_c; +struct tgc_c; -template <> struct traits { +template <> struct traits { - constexpr static char const* const core_type = "TGF_C"; + constexpr static char const* const core_type = "TGC_C"; static constexpr std::array reg_names{ {"X0", "X1", "X2", "X3", "X4", "X5", "X6", "X7", "X8", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X27", "X28", "X29", "X30", "X31", "PC", "NEXT_PC", "PRIV"}}; @@ -53,7 +53,7 @@ template <> struct traits { static constexpr std::array reg_aliases{ {"X0", "X1", "X2", "X3", "X4", "X5", "X6", "X7", "X8", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X27", "X28", "X29", "X30", "X31", "PC", "NEXT_PC", "PRIV"}}; - enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b01000000000000000001000100000100, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3, eei_aligned_addresses=1, MUL_LEN=64}; + enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b01000000000000000001000100000100, PGSIZE=0x1000, PGMASK=0b111111111111, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3, eei_aligned_addresses=1, MUL_LEN=64}; constexpr static unsigned FP_REGS_SIZE = 0; @@ -179,15 +179,15 @@ template <> struct traits { }; }; -struct tgf_c: public arch_if { +struct tgc_c: public arch_if { - using virt_addr_t = typename traits::virt_addr_t; - using phys_addr_t = typename traits::phys_addr_t; - using reg_t = typename traits::reg_t; - using addr_t = typename traits::addr_t; + using virt_addr_t = typename traits::virt_addr_t; + using phys_addr_t = typename traits::phys_addr_t; + using reg_t = typename traits::reg_t; + using addr_t = typename traits::addr_t; - tgf_c(); - ~tgf_c(); + tgc_c(); + ~tgc_c(); void reset(uint64_t address=0) override; @@ -208,9 +208,9 @@ struct tgf_c: public arch_if { inline uint64_t stop_code() { return interrupt_sim; } inline phys_addr_t v2p(const iss::addr_t& addr){ - if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || + if (addr.space != traits::MEM || addr.type == iss::address_type::PHYSICAL || addr_mode[static_cast(addr.access)&0x3]==address_type::PHYSICAL) { - return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); + return phys_addr_t(addr.access, addr.space, addr.val&traits::addr_mask); } else return virt2phys(addr); } @@ -223,7 +223,7 @@ struct tgf_c: public arch_if { protected: #pragma pack(push, 1) - struct TGF_C_regs { + struct TGC_C_regs { uint32_t X0 = 0; uint32_t X1 = 0; uint32_t X2 = 0; @@ -275,4 +275,4 @@ protected: } } -#endif /* _TGF_C_H_ */ +#endif /* _TGC_C_H_ */ diff --git a/src/iss/.gitignore b/src/iss/.gitignore index 9e3228c..c62e4a7 100644 --- a/src/iss/.gitignore +++ b/src/iss/.gitignore @@ -1 +1 @@ -/tgf_b.cpp +/tgc_*.cpp diff --git a/src/iss/tgf_c.cpp b/src/iss/tgc_c.cpp similarity index 84% rename from src/iss/tgf_c.cpp rename to src/iss/tgc_c.cpp index 68f8cb7..d95b1da 100644 --- a/src/iss/tgf_c.cpp +++ b/src/iss/tgc_c.cpp @@ -32,26 +32,26 @@ #include "util/ities.h" #include -#include +#include #include #include #include using namespace iss::arch; -constexpr std::array iss::arch::traits::reg_names; -constexpr std::array iss::arch::traits::reg_aliases; -constexpr std::array iss::arch::traits::reg_bit_widths; -constexpr std::array iss::arch::traits::reg_byte_offsets; +constexpr std::array iss::arch::traits::reg_names; +constexpr std::array iss::arch::traits::reg_aliases; +constexpr std::array iss::arch::traits::reg_bit_widths; +constexpr std::array iss::arch::traits::reg_byte_offsets; -tgf_c::tgf_c() { +tgc_c::tgc_c() { reg.icount = 0; } -tgf_c::~tgf_c() = default; +tgc_c::~tgc_c() = default; -void tgf_c::reset(uint64_t address) { - for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); +void tgc_c::reset(uint64_t address) { + for(size_t i=0; i::NUM_REGS; ++i) set_reg(i, std::vector(sizeof(traits::reg_t),0)); reg.PC=address; reg.NEXT_PC=reg.PC; reg.PRIV=0x3; @@ -59,11 +59,11 @@ void tgf_c::reset(uint64_t address) { reg.icount=0; } -uint8_t *tgf_c::get_regs_base_ptr() { +uint8_t *tgc_c::get_regs_base_ptr() { return reinterpret_cast(®); } -tgf_c::phys_addr_t tgf_c::virt2phys(const iss::addr_t &pc) { +tgc_c::phys_addr_t tgc_c::virt2phys(const iss::addr_t &pc) { return phys_addr_t(pc); // change logical address to physical address } diff --git a/src/main.cpp b/src/main.cpp index b932987..173d67c 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -36,10 +36,14 @@ #include #include #include -#ifdef WITH_TGF_B -#include +#ifdef CORE_TGC_C +#include "iss/arch/tgc_c.h" +using core_type = iss::arch::tgc_c; +#endif +#ifdef CORE_TGC_D +#include "iss/arch/tgc_d.h" +using core_type = iss::arch::tgc_d; #endif -#include #ifdef WITH_LLVM #include #endif @@ -139,7 +143,7 @@ int main(int argc, char *argv[]) { #endif if (isa_opt == "tgf_c") { std::tie(cpu, vm) = - create_cpu(clim["backend"].as(), clim["gdb-port"].as()); + create_cpu(clim["backend"].as(), clim["gdb-port"].as()); } else { LOG(ERROR) << "Illegal argument value for '--isa': " << clim["isa"].as() << std::endl; return 127; @@ -179,7 +183,7 @@ int main(int argc, char *argv[]) { } uint64_t start_address = 0; if (clim.count("mem")) - vm->get_arch()->load_file(clim["mem"].as(), iss::arch::traits::MEM); + vm->get_arch()->load_file(clim["mem"].as(), iss::arch::traits::MEM); if (clim.count("elf")) for (std::string input : clim["elf"].as>()) { auto start_addr = vm->get_arch()->load_file(input); diff --git a/src/sysc/core_complex.cpp b/src/sysc/core_complex.cpp index 9375997..bf90d2c 100644 --- a/src/sysc/core_complex.cpp +++ b/src/sysc/core_complex.cpp @@ -32,7 +32,14 @@ #include "sysc/core_complex.h" #include "iss/arch/riscv_hart_m_p.h" -#include "iss/arch/tgf_c.h" +#ifdef CORE_TGC_C +#include "iss/arch/tgc_c.h" +using core_type = iss::arch::tgc_c; +#endif +#ifdef CORE_TGC_D +#include "iss/arch/tgc_d.h" +using core_type = iss::arch::tgc_d; +#endif #include "iss/debugger/encoderdecoder.h" #include "iss/debugger/gdb_session.h" #include "iss/debugger/server.h" @@ -59,7 +66,6 @@ namespace { iss::debugger::encoder_decoder encdec; } -using core_type = iss::arch::tgf_c; namespace { diff --git a/src/vm/interp/.gitignore b/src/vm/interp/.gitignore index 821e3f0..89389b0 100644 --- a/src/vm/interp/.gitignore +++ b/src/vm/interp/.gitignore @@ -1 +1 @@ -/vm_tgf_b.cpp +/vm_tgc_*.cpp diff --git a/src/vm/interp/vm_tgf_c.cpp b/src/vm/interp/vm_tgc_c.cpp similarity index 99% rename from src/vm/interp/vm_tgf_c.cpp rename to src/vm/interp/vm_tgc_c.cpp index 8123d5e..80903c6 100644 --- a/src/vm/interp/vm_tgf_c.cpp +++ b/src/vm/interp/vm_tgc_c.cpp @@ -31,7 +31,7 @@ *******************************************************************************/ #include "../fp_functions.h" -#include +#include #include #include #include @@ -50,7 +50,7 @@ namespace iss { namespace interp { -namespace tgf_c { +namespace tgc_c { using namespace iss::arch; using namespace iss::debugger; @@ -3542,8 +3542,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } // namespace mnrv32 template <> -std::unique_ptr create(arch::tgf_c *core, unsigned short port, bool dump) { - auto ret = new tgf_c::vm_impl(*core, dump); +std::unique_ptr create(arch::tgc_c *core, unsigned short port, bool dump) { + auto ret = new tgc_c::vm_impl(*core, dump); if (port != 0) debugger::server::run_server(ret, port); return std::unique_ptr(ret); }