From b493745cd77fd3b6e2fc9f91f2c1877a2afcbccc Mon Sep 17 00:00:00 2001
From: Eyck Jentzsch <eyck@minres.com>
Date: Tue, 2 May 2023 11:21:42 +0200
Subject: [PATCH] sets reset start time to 0

---
 contrib/tgc_import_tb.tcl | 2 +-
 src/sysc/core_complex.cpp | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/contrib/tgc_import_tb.tcl b/contrib/tgc_import_tb.tcl
index 59d56e4..6a7ce1d 100644
--- a/contrib/tgc_import_tb.tcl
+++ b/contrib/tgc_import_tb.tcl
@@ -28,7 +28,7 @@ set clock "Clk"
 puts "instantiating reset manager"
 set reset "Rst"
  ::hw::create_hw_instance "" GenericIPlib:ResetGenerator ${reset}_reset
- ::pct::set_param_value $hardware/${reset}_reset {Constructor Arguments} start_time 1000
+ ::pct::set_param_value $hardware/${reset}_reset {Constructor Arguments} start_time 0
  ::pct::set_param_value $hardware/${reset}_reset {Constructor Arguments} start_time_unit sc_core::SC_PS
  ::pct::set_param_value $hardware/${reset}_reset {Constructor Arguments} duration 10000
  ::pct::set_param_value $hardware/${reset}_reset {Constructor Arguments} duration_unit sc_core::SC_PS
diff --git a/src/sysc/core_complex.cpp b/src/sysc/core_complex.cpp
index d254647..75da28e 100644
--- a/src/sysc/core_complex.cpp
+++ b/src/sysc/core_complex.cpp
@@ -500,6 +500,7 @@ void core_complex::local_irq_cb() {
 void core_complex::run() {
     wait(SC_ZERO_TIME); // separate from elaboration phase
     do {
+        wait(SC_ZERO_TIME);
         if (rst_i.read()) {
             cpu->reset(GET_PROP_VALUE(reset_address));
             wait(rst_i.negedge_event());