From 1e6a0086e9ed15ad2ad6a9a09a8a92372406412d Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Thu, 7 Mar 2024 13:58:08 +0100 Subject: [PATCH 01/18] adds disass functionality --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 12 +- src/vm/asmjit/helper_func.h | 6 +- src/vm/asmjit/vm_tgc5c.cpp | 1209 ++++++++++++++++--- 3 files changed, 1049 insertions(+), 178 deletions(-) diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index 863628c..00e86e9 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -127,10 +127,18 @@ private: <%instr.fields.eachLine{%>${it} <%}%>if(this->disass_enabled){ /* generate disass */ + <%instr.disass.eachLine{%> + ${it}<%}%> + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\\n${instr.name}_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, ${idx}); pc=pc+ ${instr.length/8}; diff --git a/src/vm/asmjit/helper_func.h b/src/vm/asmjit/helper_func.h index f209e46..88aceba 100644 --- a/src/vm/asmjit/helper_func.h +++ b/src/vm/asmjit/helper_func.h @@ -1,4 +1,5 @@ - +#include +#include x86::Mem get_reg_ptr(jit_holder& jh, unsigned idx) { @@ -74,6 +75,7 @@ inline void write_reg_to_mem(jit_holder& jh, x86::Gp reg, unsigned idx) { void gen_instr_prologue(jit_holder& jh, addr_t pc) { auto& cc = jh.cc; + cc.mov(jh.pc, pc); cc.comment("\n//(*icount)++;"); cc.inc(get_reg_ptr(jh, traits::ICOUNT)); @@ -534,4 +536,4 @@ inline void gen_write_mem(jit_holder& jh, mem_type_e type, uint64_t addr, int64_ auto addr_reg = jh.cc.newUInt64(); jh.cc.mov(addr_reg, addr); gen_write_mem(jh, type, addr_reg, val_reg, length); -} \ No newline at end of file +} diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 497cc1e..84b4a7e 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -300,10 +300,20 @@ private: uint32_t imm = ((bit_sub<12,20>(instr) << 12)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "lui"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLUI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 0); pc=pc+ 4; @@ -334,10 +344,20 @@ private: uint32_t imm = ((bit_sub<12,20>(instr) << 12)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#08x}", fmt::arg("mnemonic", "auipc"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nAUIPC_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 1); pc=pc+ 4; @@ -368,10 +388,20 @@ private: uint32_t imm = ((bit_sub<12,8>(instr) << 12) | (bit_sub<20,1>(instr) << 11) | (bit_sub<21,10>(instr) << 1) | (bit_sub<31,1>(instr) << 20)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#0x}", fmt::arg("mnemonic", "jal"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nJAL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 2); pc=pc+ 4; @@ -411,10 +441,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm:#0x}", fmt::arg("mnemonic", "jalr"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nJALR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 3); pc=pc+ 4; @@ -470,10 +510,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "beq"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBEQ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 4); pc=pc+ 4; @@ -517,10 +567,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bne"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBNE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 5); pc=pc+ 4; @@ -564,10 +624,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "blt"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBLT_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 6); pc=pc+ 4; @@ -613,10 +683,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bge"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBGE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 7); pc=pc+ 4; @@ -662,10 +742,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bltu"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBLTU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 8); pc=pc+ 4; @@ -709,10 +799,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rs2}, {imm:#0x}", fmt::arg("mnemonic", "bgeu"), + fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nBGEU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 9); pc=pc+ 4; @@ -756,10 +856,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lb"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 10); pc=pc+ 4; @@ -798,10 +908,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lh"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 11); pc=pc+ 4; @@ -840,10 +960,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lw"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 12); pc=pc+ 4; @@ -882,10 +1012,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lbu"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLBU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 13); pc=pc+ 4; @@ -923,10 +1063,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm}({rs1})", fmt::arg("mnemonic", "lhu"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nLHU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 14); pc=pc+ 4; @@ -964,10 +1114,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sb"), + fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 15); pc=pc+ 4; @@ -1001,10 +1161,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sh"), + fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 16); pc=pc+ 4; @@ -1038,10 +1208,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs2}, {imm}({rs1})", fmt::arg("mnemonic", "sw"), + fmt::arg("rs2", name(rs2)), fmt::arg("imm", imm), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 17); pc=pc+ 4; @@ -1075,10 +1255,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "addi"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nADDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 18); pc=pc+ 4; @@ -1113,10 +1303,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "slti"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLTI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 19); pc=pc+ 4; @@ -1163,10 +1363,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "sltiu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLTIU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 20); pc=pc+ 4; @@ -1212,10 +1422,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "xori"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nXORI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 21); pc=pc+ 4; @@ -1249,10 +1469,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "ori"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nORI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 22); pc=pc+ 4; @@ -1286,10 +1516,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {imm}", fmt::arg("mnemonic", "andi"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nANDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 23); pc=pc+ 4; @@ -1323,10 +1563,20 @@ private: uint8_t shamt = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "slli"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 24); pc=pc+ 4; @@ -1360,10 +1610,20 @@ private: uint8_t shamt = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "srli"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSRLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 25); pc=pc+ 4; @@ -1397,10 +1657,20 @@ private: uint8_t shamt = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {shamt}", fmt::arg("mnemonic", "srai"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("shamt", shamt)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSRAI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 26); pc=pc+ 4; @@ -1436,10 +1706,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "add"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nADD_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 27); pc=pc+ 4; @@ -1474,10 +1754,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sub"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSUB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 28); pc=pc+ 4; @@ -1512,10 +1802,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sll"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 29); pc=pc+ 4; @@ -1551,10 +1851,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "slt"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLT_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 30); pc=pc+ 4; @@ -1602,10 +1912,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sltu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSLTU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 31); pc=pc+ 4; @@ -1651,10 +1971,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "xor"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nXOR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 32); pc=pc+ 4; @@ -1688,10 +2018,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "srl"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSRL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 33); pc=pc+ 4; @@ -1727,10 +2067,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "sra"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nSRA_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 34); pc=pc+ 4; @@ -1768,10 +2118,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "or"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nOR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 35); pc=pc+ 4; @@ -1805,10 +2165,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "and"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nAND_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 36); pc=pc+ 4; @@ -1844,10 +2214,20 @@ private: uint8_t fm = ((bit_sub<28,4>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {pred}, {succ} ({fm} , {rs1}, {rd})", fmt::arg("mnemonic", "fence"), + fmt::arg("pred", pred), fmt::arg("succ", succ), fmt::arg("fm", fm), fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nFENCE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 37); pc=pc+ 4; @@ -1868,10 +2248,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "ecall"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nECALL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 38); pc=pc+ 4; @@ -1892,10 +2281,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "ebreak"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nEBREAK_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 39); pc=pc+ 4; @@ -1916,10 +2314,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "mret"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nMRET_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 40); pc=pc+ 4; @@ -1940,10 +2347,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "wfi"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nWFI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 41); pc=pc+ 4; @@ -1967,10 +2383,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrw"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 42); pc=pc+ 4; @@ -2008,10 +2434,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrs"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRS_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 43); pc=pc+ 4; @@ -2050,10 +2486,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {rs1}", fmt::arg("mnemonic", "csrrc"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRC_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 44); pc=pc+ 4; @@ -2092,10 +2538,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrwi"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRWI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 45); pc=pc+ 4; @@ -2129,10 +2585,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrsi"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRSI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 46); pc=pc+ 4; @@ -2170,10 +2636,20 @@ private: uint16_t csr = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {csr}, {zimm:#0x}", fmt::arg("mnemonic", "csrrci"), + fmt::arg("rd", name(rd)), fmt::arg("csr", csr), fmt::arg("zimm", zimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nCSRRCI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 47); pc=pc+ 4; @@ -2211,10 +2687,20 @@ private: uint16_t imm = ((bit_sub<20,12>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"), + fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nFENCE_I_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 48); pc=pc+ 4; @@ -2238,10 +2724,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mul"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nMUL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 49); pc=pc+ 4; @@ -2282,10 +2778,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulh"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nMULH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 50); pc=pc+ 4; @@ -2328,10 +2834,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulhsu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nMULHSU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 51); pc=pc+ 4; @@ -2373,10 +2889,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "mulhu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nMULHU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 52); pc=pc+ 4; @@ -2417,10 +2943,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "div"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nDIV_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 53); pc=pc+ 4; @@ -2494,10 +3030,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "divu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nDIVU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 54); pc=pc+ 4; @@ -2549,10 +3095,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "rem"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nREM_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 55); pc=pc+ 4; @@ -2630,10 +3186,20 @@ private: uint8_t rs2 = ((bit_sub<20,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs1}, {rs2}", fmt::arg("mnemonic", "remu"), + fmt::arg("rd", name(rd)), fmt::arg("rs1", name(rs1)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nREMU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 56); pc=pc+ 4; @@ -2683,10 +3249,20 @@ private: uint16_t imm = ((bit_sub<5,1>(instr) << 3) | (bit_sub<6,1>(instr) << 2) | (bit_sub<7,4>(instr) << 6) | (bit_sub<11,2>(instr) << 4)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__addi4spn"), + fmt::arg("rd", name(8+rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__ADDI4SPN_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 57); pc=pc+ 2; @@ -2719,10 +3295,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c__lw"), + fmt::arg("rd", name(8+rd)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__LW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 58); pc=pc+ 2; @@ -2753,10 +3339,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs2}, {uimm:#05x}({rs1})", fmt::arg("mnemonic", "c__sw"), + fmt::arg("rs2", name(8+rs2)), fmt::arg("uimm", uimm), fmt::arg("rs1", name(8+rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 59); pc=pc+ 2; @@ -2784,10 +3380,20 @@ private: uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__addi"), + fmt::arg("rs1", name(rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__ADDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 60); pc=pc+ 2; @@ -2820,10 +3426,19 @@ private: uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "c__nop"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__NOP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 61); pc=pc+ 2; @@ -2844,10 +3459,20 @@ private: uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c__jal"), + fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__JAL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 62); pc=pc+ 2; @@ -2874,10 +3499,20 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__li"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__LI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 63); pc=pc+ 2; @@ -2908,10 +3543,20 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "c__lui"), + fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__LUI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 64); pc=pc+ 2; @@ -2939,10 +3584,20 @@ private: uint16_t nzimm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 7) | (bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 4) | (bit_sub<12,1>(instr) << 9)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {nzimm:#05x}", fmt::arg("mnemonic", "c__addi16sp"), + fmt::arg("nzimm", nzimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__ADDI16SP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 65); pc=pc+ 2; @@ -2973,10 +3628,19 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "__reserved_clui"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\n__reserved_clui_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 66); pc=pc+ 2; @@ -2999,10 +3663,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c__srli"), + fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SRLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 67); pc=pc+ 2; @@ -3028,10 +3702,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {shamt}", fmt::arg("mnemonic", "c__srai"), + fmt::arg("rs1", name(8+rs1)), fmt::arg("shamt", shamt)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SRAI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 68); pc=pc+ 2; @@ -3071,10 +3755,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__andi"), + fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__ANDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 69); pc=pc+ 2; @@ -3101,10 +3795,20 @@ private: uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__sub"), + fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SUB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 70); pc=pc+ 2; @@ -3131,10 +3835,20 @@ private: uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__xor"), + fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__XOR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 71); pc=pc+ 2; @@ -3160,10 +3874,20 @@ private: uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__or"), + fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__OR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 72); pc=pc+ 2; @@ -3189,10 +3913,20 @@ private: uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__and"), + fmt::arg("rd", name(8+rd)), fmt::arg("rs2", name(8+rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__AND_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 73); pc=pc+ 2; @@ -3217,10 +3951,20 @@ private: uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {imm:#05x}", fmt::arg("mnemonic", "c__j"), + fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__J_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 74); pc=pc+ 2; @@ -3245,10 +3989,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__beqz"), + fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__BEQZ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 75); pc=pc+ 2; @@ -3281,10 +4035,20 @@ private: uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {imm:#05x}", fmt::arg("mnemonic", "c__bnez"), + fmt::arg("rs1", name(8+rs1)), fmt::arg("imm", imm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__BNEZ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 76); pc=pc+ 2; @@ -3317,10 +4081,20 @@ private: uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}, {nzuimm}", fmt::arg("mnemonic", "c__slli"), + fmt::arg("rs1", name(rs1)), fmt::arg("nzuimm", nzuimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SLLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 77); pc=pc+ 2; @@ -3353,10 +4127,20 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, sp, {uimm:#05x}", fmt::arg("mnemonic", "c__lwsp"), + fmt::arg("rd", name(rd)), fmt::arg("uimm", uimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__LWSP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 78); pc=pc+ 2; @@ -3391,10 +4175,20 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__mv"), + fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__MV_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 79); pc=pc+ 2; @@ -3424,10 +4218,20 @@ private: uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c__jr"), + fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__JR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 80); pc=pc+ 2; @@ -3457,10 +4261,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "__reserved_cmv"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\n__reserved_cmv_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 81); pc=pc+ 2; @@ -3483,10 +4296,20 @@ private: uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rd}, {rs2}", fmt::arg("mnemonic", "c__add"), + fmt::arg("rd", name(rd)), fmt::arg("rs2", name(rs2))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__ADD_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 82); pc=pc+ 2; @@ -3519,10 +4342,20 @@ private: uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs1}", fmt::arg("mnemonic", "c__jalr"), + fmt::arg("rs1", name(rs1))); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__JALR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 83); pc=pc+ 2; @@ -3555,10 +4388,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "c__ebreak"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__EBREAK_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 84); pc=pc+ 2; @@ -3581,10 +4423,20 @@ private: uint8_t uimm = ((bit_sub<7,2>(instr) << 6) | (bit_sub<9,4>(instr) << 2)); if(this->disass_enabled){ /* generate disass */ + + auto mnemonic = fmt::format( + "{mnemonic:10} {rs2}, {uimm:#05x}(sp)", fmt::arg("mnemonic", "c__swsp"), + fmt::arg("rs2", name(rs2)), fmt::arg("uimm", uimm)); + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nC__SWSP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 85); pc=pc+ 2; @@ -3615,10 +4467,19 @@ private: uint64_t PC = pc.val; if(this->disass_enabled){ /* generate disass */ + + //This disass is not yet implemented + std::string mnemonic = "dii"; + InvokeNode* call_print_disass; + char* mnemonic_ptr = strdup(mnemonic.c_str()); + jh.disass_collection.push_back(mnemonic_ptr); + jh.cc.invoke(&call_print_disass, &print_disass, FuncSignatureT()); + call_print_disass->setArg(0, jh.arch_if_ptr); + call_print_disass->setArg(1, pc.val); + call_print_disass->setArg(2, mnemonic_ptr); + } x86::Compiler& cc = jh.cc; - //ideally only do this if necessary (someone / plugin needs it) - cc.mov(jh.pc,PC); cc.comment(fmt::format("\nDII_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 86); pc=pc+ 2; From 8aed551813128b4a9363eb0223bb88b318699f4c Mon Sep 17 00:00:00 2001 From: stas Date: Thu, 14 Mar 2024 09:43:08 +0100 Subject: [PATCH 02/18] Add a new LOG macro in SCC to avoid conflicts with other libraries. --- src/iss/arch/riscv_hart_m_p.h | 28 ++++++++++++------------- src/iss/arch/riscv_hart_msu_vp.h | 28 ++++++++++++------------- src/iss/arch/riscv_hart_mu_p.h | 28 ++++++++++++------------- src/iss/debugger/riscv_target_adapter.h | 12 +++++------ src/iss/plugin/cycle_estimate.cpp | 6 +++--- src/iss/plugin/instruction_count.cpp | 8 +++---- src/main.cpp | 8 +++---- 7 files changed, 59 insertions(+), 59 deletions(-) diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 99a7f06..1a3d84b 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -600,7 +600,7 @@ template std::pair riscv_hart_m auto res = this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, pseg->get_physical_address(), fsize, reinterpret_cast(seg_data)); if(res != iss::Ok) - LOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); + CPPLOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); } } for(const auto sec : reader.sections) { @@ -654,11 +654,11 @@ iss::status riscv_hart_m_p::read(const address_type type, const acce const unsigned length, uint8_t* const data) { #ifndef NDEBUG if(access && iss::access_type::DEBUG) { - LOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; } else if(access && iss::access_type::FETCH) { - LOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; } else { - LOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; } #endif try { @@ -740,23 +740,23 @@ iss::status riscv_hart_m_p::write(const address_type type, const acc const char* prefix = (access && iss::access_type::DEBUG) ? "debug " : ""; switch(length) { case 8: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 4: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 2: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 1: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; default: - LOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; + CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; } #endif try { @@ -808,7 +808,7 @@ iss::status riscv_hart_m_p::write(const address_type type, const acc case 0x10023000: // UART1 base, TXFIFO reg uart_buf << (char)data[0]; if(((char)data[0]) == '\n' || data[0] == 0) { - // LOG(INFO)<<"UART"<<((paddr.val>>16)&0x3)<<" send + // CPPLOG(INFO)<<"UART"<<((paddr.val>>16)&0x3)<<" send // '"<::write_mem(phys_addr_t paddr, unsigned le // TODO remove UART, Peripherals should not be part of the ISS case 0xFFFF0000: // UART0 base, TXFIFO reg if(((char)data[0]) == '\n' || data[0] == 0) { - LOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; uart_buf.str(""); } else if(((char)data[0]) != '\r') uart_buf << (char)data[0]; @@ -1128,10 +1128,10 @@ iss::status riscv_hart_m_p::write_mem(phys_addr_t paddr, unsigned le switch(hostvar >> 48) { case 0: if(hostvar != 0x1) { - LOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } else { - LOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); @@ -1143,7 +1143,7 @@ iss::status riscv_hart_m_p::write_mem(phys_addr_t paddr, unsigned le case 0x0101: { char c = static_cast(hostvar & 0xff); if(c == '\n' || c == 0) { - LOG(INFO) << "tohost send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "tohost send '" << uart_buf.str() << "'"; uart_buf.str(""); } else uart_buf << c; diff --git a/src/iss/arch/riscv_hart_msu_vp.h b/src/iss/arch/riscv_hart_msu_vp.h index 4329160..7384abc 100644 --- a/src/iss/arch/riscv_hart_msu_vp.h +++ b/src/iss/arch/riscv_hart_msu_vp.h @@ -591,7 +591,7 @@ template std::pair riscv_hart_msu_vp::load auto res = this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, pseg->get_physical_address(), fsize, reinterpret_cast(seg_data)); if(res != iss::Ok) - LOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); + CPPLOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); } } for(const auto sec : reader.sections) { @@ -632,11 +632,11 @@ iss::status riscv_hart_msu_vp::read(const address_type type, const access_ const unsigned length, uint8_t* const data) { #ifndef NDEBUG if(access && iss::access_type::DEBUG) { - LOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; } else if(access && iss::access_type::FETCH) { - LOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; } else { - LOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; } #endif try { @@ -726,23 +726,23 @@ iss::status riscv_hart_msu_vp::write(const address_type type, const access const char* prefix = (access && iss::access_type::DEBUG) ? "debug " : ""; switch(length) { case 8: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 4: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 2: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 1: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; default: - LOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; + CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; } #endif try { @@ -787,7 +787,7 @@ iss::status riscv_hart_msu_vp::write(const address_type type, const access case 0x10023000: // UART1 base, TXFIFO reg uart_buf << (char)data[0]; if(((char)data[0]) == '\n' || data[0] == 0) { - // LOG(INFO)<<"UART"<<((paddr.val>>16)&0x3)<<" send + // CPPLOG(INFO)<<"UART"<<((paddr.val>>16)&0x3)<<" send // '"< iss::status riscv_hart_msu_vp::write_mem(phys_add switch(paddr.val) { case 0xFFFF0000: // UART0 base, TXFIFO reg if(((char)data[0]) == '\n' || data[0] == 0) { - LOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; uart_buf.str(""); } else if(((char)data[0]) != '\r') uart_buf << (char)data[0]; @@ -1103,10 +1103,10 @@ template iss::status riscv_hart_msu_vp::write_mem(phys_add switch(hostvar >> 48) { case 0: if(hostvar != 0x1) { - LOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } else { - LOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); @@ -1118,7 +1118,7 @@ template iss::status riscv_hart_msu_vp::write_mem(phys_add case 0x0101: { char c = static_cast(hostvar & 0xff); if(c == '\n' || c == 0) { - LOG(INFO) << "tohost send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "tohost send '" << uart_buf.str() << "'"; uart_buf.str(""); } else uart_buf << c; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 362fece..9d5355b 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -678,7 +678,7 @@ template std::pair riscv_hart_m auto res = this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, pseg->get_physical_address(), fsize, reinterpret_cast(seg_data)); if(res != iss::Ok) - LOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); + CPPLOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex << pseg->get_physical_address(); } } for(const auto sec : reader.sections) { @@ -818,11 +818,11 @@ iss::status riscv_hart_mu_p::read(const address_type type, const acc const unsigned length, uint8_t* const data) { #ifndef NDEBUG if(access && iss::access_type::DEBUG) { - LOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "debug read of " << length << " bytes @addr 0x" << std::hex << addr; } else if(is_fetch(access)) { - LOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACEALL) << "fetch of " << length << " bytes @addr 0x" << std::hex << addr; } else { - LOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; + CPPLOG(TRACE) << "read of " << length << " bytes @addr 0x" << std::hex << addr; } #endif try { @@ -913,23 +913,23 @@ iss::status riscv_hart_mu_p::write(const address_type type, const ac const char* prefix = (access && iss::access_type::DEBUG) ? "debug " : ""; switch(length) { case 8: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 4: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 2: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; case 1: - LOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" + CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" << std::hex << addr; break; default: - LOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; + CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; } #endif try { @@ -990,7 +990,7 @@ iss::status riscv_hart_mu_p::write(const address_type type, const ac case 0x10023000: // UART1 base, TXFIFO reg uart_buf << (char)data[0]; if(((char)data[0]) == '\n' || data[0] == 0) { - // LOG(INFO)<<"UART"<<((addr>>16)&0x3)<<" send + // CPPLOG(INFO)<<"UART"<<((addr>>16)&0x3)<<" send // '"<::write_mem(phys_addr_t paddr, unsigned l // TODO remove UART, Peripherals should not be part of the ISS case 0xFFFF0000: // UART0 base, TXFIFO reg if(((char)data[0]) == '\n' || data[0] == 0) { - LOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; uart_buf.str(""); } else if(((char)data[0]) != '\r') uart_buf << (char)data[0]; @@ -1346,10 +1346,10 @@ iss::status riscv_hart_mu_p::write_mem(phys_addr_t paddr, unsigned l switch(hostvar >> 48) { case 0: if(hostvar != 0x1) { - LOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } else { - LOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar + CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); @@ -1361,7 +1361,7 @@ iss::status riscv_hart_mu_p::write_mem(phys_addr_t paddr, unsigned l case 0x0101: { char c = static_cast(hostvar & 0xff); if(c == '\n' || c == 0) { - LOG(INFO) << "tohost send '" << uart_buf.str() << "'"; + CPPLOG(INFO) << "tohost send '" << uart_buf.str() << "'"; uart_buf.str(""); } else uart_buf << c; diff --git a/src/iss/debugger/riscv_target_adapter.h b/src/iss/debugger/riscv_target_adapter.h index 6a2a527..ac85a67 100644 --- a/src/iss/debugger/riscv_target_adapter.h +++ b/src/iss/debugger/riscv_target_adapter.h @@ -174,7 +174,7 @@ template status riscv_target_adapter::current_thread_query } template status riscv_target_adapter::read_registers(std::vector& data, std::vector& avail) { - LOG(TRACE) << "reading target registers"; + CPPLOG(TRACE) << "reading target registers"; // return idx<0?:; data.clear(); avail.clear(); @@ -328,9 +328,9 @@ template status riscv_target_adapter::add_break(break_type auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr}); auto eaddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr + length}); target_adapter_base::bp_lut.addEntry(++target_adapter_base::bp_count, saddr.val, eaddr.val - saddr.val); - LOG(TRACE) << "Adding breakpoint with handle " << target_adapter_base::bp_count << " for addr 0x" << std::hex << saddr.val + CPPLOG(TRACE) << "Adding breakpoint with handle " << target_adapter_base::bp_count << " for addr 0x" << std::hex << saddr.val << std::dec; - LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; + CPPLOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; return Ok; } } @@ -345,13 +345,13 @@ template status riscv_target_adapter::remove_break(break_t auto saddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr}); unsigned handle = target_adapter_base::bp_lut.getEntry(saddr.val); if(handle) { - LOG(TRACE) << "Removing breakpoint with handle " << handle << " for addr 0x" << std::hex << saddr.val << std::dec; + CPPLOG(TRACE) << "Removing breakpoint with handle " << handle << " for addr 0x" << std::hex << saddr.val << std::dec; // TODO: check length of addr range target_adapter_base::bp_lut.removeEntry(handle); - LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; + CPPLOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; return Ok; } - LOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; + CPPLOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; return Err; } } diff --git a/src/iss/plugin/cycle_estimate.cpp b/src/iss/plugin/cycle_estimate.cpp index 69e466a..463e2fa 100644 --- a/src/iss/plugin/cycle_estimate.cpp +++ b/src/iss/plugin/cycle_estimate.cpp @@ -61,7 +61,7 @@ bool iss::plugin::cycle_estimate::registration(const char* const version, vm_if& try { auto root = YAML::LoadAll(is); if(root.size() != 1) { - LOG(ERR) << "Too many root nodes in YAML file " << config_file_name; + CPPLOG(ERR) << "Too many root nodes in YAML file " << config_file_name; } for(auto p : root[0]) { auto isa_subset = p.first; @@ -87,11 +87,11 @@ bool iss::plugin::cycle_estimate::registration(const char* const version, vm_if& } } } catch(YAML::ParserException& e) { - LOG(ERR) << "Could not parse input file " << config_file_name << ", reason: " << e.what(); + CPPLOG(ERR) << "Could not parse input file " << config_file_name << ", reason: " << e.what(); return false; } } else { - LOG(ERR) << "Could not open input file " << config_file_name; + CPPLOG(ERR) << "Could not open input file " << config_file_name; return false; } } diff --git a/src/iss/plugin/instruction_count.cpp b/src/iss/plugin/instruction_count.cpp index bb47e53..000712f 100644 --- a/src/iss/plugin/instruction_count.cpp +++ b/src/iss/plugin/instruction_count.cpp @@ -47,7 +47,7 @@ iss::plugin::instruction_count::instruction_count(std::string config_file_name) try { auto root = YAML::LoadAll(is); if(root.size() != 1) { - LOG(ERR) << "Too many rro nodes in YAML file " << config_file_name; + CPPLOG(ERR) << "Too many rro nodes in YAML file " << config_file_name; } for(auto p : root[0]) { auto isa_subset = p.first; @@ -69,10 +69,10 @@ iss::plugin::instruction_count::instruction_count(std::string config_file_name) } rep_counts.resize(delays.size()); } catch(YAML::ParserException& e) { - LOG(ERR) << "Could not parse input file " << config_file_name << ", reason: " << e.what(); + CPPLOG(ERR) << "Could not parse input file " << config_file_name << ", reason: " << e.what(); } } else { - LOG(ERR) << "Could not open input file " << config_file_name; + CPPLOG(ERR) << "Could not open input file " << config_file_name; } } } @@ -81,7 +81,7 @@ iss::plugin::instruction_count::~instruction_count() { size_t idx = 0; for(auto it : delays) { if(rep_counts[idx] > 0 && it.instr_name.find("__" != 0)) - LOG(INFO) << it.instr_name << ";" << rep_counts[idx]; + CPPLOG(INFO) << it.instr_name << ";" << rep_counts[idx]; idx++; } } diff --git a/src/main.cpp b/src/main.cpp index aad92da..9a32241 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -137,11 +137,11 @@ int main(int argc, char* argv[]) { std::tie(cpu, vm) = f.create(isa_opt, clim["gdb-port"].as(), &semihosting_cb); } if(!cpu) { - LOG(ERR) << "Could not create cpu for isa " << isa_opt << " and backend " << clim["backend"].as() << std::endl; + CPPLOG(ERR) << "Could not create cpu for isa " << isa_opt << " and backend " << clim["backend"].as() << std::endl; return 127; } if(!vm) { - LOG(ERR) << "Could not create vm for isa " << isa_opt << " and backend " << clim["backend"].as() << std::endl; + CPPLOG(ERR) << "Could not create vm for isa " << isa_opt << " and backend " << clim["backend"].as() << std::endl; return 127; } if(clim.count("plugin")) { @@ -177,7 +177,7 @@ int main(int argc, char* argv[]) { } else #endif { - LOG(ERR) << "Unknown plugin name: " << plugin_name << ", valid names are 'ce', 'ic'" << std::endl; + CPPLOG(ERR) << "Unknown plugin name: " << plugin_name << ", valid names are 'ce', 'ic'" << std::endl; return 127; } } @@ -215,7 +215,7 @@ int main(int argc, char* argv[]) { auto cycles = clim["instructions"].as(); res = vm->start(cycles, dump); } catch(std::exception& e) { - LOG(ERR) << "Unhandled Exception reached the top of main: " << e.what() << ", application will now exit" << std::endl; + CPPLOG(ERR) << "Unhandled Exception reached the top of main: " << e.what() << ", application will now exit" << std::endl; res = 2; } // cleanup to let plugins report of needed From a1ebd83d2a1b401c03b62668f96719c660ba641d Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Tue, 19 Mar 2024 11:02:03 +0100 Subject: [PATCH 03/18] adds riscv_hart_common and signature output --- src/iss/arch/riscv_hart_common.h | 60 ++++++++++++++++++++++++++++++++ src/iss/arch/riscv_hart_m_p.h | 33 ++++++------------ src/iss/arch/riscv_hart_msu_vp.h | 4 ++- src/iss/arch/riscv_hart_mu_p.h | 4 ++- src/main.cpp | 39 +++++++++++++++++++-- 5 files changed, 113 insertions(+), 27 deletions(-) diff --git a/src/iss/arch/riscv_hart_common.h b/src/iss/arch/riscv_hart_common.h index 4ac086d..037b801 100644 --- a/src/iss/arch/riscv_hart_common.h +++ b/src/iss/arch/riscv_hart_common.h @@ -36,7 +36,12 @@ #define _RISCV_HART_COMMON #include "iss/arch_if.h" +#include "iss/log_categories.h" #include +#include +#include +#include +#include namespace iss { namespace arch { @@ -296,6 +301,61 @@ inline void write_reg_uint32(uint64_t offs, uint32_t& reg, const uint8_t* const break; } } +struct riscv_hart_common { + riscv_hart_common(){}; + ~riscv_hart_common(){}; + std::unordered_map symbol_table; + + std::unordered_map get_sym_table(std::string name) { + if(!symbol_table.empty()) + return symbol_table; + FILE* fp = fopen(name.c_str(), "r"); + if(fp) { + std::array buf; + auto n = fread(buf.data(), 1, 4, fp); + fclose(fp); + if(n != 4) + throw std::runtime_error("input file has insufficient size"); + buf[4] = 0; + if(strcmp(buf.data() + 1, "ELF") == 0) { + // Create elfio reader + ELFIO::elfio reader; + // Load ELF data + if(!reader.load(name)) + throw std::runtime_error("could not process elf file"); + // check elf properties + if(reader.get_type() != ET_EXEC) + throw std::runtime_error("wrong elf type in file"); + if(reader.get_machine() != EM_RISCV) + throw std::runtime_error("wrong elf machine in file"); + const auto sym_sec = reader.sections[".symtab"]; + if(SHT_SYMTAB == sym_sec->get_type() || SHT_DYNSYM == sym_sec->get_type()) { + ELFIO::symbol_section_accessor symbols(reader, sym_sec); + auto sym_no = symbols.get_symbols_num(); + std::string name; + ELFIO::Elf64_Addr value = 0; + ELFIO::Elf_Xword size = 0; + unsigned char bind = 0; + unsigned char type = 0; + ELFIO::Elf_Half section = 0; + unsigned char other = 0; + for(auto i = 0U; i < sym_no; ++i) { + symbols.get_symbol(i, name, value, size, bind, type, section, other); + if(name != "") { + this->symbol_table[name] = value; +#ifndef NDEBUG + LOG(DEBUG) << "Found Symbol " << name; +#endif + } + } + } + return symbol_table; + } + throw std::runtime_error(fmt::format("memory load file {} is not a valid elf file", name)); + } else + throw std::runtime_error(fmt::format("memory load file not found, check if {} is a valid file", name)); + }; +}; } // namespace arch } // namespace iss diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 99a7f06..0f480a3 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -40,6 +40,7 @@ #include "iss/log_categories.h" #include "iss/vm_if.h" #include "riscv_hart_common.h" +#include #ifndef FMT_HEADER_ONLY #define FMT_HEADER_ONLY #endif @@ -68,7 +69,7 @@ namespace iss { namespace arch { -template class riscv_hart_m_p : public BASE { +template class riscv_hart_m_p : public BASE, public riscv_hart_common { protected: const std::array lvl = {{'U', 'S', 'H', 'M'}}; const std::array trap_str = {{"" @@ -326,6 +327,8 @@ protected: unsigned get_reg_size(unsigned num) override { return traits::reg_bit_widths[num]; } + std::unordered_map get_symbol_table(std::string name) override { return arch.get_sym_table(name); } + riscv_hart_m_p& arch; }; @@ -570,6 +573,12 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) } template std::pair riscv_hart_m_p::load_file(std::string name, int type) { + get_sym_table(name); + try { + tohost = symbol_table.at("tohost"); + fromhost = symbol_table.at("fromhost"); + } catch(std::out_of_range& e) { + } FILE* fp = fopen(name.c_str(), "r"); if(fp) { std::array buf; @@ -604,27 +613,7 @@ template std::pair riscv_hart_m } } for(const auto sec : reader.sections) { - if(sec->get_name() == ".symtab") { - if(SHT_SYMTAB == sec->get_type() || SHT_DYNSYM == sec->get_type()) { - ELFIO::symbol_section_accessor symbols(reader, sec); - auto sym_no = symbols.get_symbols_num(); - std::string name; - ELFIO::Elf64_Addr value = 0; - ELFIO::Elf_Xword size = 0; - unsigned char bind = 0; - unsigned char type = 0; - ELFIO::Elf_Half section = 0; - unsigned char other = 0; - for(auto i = 0U; i < sym_no; ++i) { - symbols.get_symbol(i, name, value, size, bind, type, section, other); - if(name == "tohost") { - tohost = value; - } else if(name == "fromhost") { - fromhost = value; - } - } - } - } else if(sec->get_name() == ".tohost") { + if(sec->get_name() == ".tohost") { tohost = sec->get_address(); fromhost = tohost + 0x40; } diff --git a/src/iss/arch/riscv_hart_msu_vp.h b/src/iss/arch/riscv_hart_msu_vp.h index 4329160..58e5bb3 100644 --- a/src/iss/arch/riscv_hart_msu_vp.h +++ b/src/iss/arch/riscv_hart_msu_vp.h @@ -68,7 +68,7 @@ namespace iss { namespace arch { -template class riscv_hart_msu_vp : public BASE { +template class riscv_hart_msu_vp : public BASE, public riscv_hart_common { protected: const std::array lvl = {{'U', 'S', 'H', 'M'}}; const std::array trap_str = {{"" @@ -377,6 +377,8 @@ protected: unsigned get_reg_size(unsigned num) override { return traits::reg_bit_widths[num]; } + std::unordered_map get_symbol_table(std::string name) override { return arch.get_sym_table(name); } + riscv_hart_msu_vp& arch; }; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 362fece..6f4bbd4 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -68,7 +68,7 @@ namespace iss { namespace arch { -template class riscv_hart_mu_p : public BASE { +template class riscv_hart_mu_p : public BASE, public riscv_hart_common { protected: const std::array lvl = {{'U', 'S', 'H', 'M'}}; const std::array trap_str = {{"" @@ -353,6 +353,8 @@ protected: unsigned get_reg_size(unsigned num) override { return traits::reg_bit_widths[num]; } + std::unordered_map get_symbol_table(std::string name) override { return arch.get_sym_table(name); } + riscv_hart_mu_p& arch; }; diff --git a/src/main.cpp b/src/main.cpp index aad92da..c5d3d3b 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -35,6 +35,8 @@ #include #include #include +#include +#include #include #include "iss/arch/tgc_mapper.h" @@ -199,12 +201,12 @@ int main(int argc, char* argv[]) { if(clim.count("elf")) for(std::string input : clim["elf"].as>()) { auto start_addr = vm->get_arch()->load_file(input); - if(start_addr.second) + if(start_addr.second) // FIXME: this always evaluates to true as load file always returns start_address = start_addr.first; } for(std::string input : args) { auto start_addr = vm->get_arch()->load_file(input); // treat remaining arguments as elf files - if(start_addr.second) + if(start_addr.second) // FIXME: this always evaluates to true as load file always returns start_address = start_addr.first; } if(clim.count("reset")) { @@ -214,11 +216,42 @@ int main(int argc, char* argv[]) { vm->reset(start_address); auto cycles = clim["instructions"].as(); res = vm->start(cycles, dump); + + auto instr_if = vm->get_arch()->get_instrumentation_if(); + // this assumes a single input file + std::unordered_map sym_table; + if(args.empty()) + sym_table = instr_if->get_symbol_table(clim["elf"].as>()[0]); + else + sym_table = instr_if->get_symbol_table(args[0]); + if(sym_table.find("begin_signature") != std::end(sym_table) && sym_table.find("end_signature") != std::end(sym_table)) { + auto start_addr = sym_table["begin_signature"]; + auto end_addr = sym_table["end_signature"]; + std::array data; + std::ofstream file; + std::string filename = fmt::format("{}.signature", isa_opt); + std::replace(std::begin(filename), std::end(filename), '|', '_'); + // default riscof requires this filename + filename = "DUT-tgc.signature"; + file.open(filename, std::ios::out); + if(!file.is_open()) { + LOG(ERR) << "Error opening file " << filename << std::endl; + return 1; + } + for(auto addr = start_addr; addr < end_addr; addr += data.size()) { + vm->get_arch()->read(iss::address_type::PHYSICAL, iss::access_type::DEBUG_READ, 0 /*MEM*/, addr, data.size(), + data.data()); // FIXME: get space from iss::arch::traits::mem_type_e::MEM + + // TODO : obey Target endianess + uint32_t to_print = (data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0]; + file << std::hex << fmt::format("{:08x}", to_print) << std::dec << std::endl; + } + } } catch(std::exception& e) { LOG(ERR) << "Unhandled Exception reached the top of main: " << e.what() << ", application will now exit" << std::endl; res = 2; } - // cleanup to let plugins report of needed + // cleanup to let plugins report if needed for(auto* p : plugin_list) { delete p; } From b25b7848c614c505b77239b59ae5f75575cb642d Mon Sep 17 00:00:00 2001 From: stas Date: Tue, 19 Mar 2024 11:47:12 +0100 Subject: [PATCH 04/18] fix formatting --- src/iss/arch/riscv_hart_m_p.h | 12 ++++++------ src/iss/arch/riscv_hart_msu_vp.h | 12 ++++++------ src/iss/arch/riscv_hart_mu_p.h | 12 ++++++------ src/iss/debugger/riscv_target_adapter.h | 2 +- src/vm/asmjit/vm_tgc5c.cpp | 2 +- 5 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index db7e715..90a7d5f 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -730,19 +730,19 @@ iss::status riscv_hart_m_p::write(const address_type type, const acc switch(length) { case 8: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 4: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 2: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 1: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; default: CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; @@ -1118,10 +1118,10 @@ iss::status riscv_hart_m_p::write_mem(phys_addr_t paddr, unsigned le case 0: if(hostvar != 0x1) { CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } else { CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); this->interrupt_sim = hostvar; diff --git a/src/iss/arch/riscv_hart_msu_vp.h b/src/iss/arch/riscv_hart_msu_vp.h index d3339e3..1a350b8 100644 --- a/src/iss/arch/riscv_hart_msu_vp.h +++ b/src/iss/arch/riscv_hart_msu_vp.h @@ -729,19 +729,19 @@ iss::status riscv_hart_msu_vp::write(const address_type type, const access switch(length) { case 8: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 4: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 2: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 1: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; default: CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; @@ -1106,10 +1106,10 @@ template iss::status riscv_hart_msu_vp::write_mem(phys_add case 0: if(hostvar != 0x1) { CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } else { CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); this->interrupt_sim = hostvar; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 4597ce7..8f2a07f 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -916,19 +916,19 @@ iss::status riscv_hart_mu_p::write(const address_type type, const ac switch(length) { case 8: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint64_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 4: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint32_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 2: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << *(uint16_t*)&data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; case 1: CPPLOG(TRACE) << prefix << "write of " << length << " bytes (0x" << std::hex << (uint16_t)data[0] << std::dec << ") @addr 0x" - << std::hex << addr; + << std::hex << addr; break; default: CPPLOG(TRACE) << prefix << "write of " << length << " bytes @addr " << addr; @@ -1349,10 +1349,10 @@ iss::status riscv_hart_mu_p::write_mem(phys_addr_t paddr, unsigned l case 0: if(hostvar != 0x1) { CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } else { CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; + << "), stopping simulation"; } this->reg.trap_state = std::numeric_limits::max(); this->interrupt_sim = hostvar; diff --git a/src/iss/debugger/riscv_target_adapter.h b/src/iss/debugger/riscv_target_adapter.h index ac85a67..7e18339 100644 --- a/src/iss/debugger/riscv_target_adapter.h +++ b/src/iss/debugger/riscv_target_adapter.h @@ -329,7 +329,7 @@ template status riscv_target_adapter::add_break(break_type auto eaddr = map_addr({iss::access_type::FETCH, iss::address_type::PHYSICAL, 0, addr + length}); target_adapter_base::bp_lut.addEntry(++target_adapter_base::bp_count, saddr.val, eaddr.val - saddr.val); CPPLOG(TRACE) << "Adding breakpoint with handle " << target_adapter_base::bp_count << " for addr 0x" << std::hex << saddr.val - << std::dec; + << std::dec; CPPLOG(TRACE) << "Now having " << target_adapter_base::bp_lut.size() << " breakpoints"; return Ok; } diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 84b4a7e..6a6033c 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -4607,9 +4607,9 @@ std::unique_ptr create(arch::tgc5c *core, unsigned short por } // namespace asmjit } // namespace iss -#include #include #include +#include namespace iss { namespace { volatile std::array dummy = { From fbcd389580cb7257aeebc61e249a830fd0d3920a Mon Sep 17 00:00:00 2001 From: stas Date: Mon, 15 Apr 2024 13:03:47 +0200 Subject: [PATCH 05/18] fix log macro --- src/iss/arch/riscv_hart_common.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/iss/arch/riscv_hart_common.h b/src/iss/arch/riscv_hart_common.h index 037b801..829fbb1 100644 --- a/src/iss/arch/riscv_hart_common.h +++ b/src/iss/arch/riscv_hart_common.h @@ -35,13 +35,14 @@ #ifndef _RISCV_HART_COMMON #define _RISCV_HART_COMMON -#include "iss/arch_if.h" -#include "iss/log_categories.h" #include #include #include +#include +#include #include #include +#include namespace iss { namespace arch { @@ -344,7 +345,7 @@ struct riscv_hart_common { if(name != "") { this->symbol_table[name] = value; #ifndef NDEBUG - LOG(DEBUG) << "Found Symbol " << name; + CPPLOG(DEBUG) << "Found Symbol " << name; #endif } } From 6cb76fc256e6e3f54faf36b7f0c66c5259f6bc05 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Tue, 16 Apr 2024 13:09:14 +0200 Subject: [PATCH 06/18] updates tgc5c according to latest CoreDSL --- contrib/instr/TGC5C_instr.yaml | 2 +- src/vm/interp/vm_tgc5c.cpp | 114 ++++++++++++++++----------------- 2 files changed, 58 insertions(+), 58 deletions(-) diff --git a/contrib/instr/TGC5C_instr.yaml b/contrib/instr/TGC5C_instr.yaml index c1692e0..1663d37 100644 --- a/contrib/instr/TGC5C_instr.yaml +++ b/contrib/instr/TGC5C_instr.yaml @@ -349,7 +349,7 @@ Zifencei: size: 32 branch: false delay: 1 -RV32M: +RVM: MUL: index: 49 encoding: 0b00000010000000000000000000110011 diff --git a/src/vm/interp/vm_tgc5c.cpp b/src/vm/interp/vm_tgc5c.cpp index 10b6296..e98f30c 100644 --- a/src/vm/interp/vm_tgc5c.cpp +++ b/src/vm/interp/vm_tgc5c.cpp @@ -429,7 +429,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*PC + (int32_t)imm); + *(X+rd) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int32_t)imm )); } } } @@ -459,9 +459,9 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*PC + 4); + *(X+rd) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)( 4 )); } - *NEXT_PC = (uint32_t)(*PC + (int32_t)sext<21>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int32_t)sext<21>(imm) )); this->core.reg.last_branch = 1; } } @@ -489,13 +489,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { uint32_t addr_mask = (uint32_t)- 2; - uint32_t new_pc = (uint32_t)((*(X+rs1) + (int16_t)sext<12>(imm)) & addr_mask); + uint32_t new_pc = (uint32_t)(((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )) & (int64_t)(addr_mask )); if(new_pc % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*PC + 4); + *(X+rd) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)( 4 )); } *NEXT_PC = new_pc; this->core.reg.last_branch = 1; @@ -525,11 +525,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(*(X+rs1) == *(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -558,11 +558,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(*(X+rs1) != *(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -591,11 +591,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if((int32_t)*(X+rs1) < (int32_t)*(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -624,11 +624,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if((int32_t)*(X+rs1) >= (int32_t)*(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -657,11 +657,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(*(X+rs1) < *(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -690,11 +690,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(*(X+rs1) >= *(X+rs2)) { - if(imm % traits::INSTR_ALIGNMENT) { + if((uint32_t)(imm ) % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<13>(imm) )); this->core.reg.last_branch = 1; } } @@ -722,7 +722,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); int8_t res_27 = super::template read_mem(traits::MEM, load_address); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); int8_t res = (int8_t)res_27; @@ -753,7 +753,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); int16_t res_28 = super::template read_mem(traits::MEM, load_address); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); int16_t res = (int16_t)res_28; @@ -784,7 +784,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); int32_t res_29 = super::template read_mem(traits::MEM, load_address); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); int32_t res = (int32_t)res_29; @@ -815,7 +815,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); uint8_t res_30 = super::template read_mem(traits::MEM, load_address); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); uint8_t res = res_30; @@ -846,7 +846,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); uint16_t res_31 = super::template read_mem(traits::MEM, load_address); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); uint16_t res = res_31; @@ -877,7 +877,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t store_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); super::template write_mem(traits::MEM, store_address, (uint8_t)*(X+rs2)); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); } @@ -904,7 +904,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t store_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); super::template write_mem(traits::MEM, store_address, (uint16_t)*(X+rs2)); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); } @@ -931,7 +931,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + uint32_t store_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); super::template write_mem(traits::MEM, store_address, (uint32_t)*(X+rs2)); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); } @@ -959,7 +959,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm)); + *(X+rd) = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) )); } } } @@ -1202,7 +1202,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*(X+rs1) + *(X+rs2)); + *(X+rd) = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)(*(X+rs2) )); } } } @@ -1229,7 +1229,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*(X+rs1) - *(X+rs2)); + *(X+rd) = (uint32_t)((uint64_t)(*(X+rs1) ) - (uint64_t)(*(X+rs2) )); } } } @@ -1256,7 +1256,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = *(X+rs1) << (*(X+rs2) & (traits::XLEN - 1)); + *(X+rd) = *(X+rs1) << ((uint64_t)(*(X+rs2) ) & ((uint64_t)(traits::XLEN ) - (uint64_t)( 1 ))); } } } @@ -1364,7 +1364,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = *(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); + *(X+rd) = *(X+rs1) >> ((uint64_t)(*(X+rs2) ) & ((uint64_t)(traits::XLEN ) - (uint64_t)( 1 ))); } } } @@ -1391,7 +1391,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)((int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1))); + *(X+rd) = (uint32_t)((int32_t)*(X+rs1) >> ((uint64_t)(*(X+rs2) ) & ((uint64_t)(traits::XLEN ) - (uint64_t)( 1 )))); } } } @@ -1772,7 +1772,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - int64_t res = (int64_t)((int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2)); + int64_t res = (int64_t)((int32_t)*(X+rs1) ) * (int64_t)((int32_t)*(X+rs2) ); if(rd != 0) { *(X+rd) = (uint32_t)res; } @@ -1800,7 +1800,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - int64_t res = (int64_t)((int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2)); + int64_t res = (int64_t)((int32_t)*(X+rs1) ) * (int64_t)((int32_t)*(X+rs2) ); if(rd != 0) { *(X+rd) = (uint32_t)(res >> traits::XLEN); } @@ -1828,7 +1828,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - int64_t res = (int64_t)((int64_t)(int32_t)*(X+rs1) * (uint64_t)*(X+rs2)); + int64_t res = (int64_t)((int32_t)*(X+rs1) ) * (int64_t)(*(X+rs2) ); if(rd != 0) { *(X+rd) = (uint32_t)(res >> traits::XLEN); } @@ -1856,7 +1856,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint64_t res = (uint64_t)((uint64_t)*(X+rs1) * (uint64_t)*(X+rs2)); + uint64_t res = (uint64_t)(*(X+rs1) ) * (uint64_t)(*(X+rs2) ); if(rd != 0) { *(X+rd) = (uint32_t)(res >> traits::XLEN); } @@ -1888,7 +1888,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co int32_t divisor = (int32_t)*(X+rs2); if(rd != 0) { if(divisor != 0) { - uint32_t MMIN = ((uint32_t)1) << (traits::XLEN - 1); + uint32_t MMIN = ((uint32_t)1) << ((uint64_t)(traits::XLEN ) - (uint64_t)(1 )); if(*(X+rs1) == MMIN && divisor == - 1) { *(X+rd) = MMIN; } @@ -1926,7 +1926,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co else { if(*(X+rs2) != 0) { if(rd != 0) { - *(X+rd) = (uint32_t)(*(X+rs1) / *(X+rs2)); + *(X+rd) = *(X+rs1) / *(X+rs2); } } else { @@ -1959,7 +1959,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(*(X+rs2) != 0) { - uint32_t MMIN = (uint32_t)1 << (traits::XLEN - 1); + uint32_t MMIN = (uint32_t)1 << ((uint64_t)(traits::XLEN ) - (uint64_t)(1 )); if(*(X+rs1) == MMIN && (int32_t)*(X+rs2) == - 1) { if(rd != 0) { *(X+rd) = 0; @@ -1967,7 +1967,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)((int32_t)*(X+rs1) % (int32_t)*(X+rs2)); + *(X+rd) = ((uint32_t)((int32_t)*(X+rs1) % (int32_t)*(X+rs2))); } } } @@ -2030,7 +2030,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction { if(imm) { - *(X+rd + 8) = (uint32_t)(*(X+2) + imm); + *(X+rd + 8) = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(imm )); } else { raise(0, 2); @@ -2054,7 +2054,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - uint32_t offs = (uint32_t)(*(X+rs1 + 8) + uimm); + uint32_t offs = (uint32_t)((uint64_t)(*(X+rs1 + 8) ) + (uint64_t)(uimm )); int32_t res_38 = super::template read_mem(traits::MEM, offs); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); *(X+rd + 8) = (uint32_t)(int32_t)res_38; @@ -2077,7 +2077,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - uint32_t offs = (uint32_t)(*(X+rs1 + 8) + uimm); + uint32_t offs = (uint32_t)((uint64_t)(*(X+rs1 + 8) ) + (uint64_t)(uimm )); super::template write_mem(traits::MEM, offs, (uint32_t)*(X+rs2 + 8)); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); } @@ -2103,7 +2103,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rs1 != 0) { - *(X+rs1) = (uint32_t)(*(X+rs1) + (int8_t)sext<6>(imm)); + *(X+rs1) = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int8_t)sext<6>(imm) )); } } } @@ -2136,8 +2136,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - *(X+1) = (uint32_t)(*PC + 2); - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm)); + *(X+1) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)( 2 )); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<12>(imm) )); this->core.reg.last_branch = 1; } break; @@ -2207,7 +2207,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction { if(nzimm) { - *(X+2) = (uint32_t)(*(X+2) + (int16_t)sext<10>(nzimm)); + *(X+2) = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)((int16_t)sext<10>(nzimm) )); } else { raise(0, 2); @@ -2289,7 +2289,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - *(X+rs1 + 8) = (uint32_t)(*(X+rs1 + 8) & (int8_t)sext<6>(imm)); + *(X+rs1 + 8) = (uint32_t)(*(X+rs1 + 8) & (uint32_t)((int8_t)sext<6>(imm) )); } break; }// @suppress("No break at end of case") @@ -2308,7 +2308,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - *(X+rd + 8) = (uint32_t)(*(X+rd + 8) - *(X+rs2 + 8)); + *(X+rd + 8) = (uint32_t)((uint64_t)(*(X+rd + 8) ) - (uint64_t)(*(X+rs2 + 8) )); } break; }// @suppress("No break at end of case") @@ -2382,7 +2382,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<12>(imm) )); this->core.reg.last_branch = 1; } break; @@ -2403,7 +2403,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction { if(*(X+rs1 + 8) == 0) { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<9>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<9>(imm) )); this->core.reg.last_branch = 1; } } @@ -2425,7 +2425,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction { if(*(X+rs1 + 8) != 0) { - *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<9>(imm)); + *NEXT_PC = (uint32_t)((uint64_t)(*PC ) + (uint64_t)((int16_t)sext<9>(imm) )); this->core.reg.last_branch = 1; } } @@ -2476,7 +2476,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t offs = (uint32_t)(*(X+2) + uimm); + uint32_t offs = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(uimm )); int32_t res_39 = super::template read_mem(traits::MEM, offs); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); *(X+rd) = (uint32_t)(int32_t)res_39; @@ -2525,7 +2525,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction { if(rs1 && rs1 < traits::RFS) { - *NEXT_PC = *(X+rs1 % traits::RFS) & ~ 0x1; + *NEXT_PC = *(X+(uint32_t)(rs1 ) % traits::RFS) & (uint32_t)(~ 0x1 ); this->core.reg.last_branch = 1; } else { @@ -2567,7 +2567,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { if(rd != 0) { - *(X+rd) = (uint32_t)(*(X+rd) + *(X+rs2)); + *(X+rd) = (uint32_t)((uint64_t)(*(X+rd) ) + (uint64_t)(*(X+rs2) )); } } } @@ -2592,8 +2592,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } else { uint32_t new_pc = *(X+rs1); - *(X+1) = (uint32_t)(*PC + 2); - *NEXT_PC = new_pc & ~ 0x1; + *(X+1) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)( 2 )); + *NEXT_PC = new_pc & (uint32_t)(~ 0x1 ); this->core.reg.last_branch = 1; } } @@ -2631,7 +2631,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co raise(0, 2); } else { - uint32_t offs = (uint32_t)(*(X+2) + uimm); + uint32_t offs = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(uimm )); super::template write_mem(traits::MEM, offs, (uint32_t)*(X+rs2)); if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception(); } From 602bc6e06a244d68a581d67f96097a63d44e5d89 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Fri, 26 Apr 2024 17:06:26 +0200 Subject: [PATCH 07/18] checking: working --- src/vm/asmjit/vm_tgc5c.cpp | 283 +++++++++++++++++++++++++------------ 1 file changed, 191 insertions(+), 92 deletions(-) diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 6a6033c..1669219 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -79,21 +79,36 @@ public: } protected: - using vm_base::get_reg_ptr; + using super::get_ptr_for; + using super::get_reg; + using super::get_reg_for; + using super::load_reg_from_mem; + using super::write_reg_to_mem; + using super::gen_ext; + using super::gen_read_mem; + using super::gen_write_mem; + using super::gen_wait; + using super::gen_leave; + using super::gen_operation; + using this_class = vm_impl; using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); continuation_e gen_single_inst_behavior(virt_addr_t&, unsigned int &, jit_holder&) override; + void gen_block_prologue(jit_holder& jh) override; + void gen_block_epilogue(jit_holder& jh) override; inline const char *name(size_t index){return traits::reg_aliases.at(index);} + void gen_instr_prologue(jit_holder& jh, addr_t pc); + void gen_instr_epilogue(jit_holder& jh); + inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause); + template::type> inline S sext(U from) { auto mask = (1ULL< - private: /**************************************************************************** * start opcode definitions @@ -326,7 +341,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int32_t)imm)); } } @@ -370,7 +385,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)(PC+(int32_t)imm)); } } @@ -418,12 +433,12 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)(PC+ 4)); } auto PC_val_v = (uint32_t)(PC+(int32_t)sext<21>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } auto returnValue = BRANCH; @@ -486,12 +501,12 @@ private: cc.bind(label_else); { if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)(PC+ 4)); } auto PC_val_v = new_pc; cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } cc.bind(label_merge); } @@ -547,7 +562,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -604,7 +619,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -663,7 +678,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -722,7 +737,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -779,7 +794,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -836,7 +851,7 @@ private: else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } } cc.bind(label_merge); @@ -888,7 +903,7 @@ private: auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 1), 8, false); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); } @@ -940,7 +955,7 @@ private: auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 2), 16, false); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); } @@ -992,7 +1007,7 @@ private: auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 4), 32, false); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); } @@ -1043,7 +1058,7 @@ private: ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 1); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, false)); } @@ -1094,7 +1109,7 @@ private: ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 2); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, false)); } @@ -1281,7 +1296,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) @@ -1341,7 +1356,7 @@ private: cc.bind(label_then); cc.mov(tmp_reg, 1); cc.bind(label_merge); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg , 32, false) ); @@ -1400,7 +1415,7 @@ private: cc.bind(label_then); cc.mov(tmp_reg, 1); cc.bind(label_merge); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg , 32, false) ); @@ -1448,7 +1463,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1495,7 +1510,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1542,7 +1557,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1589,7 +1604,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, shamt, 32, false)) ); @@ -1636,7 +1651,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, shamt, 32, false)) ); @@ -1683,7 +1698,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sar, gen_ext(jh, @@ -1732,7 +1747,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) @@ -1780,7 +1795,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sub, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) @@ -1828,7 +1843,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, gen_operation(jh, shl, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), (gen_operation(jh, band, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false), (static_cast(traits::XLEN)- 1)) @@ -1890,7 +1905,7 @@ private: cc.bind(label_then); cc.mov(tmp_reg, 1); cc.bind(label_merge); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg , 32, false) ); @@ -1949,7 +1964,7 @@ private: cc.bind(label_then); cc.mov(tmp_reg, 1); cc.bind(label_merge); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg , 32, false) ); @@ -1997,7 +2012,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2044,7 +2059,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, gen_operation(jh, shr, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), (gen_operation(jh, band, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false), (static_cast(traits::XLEN)- 1)) @@ -2093,7 +2108,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_ext(jh, gen_operation(jh, sar, gen_ext(jh, gen_ext(jh, @@ -2144,7 +2159,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2191,7 +2206,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2412,7 +2427,7 @@ private: if(rd!= 0){ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); gen_write_mem(jh, traits::CSR, csr, xrs1, 4); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } else{ @@ -2467,7 +2482,7 @@ private: , 4); } if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } } @@ -2519,7 +2534,7 @@ private: , 4); } if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } } @@ -2566,7 +2581,7 @@ private: auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); gen_write_mem(jh, traits::CSR, csr, (uint32_t)zimm, 4); if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } } @@ -2617,7 +2632,7 @@ private: , 4); } if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } } @@ -2668,7 +2683,7 @@ private: , 4); } if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } } @@ -2758,7 +2773,7 @@ private: load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true), 128, true)) ), 64, true); if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); } @@ -2812,7 +2827,7 @@ private: load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true), 128, true)) ), 64, true); if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sar, res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) @@ -2867,7 +2882,7 @@ private: load_reg_from_mem(jh, traits::X0 + rs2), 64, false), 128, false)) ), 64, true); if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sar, res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) @@ -2921,7 +2936,7 @@ private: load_reg_from_mem(jh, traits::X0 + rs2), 64, false), 128, false)) ), 64, false); if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, shr, res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) @@ -2992,13 +3007,13 @@ private: auto label_else = cc.newLabel(); cc.je(label_else); { - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), MMIN); } cc.jmp(label_merge); cc.bind(label_else); { - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, idiv, gen_ext(jh, dividend, 64, true), gen_ext(jh, divisor, 64, true)) @@ -3009,7 +3024,7 @@ private: cc.jmp(label_merge); cc.bind(label_else); { - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)- 1); } cc.bind(label_merge); @@ -3063,7 +3078,7 @@ private: cc.je(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, div, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) @@ -3074,7 +3089,7 @@ private: cc.bind(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)- 1); } } @@ -3141,7 +3156,7 @@ private: cc.je(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, 0, 32, false) ); } @@ -3150,7 +3165,7 @@ private: cc.bind(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, srem, gen_ext(jh, @@ -3165,7 +3180,7 @@ private: cc.bind(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), load_reg_from_mem(jh, traits::X0 + rs1)); } } @@ -3219,7 +3234,7 @@ private: cc.je(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, urem, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -3229,7 +3244,7 @@ private: cc.bind(label_else); { if(rd!=0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), load_reg_from_mem(jh, traits::X0 + rs1)); } } @@ -3271,7 +3286,7 @@ private: cc.comment("\n//behavior:"); /*generate behavior*/ if(imm){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, imm, 64, false)) @@ -3320,7 +3335,7 @@ private: (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 64, false), gen_ext(jh, uimm, 64, false)) ), 32, false); - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, gen_ext(jh, gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true)); @@ -3406,7 +3421,7 @@ private: } else{ if(rs1!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1), + cc.mov(get_ptr_for(jh, traits::X0+ rs1), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int8_t)sext<6>(imm), 64, true)) @@ -3480,11 +3495,11 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ 1), + cc.mov(get_ptr_for(jh, traits::X0+ 1), (uint32_t)(PC+ 2)); auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); auto returnValue = BRANCH; gen_instr_epilogue(jh); @@ -3525,7 +3540,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int8_t)sext<6>(imm))); } } @@ -3568,7 +3583,7 @@ private: gen_raise(jh, 0, 2); } if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int32_t)sext<18>(imm))); } auto returnValue = CONT; @@ -3606,7 +3621,7 @@ private: cc.comment("\n//behavior:"); /*generate behavior*/ if(nzimm){ - cc.mov(get_reg_ptr(jh, traits::X0+ 2), + cc.mov(get_ptr_for(jh, traits::X0+ 2), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, (int16_t)sext<10>(nzimm), 64, true)) @@ -3684,7 +3699,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, shamt, 32, false)) ); @@ -3724,7 +3739,7 @@ private: cc.comment("\n//behavior:"); /*generate behavior*/ if(shamt){ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, (gen_operation(jh, sar, (gen_ext(jh, @@ -3733,7 +3748,7 @@ private: } else{ if(static_cast(traits::XLEN)== 128){ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, (gen_operation(jh, sar, (gen_ext(jh, @@ -3776,7 +3791,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, (int8_t)sext<6>(imm), 32, true)) @@ -3816,7 +3831,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, (gen_operation(jh, sub, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rd+ 8), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2+ 8), 64, false)) @@ -3856,7 +3871,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); @@ -3895,7 +3910,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); @@ -3934,7 +3949,7 @@ private: gen_instr_prologue(jh, pc.val); cc.comment("\n//behavior:"); /*generate behavior*/ - cc.mov(get_reg_ptr(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); @@ -3974,7 +3989,7 @@ private: /*generate behavior*/ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); auto returnValue = BRANCH; gen_instr_epilogue(jh); @@ -4018,7 +4033,7 @@ private: { auto PC_val_v = (uint32_t)(PC+(int16_t)sext<9>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } cc.bind(label_merge); auto returnValue = BRANCH; @@ -4064,7 +4079,7 @@ private: { auto PC_val_v = (uint32_t)(PC+(int16_t)sext<9>(imm)); cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } cc.bind(label_merge); auto returnValue = BRANCH; @@ -4107,7 +4122,7 @@ private: } else{ if(rs1!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rs1), + cc.mov(get_ptr_for(jh, traits::X0+ rs1), gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, nzuimm, 32, false)) ); @@ -4156,7 +4171,7 @@ private: (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, uimm, 64, false)) ), 32, false); - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, gen_ext(jh, gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true)); @@ -4201,7 +4216,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), load_reg_from_mem(jh, traits::X0 + rs2)); } } @@ -4244,7 +4259,7 @@ private: load_reg_from_mem(jh, traits::X0 + rs1%static_cast(traits::RFS)), gen_ext(jh, ~ 0x1, 32, false)) ; cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } else{ gen_raise(jh, 0, 2); @@ -4322,7 +4337,7 @@ private: } else{ if(rd!= 0){ - cc.mov(get_reg_ptr(jh, traits::X0+ rd), + cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rd), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) @@ -4368,13 +4383,13 @@ private: } else{ auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1); - cc.mov(get_reg_ptr(jh, traits::X0+ 1), + cc.mov(get_ptr_for(jh, traits::X0+ 1), (uint32_t)(PC+ 2)); auto PC_val_v = gen_operation(jh, band, new_pc, gen_ext(jh, ~ 0x1, 32, false)) ; cc.mov(jh.next_pc, PC_val_v); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), 32U); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); } auto returnValue = BRANCH; @@ -4556,11 +4571,6 @@ private: } }; -template void debug_fn(CODE_WORD instr) { - volatile CODE_WORD x = instr; - instr = 2 * x; -} - template vm_impl::vm_impl() { this(new ARCH()); } template @@ -4574,8 +4584,7 @@ vm_impl::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) } template -continuation_e -vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { +continuation_e vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { enum {TRAP_ID=1<<16}; code_word_t instr = 0; phys_addr_t paddr(pc); @@ -4593,6 +4602,96 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, f = &this_class::illegal_intruction; return (this->*f)(pc, instr, jh); } +template +void vm_impl::gen_instr_prologue(jit_holder& jh, addr_t pc) { + auto& cc = jh.cc; + cc.mov(jh.pc, pc); + + cc.comment("\n//(*icount)++;"); + cc.inc(get_ptr_for(jh, traits::ICOUNT)); + + cc.comment("\n//*pc=*next_pc;"); + cc.mov(get_ptr_for(jh, traits::PC), jh.next_pc); + + cc.comment("\n//*trap_state=*pending_trap;"); + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state); + + cc.comment("\n//increment *next_pc"); + cc.mov(jh.next_pc, pc); +} +template +void vm_impl::gen_instr_epilogue(jit_holder& jh) { + auto& cc = jh.cc; + + cc.comment("\n//if(*trap_state!=0) goto trap_entry;"); + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + cc.cmp(current_trap_state, 0); + cc.jne(jh.trap_entry); + + // TODO: Does not need to be done for every instruction, only when needed (by plugin) + cc.comment("\n//write back regs to mem"); + write_reg_to_mem(jh, jh.pc, traits::PC); + write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); +} +template +void vm_impl::gen_block_prologue(jit_holder& jh){ + + jh.pc = load_reg_from_mem(jh, traits::PC); + jh.next_pc = load_reg_from_mem(jh, traits::NEXT_PC); +} +template +void vm_impl::gen_block_epilogue(jit_holder& jh){ + x86::Compiler& cc = jh.cc; + cc.comment("\n//return *next_pc;"); + cc.ret(jh.next_pc); + + cc.bind(jh.trap_entry); + cc.comment("\n//Prepare for enter_trap;"); + // Make sure cached values are written back + cc.comment("\n//write back regs to mem"); + write_reg_to_mem(jh, jh.pc, traits::PC); + write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); + this->gen_sync(jh, POST_SYNC, -1); + + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + + x86::Gp current_pc = get_reg_for(jh, traits::PC); + cc.mov(current_pc, get_ptr_for(jh, traits::PC)); + + x86::Gp instr = cc.newInt32("instr"); + cc.mov(instr, 0); // this is not correct + cc.comment("\n//enter trap call;"); + InvokeNode* call_enter_trap; + cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); + call_enter_trap->setArg(0, jh.arch_if_ptr); + call_enter_trap->setArg(1, current_trap_state); + call_enter_trap->setArg(2, current_pc); + call_enter_trap->setArg(3, instr); + + x86::Gp current_next_pc = get_reg_for(jh, traits::NEXT_PC); + cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC)); + cc.mov(jh.next_pc, current_next_pc); + + cc.comment("\n//*last_branch = std::numeric_limits::max();"); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits::max()); + cc.comment("\n//return *next_pc;"); + cc.ret(jh.next_pc); +} +template +inline void vm_impl:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { + auto& cc = jh.cc; + cc.comment("//gen_raise"); + auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(tmp1, 0x80ULL << 24 | (cause << 16) | trap_id); + cc.mov(get_ptr_for(jh, traits::TRAP_STATE), tmp1); + auto tmp2 = get_reg_for(jh, traits::NEXT_PC); + cc.mov(tmp2, std::numeric_limits::max()); + cc.mov(get_ptr_for(jh, traits::NEXT_PC), tmp2); +} From ad79a287054726c26769d7c3456a39e646f621a1 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Tue, 30 Apr 2024 19:21:27 +0200 Subject: [PATCH 08/18] wip checkin --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 125 +- src/main.cpp | 2 +- src/vm/asmjit/helper_func.h | 539 -------- src/vm/asmjit/vm_tgc5c.cpp | 1373 ++++++++++--------- 4 files changed, 837 insertions(+), 1202 deletions(-) delete mode 100644 src/vm/asmjit/helper_func.h diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index 00e86e9..cb0a2b5 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -79,21 +79,36 @@ public: } protected: - using vm_base::get_reg_ptr; + using super::get_ptr_for; +using super::get_reg; + using super::get_reg_for; + using super::load_reg_from_mem; + using super::write_reg_to_mem; + using super::gen_ext; + using super::gen_read_mem; + using super::gen_write_mem; + using super::gen_wait; + using super::gen_leave; + using super::gen_operation; + using this_class = vm_impl; using compile_func = continuation_e (this_class::*)(virt_addr_t&, code_word_t, jit_holder&); continuation_e gen_single_inst_behavior(virt_addr_t&, unsigned int &, jit_holder&) override; + void gen_block_prologue(jit_holder& jh) override; + void gen_block_epilogue(jit_holder& jh) override; inline const char *name(size_t index){return traits::reg_aliases.at(index);} + void gen_instr_prologue(jit_holder& jh); + void gen_instr_epilogue(jit_holder& jh); + inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause); + template::type> inline S sext(U from) { auto mask = (1ULL< - private: /**************************************************************************** * start opcode definitions @@ -139,12 +154,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\\n${instr.name}_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("${instr.name}_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, ${idx}); - pc=pc+ ${instr.length/8}; - - gen_instr_prologue(jh, pc.val); - cc.comment("\\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+${instr.length/8}; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ <%instr.behavior.eachLine{%>${it} <%}%> @@ -214,11 +231,6 @@ private: } }; -template void debug_fn(CODE_WORD instr) { - volatile CODE_WORD x = instr; - instr = 2 * x; -} - template vm_impl::vm_impl() { this(new ARCH()); } template @@ -232,8 +244,7 @@ vm_impl::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id) } template -continuation_e -vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { +continuation_e vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, jit_holder& jh) { enum {TRAP_ID=1<<16}; code_word_t instr = 0; phys_addr_t paddr(pc); @@ -251,10 +262,90 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, f = &this_class::illegal_intruction; return (this->*f)(pc, instr, jh); } +template +void vm_impl::gen_instr_prologue(jit_holder& jh) { + auto& cc = jh.cc; + cc.comment("//(*icount)++;"); + cc.inc(get_ptr_for(jh, traits::ICOUNT)); + cc.comment("//*trap_state=*pending_trap;"); + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state); -} // namespace ${coreDef.name.toLowerCase()} +} +template +void vm_impl::gen_instr_epilogue(jit_holder& jh) { + auto& cc = jh.cc; + + cc.comment("//if(*trap_state!=0) goto trap_entry;"); + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + cc.cmp(current_trap_state, 0); + cc.jne(jh.trap_entry); + + // TODO: Does not need to be done for every instruction, only when needed (by plugin) + cc.comment("//write back regs to mem"); + write_reg_to_mem(jh, jh.pc, traits::PC); + write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); +} +template +void vm_impl::gen_block_prologue(jit_holder& jh){ + + jh.pc = load_reg_from_mem(jh, traits::PC); + jh.next_pc = load_reg_from_mem(jh, traits::NEXT_PC); +} +template +void vm_impl::gen_block_epilogue(jit_holder& jh){ + x86::Compiler& cc = jh.cc; + cc.comment("//return *next_pc;"); + cc.ret(jh.next_pc); + + cc.bind(jh.trap_entry); + cc.comment("//Prepare for enter_trap;"); + // Make sure cached values are written back + cc.comment("//write back regs to mem"); + write_reg_to_mem(jh, jh.pc, traits::PC); + write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); + this->gen_sync(jh, POST_SYNC, -1); + + x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); + + x86::Gp current_pc = get_reg_for(jh, traits::PC); + cc.mov(current_pc, get_ptr_for(jh, traits::PC)); + + x86::Gp instr = cc.newInt32("instr"); + cc.mov(instr, 0); // this is not correct + cc.comment("//enter trap call;"); + InvokeNode* call_enter_trap; + cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); + call_enter_trap->setArg(0, jh.arch_if_ptr); + call_enter_trap->setArg(1, current_trap_state); + call_enter_trap->setArg(2, current_pc); + call_enter_trap->setArg(3, instr); + + x86::Gp current_next_pc = get_reg_for(jh, traits::NEXT_PC); + cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC)); + cc.mov(jh.next_pc, current_next_pc); + + cc.comment("//*last_branch = std::numeric_limits::max();"); + cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits::max()); + cc.comment("//return *next_pc;"); + cc.ret(jh.next_pc); +} +template +inline void vm_impl:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { + auto& cc = jh.cc; + cc.comment("//gen_raise"); + auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); + cc.mov(tmp1, 0x80ULL << 24 | (cause << 16) | trap_id); + cc.mov(get_ptr_for(jh, traits::TRAP_STATE), tmp1); + cc.mov(jh.next_pc, std::numeric_limits::max()); +} + +} // namespace tgc5c template <> std::unique_ptr create(arch::${coreDef.name.toLowerCase()} *core, unsigned short port, bool dump) { @@ -265,9 +356,9 @@ std::unique_ptr create(arch::${coreD } // namespace asmjit } // namespace iss -#include #include #include +#include namespace iss { namespace { volatile std::array dummy = { diff --git a/src/main.cpp b/src/main.cpp index 839bbbc..e4ad4c3 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -75,7 +75,7 @@ int main(int argc, char* argv[]) { ("elf,f", po::value>(), "ELF file(s) to load") ("mem,m", po::value(), "the memory input file") ("plugin,p", po::value>(), "plugin to activate") - ("backend", po::value()->default_value("interp"), "the ISS backend to use, options are: interp, tcc") + ("backend", po::value()->default_value("interp"), "the ISS backend to use, options are: interp, llvm, tcc, asmjit") ("isa", po::value()->default_value("tgc5c"), "core or isa name to use for simulation, use '?' to get list"); // clang-format on auto parsed = po::command_line_parser(argc, argv).options(desc).allow_unregistered().run(); diff --git a/src/vm/asmjit/helper_func.h b/src/vm/asmjit/helper_func.h deleted file mode 100644 index 88aceba..0000000 --- a/src/vm/asmjit/helper_func.h +++ /dev/null @@ -1,539 +0,0 @@ -#include -#include - -x86::Mem get_reg_ptr(jit_holder& jh, unsigned idx) { - - x86::Gp tmp_ptr = jh.cc.newUIntPtr("tmp_ptr"); - jh.cc.mov(tmp_ptr, jh.regs_base_ptr); - jh.cc.add(tmp_ptr, traits::reg_byte_offsets[idx]); - switch(traits::reg_bit_widths[idx]) { - case 8: - return x86::ptr_8(tmp_ptr); - case 16: - return x86::ptr_16(tmp_ptr); - case 32: - return x86::ptr_32(tmp_ptr); - case 64: - return x86::ptr_64(tmp_ptr); - default: - throw std::runtime_error("Invalid reg size in get_reg_ptr"); - } -} -x86::Gp get_reg_for(jit_holder& jh, unsigned idx) { - // TODO can check for regs in jh and return them instead of creating new ones - switch(traits::reg_bit_widths[idx]) { - case 8: - return jh.cc.newInt8(); - case 16: - return jh.cc.newInt16(); - case 32: - return jh.cc.newInt32(); - case 64: - return jh.cc.newInt64(); - default: - throw std::runtime_error("Invalid reg size in get_reg_ptr"); - } -} -x86::Gp get_reg_for(jit_holder& jh, unsigned size, bool is_signed) { - if(is_signed) - switch(size) { - case 8: - return jh.cc.newInt8(); - case 16: - return jh.cc.newInt16(); - case 32: - return jh.cc.newInt32(); - case 64: - return jh.cc.newInt64(); - default: - throw std::runtime_error("Invalid reg size in get_reg_ptr"); - } - else - switch(size) { - case 8: - return jh.cc.newUInt8(); - case 16: - return jh.cc.newUInt16(); - case 32: - return jh.cc.newUInt32(); - case 64: - return jh.cc.newUInt64(); - default: - throw std::runtime_error("Invalid reg size in get_reg_ptr"); - } -} -inline x86::Gp load_reg_from_mem(jit_holder& jh, unsigned idx) { - auto ptr = get_reg_ptr(jh, idx); - auto reg = get_reg_for(jh, idx); - jh.cc.mov(reg, ptr); - return reg; -} -inline void write_reg_to_mem(jit_holder& jh, x86::Gp reg, unsigned idx) { - auto ptr = get_reg_ptr(jh, idx); - jh.cc.mov(ptr, reg); -} - -void gen_instr_prologue(jit_holder& jh, addr_t pc) { - auto& cc = jh.cc; - cc.mov(jh.pc, pc); - - cc.comment("\n//(*icount)++;"); - cc.inc(get_reg_ptr(jh, traits::ICOUNT)); - - cc.comment("\n//*pc=*next_pc;"); - cc.mov(get_reg_ptr(jh, traits::PC), jh.next_pc); - - cc.comment("\n//*trap_state=*pending_trap;"); - x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); - cc.mov(current_trap_state, get_reg_ptr(jh, traits::TRAP_STATE)); - cc.mov(get_reg_ptr(jh, traits::PENDING_TRAP), current_trap_state); - - cc.comment("\n//increment *next_pc"); - cc.mov(jh.next_pc, pc); -} -void gen_instr_epilogue(jit_holder& jh) { - auto& cc = jh.cc; - - cc.comment("\n//if(*trap_state!=0) goto trap_entry;"); - x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); - cc.mov(current_trap_state, get_reg_ptr(jh, traits::TRAP_STATE)); - cc.cmp(current_trap_state, 0); - cc.jne(jh.trap_entry); - - // TODO: Does not need to be done for every instruction, only when needed - cc.comment("\n//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); -} -void gen_block_prologue(jit_holder& jh) override { - - jh.pc = load_reg_from_mem(jh, traits::PC); - jh.next_pc = load_reg_from_mem(jh, traits::NEXT_PC); -} -void gen_block_epilogue(jit_holder& jh) override { - x86::Compiler& cc = jh.cc; - cc.comment("\n//return *next_pc;"); - cc.ret(jh.next_pc); - - cc.bind(jh.trap_entry); - cc.comment("\n//Prepare for enter_trap;"); - // Make sure cached values are written back - cc.comment("\n//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); - this->gen_sync(jh, POST_SYNC, -1); - - x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); - cc.mov(current_trap_state, get_reg_ptr(jh, traits::TRAP_STATE)); - - x86::Gp current_pc = get_reg_for(jh, traits::PC); - cc.mov(current_pc, get_reg_ptr(jh, traits::PC)); - - x86::Gp instr = cc.newInt32("instr"); - cc.mov(instr, 0); // this is not correct - cc.comment("\n//enter trap call;"); - InvokeNode* call_enter_trap; - cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); - call_enter_trap->setArg(0, jh.arch_if_ptr); - call_enter_trap->setArg(1, current_trap_state); - call_enter_trap->setArg(2, current_pc); - call_enter_trap->setArg(3, instr); - - x86::Gp current_next_pc = get_reg_for(jh, traits::NEXT_PC); - cc.mov(current_next_pc, get_reg_ptr(jh, traits::NEXT_PC)); - cc.mov(jh.next_pc, current_next_pc); - - cc.comment("\n//*last_branch = std::numeric_limits::max();"); - cc.mov(get_reg_ptr(jh, traits::LAST_BRANCH), std::numeric_limits::max()); - cc.comment("\n//return *next_pc;"); - cc.ret(jh.next_pc); -} -/* - inline void raise(uint16_t trap_id, uint16_t cause){ - auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id; - this->core.reg.trap_state = trap_val; - this->template get_reg(traits::NEXT_PC) = std::numeric_limits::max(); - } -*/ -inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { - auto& cc = jh.cc; - cc.comment("//gen_raise"); - auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); - cc.mov(tmp1, 0x80ULL << 24 | (cause << 16) | trap_id); - cc.mov(get_reg_ptr(jh, traits::TRAP_STATE), tmp1); - auto tmp2 = get_reg_for(jh, traits::NEXT_PC); - cc.mov(tmp2, std::numeric_limits::max()); - cc.mov(get_reg_ptr(jh, traits::NEXT_PC), tmp2); -} -inline void gen_wait(jit_holder& jh, unsigned type) { jh.cc.comment("//gen_wait"); } -inline void gen_leave(jit_holder& jh, unsigned lvl) { jh.cc.comment("//gen_leave"); } - -enum operation { add, sub, band, bor, bxor, shl, sar, shr }; - -template ::value || std::is_same::value>> -x86::Gp gen_operation(jit_holder& jh, operation op, x86::Gp a, T b) { - x86::Compiler& cc = jh.cc; - switch(op) { - case add: { - cc.add(a, b); - break; - } - case sub: { - cc.sub(a, b); - break; - } - case band: { - cc.and_(a, b); - break; - } - case bor: { - cc.or_(a, b); - break; - } - case bxor: { - cc.xor_(a, b); - break; - } - case shl: { - cc.shl(a, b); - break; - } - case sar: { - cc.sar(a, b); - break; - } - case shr: { - cc.shr(a, b); - break; - } - default: - throw std::runtime_error(fmt::format("Current operation {} not supported in gen_operation (operation)", op)); - } - return a; -} - -enum three_operand_operation { imul, mul, idiv, div, srem, urem }; - -x86::Gp gen_operation(jit_holder& jh, three_operand_operation op, x86::Gp a, x86::Gp b) { - x86::Compiler& cc = jh.cc; - switch(op) { - case imul: { - x86::Gp dummy = cc.newInt64(); - cc.imul(dummy, a.r64(), b.r64()); - return a; - } - case mul: { - x86::Gp dummy = cc.newInt64(); - cc.mul(dummy, a.r64(), b.r64()); - return a; - } - case idiv: { - x86::Gp dummy = cc.newInt64(); - cc.mov(dummy, 0); - cc.idiv(dummy, a.r64(), b.r64()); - return a; - } - case div: { - x86::Gp dummy = cc.newInt64(); - cc.mov(dummy, 0); - cc.div(dummy, a.r64(), b.r64()); - return a; - } - case srem: { - x86::Gp rem = cc.newInt32(); - cc.mov(rem, 0); - auto a_reg = cc.newInt32(); - cc.mov(a_reg, a.r32()); - cc.idiv(rem, a_reg, b.r32()); - return rem; - } - case urem: { - x86::Gp rem = cc.newInt32(); - cc.mov(rem, 0); - auto a_reg = cc.newInt32(); - cc.mov(a_reg, a.r32()); - cc.div(rem, a_reg, b.r32()); - return rem; - } - - default: - throw std::runtime_error(fmt::format("Current operation {} not supported in gen_operation (three_operand)", op)); - } - return a; -} -template ::value>> -x86::Gp gen_operation(jit_holder& jh, three_operand_operation op, x86::Gp a, T b) { - x86::Gp b_reg = jh.cc.newInt32(); - /* switch(a.size()){ - case 1: b_reg = jh.cc.newInt8(); break; - case 2: b_reg = jh.cc.newInt16(); break; - case 4: b_reg = jh.cc.newInt32(); break; - case 8: b_reg = jh.cc.newInt64(); break; - default: throw std::runtime_error(fmt::format("Invalid size ({}) in gen operation", a.size())); - } */ - jh.cc.mov(b_reg, b); - return gen_operation(jh, op, a, b_reg); -} -enum comparison_operation { land, lor, eq, ne, lt, ltu, gt, gtu, lte, lteu, gte, gteu }; - -template ::value || std::is_same::value>> -x86::Gp gen_operation(jit_holder& jh, comparison_operation op, x86::Gp a, T b) { - x86::Compiler& cc = jh.cc; - x86::Gp tmp = cc.newInt8(); - cc.mov(tmp, 1); - Label label_then = cc.newLabel(); - cc.cmp(a, b); - switch(op) { - case eq: - cc.je(label_then); - break; - case ne: - cc.jne(label_then); - break; - case lt: - cc.jl(label_then); - break; - case ltu: - cc.jb(label_then); - break; - case gt: - cc.jg(label_then); - break; - case gtu: - cc.ja(label_then); - break; - case lte: - cc.jle(label_then); - break; - case lteu: - cc.jbe(label_then); - break; - case gte: - cc.jge(label_then); - break; - case gteu: - cc.jae(label_then); - break; - case land: { - Label label_false = cc.newLabel(); - cc.cmp(a, 0); - cc.je(label_false); - auto b_reg = cc.newInt8(); - cc.mov(b_reg, b); - cc.cmp(b_reg, 0); - cc.je(label_false); - cc.jmp(label_then); - cc.bind(label_false); - break; - } - case lor: { - cc.cmp(a, 0); - cc.jne(label_then); - auto b_reg = cc.newInt8(); - cc.mov(b_reg, b); - cc.cmp(b_reg, 0); - cc.jne(label_then); - break; - } - default: - throw std::runtime_error(fmt::format("Current operation {} not supported in gen_operation (comparison)", op)); - } - cc.mov(tmp, 0); - cc.bind(label_then); - return tmp; -} -enum binary_operation { lnot, inc, dec, bnot, neg }; - -x86::Gp gen_operation(jit_holder& jh, binary_operation op, x86::Gp a) { - x86::Compiler& cc = jh.cc; - switch(op) { - case lnot: - throw std::runtime_error("Current operation not supported in gen_operation(lnot)"); - case inc: { - cc.inc(a); - break; - } - case dec: { - cc.dec(a); - break; - } - case bnot: { - cc.not_(a); - break; - } - case neg: { - cc.neg(a); - break; - } - default: - throw std::runtime_error(fmt::format("Current operation {} not supported in gen_operation (unary)", op)); - } - return a; -} - -template ::value>> -inline x86::Gp gen_ext(jit_holder& jh, T val, unsigned size, bool is_signed) { - auto val_reg = get_reg_for(jh, sizeof(val) * 8, is_signed); - jh.cc.mov(val_reg, val); - return gen_ext(jh, val_reg, size, is_signed); -} -inline x86::Gp gen_ext(jit_holder& jh, x86::Gp val, unsigned size, bool is_signed) { - auto& cc = jh.cc; - if(is_signed) { - switch(val.size()) { - case 1: - cc.cbw(val); - break; - case 2: - cc.cwde(val); - break; - case 4: - cc.cdqe(val); - break; - case 8: - break; - default: - throw std::runtime_error("Invalid register size in gen_ext"); - } - } - switch(size) { - case 8: - cc.and_(val, std::numeric_limits::max()); - return val.r8(); - case 16: - cc.and_(val, std::numeric_limits::max()); - return val.r16(); - case 32: - cc.and_(val, std::numeric_limits::max()); - return val.r32(); - case 64: - cc.and_(val, std::numeric_limits::max()); - return val.r64(); - case 128: - return val.r64(); - default: - throw std::runtime_error("Invalid size in gen_ext"); - } -} -inline x86::Gp gen_read_mem(jit_holder& jh, mem_type_e type, x86::Gp addr, uint32_t length) { - x86::Compiler& cc = jh.cc; - auto ret_reg = cc.newInt32(); - - auto mem_type_reg = cc.newInt32(); - cc.mov(mem_type_reg, type); - - auto space_reg = cc.newInt32(); - cc.mov(space_reg, static_cast(iss::address_type::VIRTUAL)); - - auto val_ptr = cc.newUIntPtr(); - cc.mov(val_ptr, read_mem_buf); - - InvokeNode* invokeNode; - uint64_t mask = 0; - x86::Gp val_reg = cc.newInt64(); - - switch(length) { - case 1: { - cc.invoke(&invokeNode, &read_mem1, FuncSignatureT()); - mask = std::numeric_limits::max(); - break; - } - case 2: { - cc.invoke(&invokeNode, &read_mem2, FuncSignatureT()); - mask = std::numeric_limits::max(); - break; - } - case 4: { - cc.invoke(&invokeNode, &read_mem4, FuncSignatureT()); - mask = std::numeric_limits::max(); - break; - } - case 8: { - cc.invoke(&invokeNode, &read_mem8, FuncSignatureT()); - mask = std::numeric_limits::max(); - break; - } - default: - throw std::runtime_error(fmt::format("Invalid length ({}) in gen_read_mem", length)); - } - - invokeNode->setRet(0, ret_reg); - invokeNode->setArg(0, jh.arch_if_ptr); - invokeNode->setArg(1, space_reg); - invokeNode->setArg(2, mem_type_reg); - invokeNode->setArg(3, addr); - invokeNode->setArg(4, val_ptr); - cc.cmp(ret_reg, 0); - cc.jne(jh.trap_entry); - - cc.mov(val_reg, x86::ptr_64(val_ptr)); - cc.and_(val_reg, mask); - return val_reg; -} -inline x86::Gp gen_read_mem(jit_holder& jh, mem_type_e type, x86::Gp addr, x86::Gp length) { - throw std::runtime_error("Invalid gen_read_mem"); -} -inline x86::Gp gen_read_mem(jit_holder& jh, mem_type_e type, uint64_t addr, x86::Gp length) { - throw std::runtime_error("Invalid gen_read_mem"); -} -inline x86::Gp gen_read_mem(jit_holder& jh, mem_type_e type, uint64_t addr, uint32_t length) { - auto addr_reg = jh.cc.newInt64(); - jh.cc.mov(addr_reg, addr); - - return gen_read_mem(jh, type, addr_reg, length); -} -inline void gen_write_mem(jit_holder& jh, mem_type_e type, x86::Gp addr, int64_t val, uint32_t length) { - auto val_reg = get_reg_for(jh, length * 8, true); - jh.cc.mov(val_reg, val); - gen_write_mem(jh, type, addr, val_reg, length); -} -inline void gen_write_mem(jit_holder& jh, mem_type_e type, x86::Gp addr, x86::Gp val, uint32_t length) { - x86::Compiler& cc = jh.cc; - assert(val.size() == length); - auto mem_type_reg = cc.newInt32(); - jh.cc.mov(mem_type_reg, type); - auto space_reg = cc.newInt32(); - jh.cc.mov(space_reg, static_cast(iss::address_type::VIRTUAL)); - auto ret_reg = cc.newInt32(); - InvokeNode* invokeNode; - switch(length) { - case 1: - cc.invoke(&invokeNode, &write_mem1, FuncSignatureT()); - - break; - case 2: - cc.invoke(&invokeNode, &write_mem2, FuncSignatureT()); - break; - case 4: - cc.invoke(&invokeNode, &write_mem4, FuncSignatureT()); - break; - case 8: - cc.invoke(&invokeNode, &write_mem8, FuncSignatureT()); - - break; - default: - throw std::runtime_error("Invalid register size in gen_ext"); - } - invokeNode->setRet(0, ret_reg); - invokeNode->setArg(0, jh.arch_if_ptr); - invokeNode->setArg(1, space_reg); - invokeNode->setArg(2, mem_type_reg); - invokeNode->setArg(3, addr); - invokeNode->setArg(4, val); - - cc.cmp(ret_reg, 0); - cc.jne(jh.trap_entry); -} -inline void gen_write_mem(jit_holder& jh, mem_type_e type, uint64_t addr, x86::Gp val, uint32_t length) { - auto addr_reg = jh.cc.newUInt64(); - jh.cc.mov(addr_reg, addr); - gen_write_mem(jh, type, addr_reg, val, length); -} -inline void gen_write_mem(jit_holder& jh, mem_type_e type, uint64_t addr, int64_t val, uint32_t length) { - auto val_reg = get_reg_for(jh, length * 8, true); - jh.cc.mov(val_reg, val); - - auto addr_reg = jh.cc.newUInt64(); - jh.cc.mov(addr_reg, addr); - gen_write_mem(jh, type, addr_reg, val_reg, length); -} diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 1669219..8e4f72b 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -80,7 +80,7 @@ public: protected: using super::get_ptr_for; - using super::get_reg; +using super::get_reg; using super::get_reg_for; using super::load_reg_from_mem; using super::write_reg_to_mem; @@ -99,7 +99,7 @@ protected: void gen_block_epilogue(jit_holder& jh) override; inline const char *name(size_t index){return traits::reg_aliases.at(index);} - void gen_instr_prologue(jit_holder& jh, addr_t pc); + void gen_instr_prologue(jit_holder& jh); void gen_instr_epilogue(jit_holder& jh); inline void gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause); @@ -329,12 +329,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLUI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LUI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 0); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -373,12 +375,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nAUIPC_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("AUIPC_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 1); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -417,12 +421,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nJAL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("JAL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 2); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -470,12 +476,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nJALR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("JALR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 3); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -483,14 +491,11 @@ private: else{ auto addr_mask = (uint32_t)- 2; auto new_pc = gen_ext(jh, - (gen_operation(jh, band, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) - ), gen_ext(jh, addr_mask, 64, false)) + (gen_operation(jh, band, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) + ), addr_mask) ), 32, true); auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, urem, - new_pc, static_cast(traits::INSTR_ALIGNMENT)) + cc.cmp(gen_operation(jh, urem, new_pc, static_cast(traits::INSTR_ALIGNMENT)) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -539,20 +544,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBEQ_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BEQ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 4); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, eq, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + cc.cmp(gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ,0); cc.je(label_merge); { @@ -596,20 +602,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBNE_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BNE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 5); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ,0); cc.je(label_merge); { @@ -653,22 +660,23 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBLT_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BLT_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 6); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, lt, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) + cc.cmp(gen_operation(jh, lt, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) ,0); cc.je(label_merge); { @@ -712,22 +720,23 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBGE_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BGE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 7); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, gte, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) + cc.cmp(gen_operation(jh, gte, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) ,0); cc.je(label_merge); { @@ -771,20 +780,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBLTU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BLTU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 8); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ltu, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + cc.cmp(gen_operation(jh, ltu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ,0); cc.je(label_merge); { @@ -828,20 +838,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nBGEU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("BGEU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 9); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, gteu, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + cc.cmp(gen_operation(jh, gteu, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ,0); cc.je(label_merge); { @@ -885,20 +896,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLB_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 10); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 1), 8, false); @@ -937,20 +949,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLH_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 11); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 2), 16, false); @@ -989,20 +1002,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLW_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 12); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 4), 32, false); @@ -1041,20 +1055,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLBU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LBU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 13); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 1); if(rd!= 0){ @@ -1092,20 +1107,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nLHU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("LHU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 14); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 2); if(rd!= 0){ @@ -1143,20 +1159,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSB_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 15); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); gen_write_mem(jh, traits::MEM, store_address, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 8, false), 1); @@ -1190,20 +1207,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSH_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 16); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); gen_write_mem(jh, traits::MEM, store_address, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 16, false), 2); @@ -1237,20 +1255,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSW_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 17); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); gen_write_mem(jh, traits::MEM, store_address, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, false), 4); @@ -1284,12 +1303,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nADDI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("ADDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 18); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1298,8 +1319,7 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int16_t)sext<12>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true)); } } @@ -1332,12 +1352,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLTI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLTI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 19); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1392,12 +1414,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLTIU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLTIU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 20); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1451,12 +1475,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nXORI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("XORI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 21); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1464,8 +1490,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, bxor, - load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) + gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); } } @@ -1498,12 +1523,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nORI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("ORI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 22); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1511,8 +1538,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, bor, - load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) + gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); } } @@ -1545,12 +1571,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nANDI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("ANDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 23); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1558,8 +1586,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, band, - load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) + gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); } } @@ -1592,12 +1619,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLLI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 24); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1605,8 +1634,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, shl, - load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, shamt, 32, false)) + gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), shamt) ); } } @@ -1639,12 +1667,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSRLI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SRLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 25); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1652,8 +1682,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, shr, - load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, shamt, 32, false)) + gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), shamt) ); } } @@ -1686,12 +1715,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSRAI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SRAI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 26); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1700,9 +1731,8 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, sar, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh, shamt, 32, false)) + (gen_operation(jh, sar, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), shamt) ), 32, true)); } } @@ -1735,12 +1765,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nADD_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("ADD_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 27); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1749,8 +1781,7 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ), 32, false)); } } @@ -1783,12 +1814,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSUB_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SUB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 28); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1797,8 +1830,7 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, sub, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) + (gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ), 32, true)); } } @@ -1831,12 +1863,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 29); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1844,10 +1878,8 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_ext(jh, gen_operation(jh, shl, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), (gen_operation(jh, band, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false), (static_cast(traits::XLEN)- 1)) - )) + gen_ext(jh, gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + )) , 32, false)); } } @@ -1880,12 +1912,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLT_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLT_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 30); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -1941,12 +1975,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSLTU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SLTU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 31); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2000,12 +2036,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nXOR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("XOR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 32); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2013,8 +2051,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, bxor, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); } } @@ -2047,12 +2084,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSRL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SRL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 33); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2060,10 +2099,8 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_ext(jh, gen_operation(jh, shr, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), (gen_operation(jh, band, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false), (static_cast(traits::XLEN)- 1)) - )) + gen_ext(jh, gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + )) , 32, false)); } } @@ -2096,12 +2133,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nSRA_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("SRA_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 34); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2110,11 +2149,9 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_ext(jh, gen_operation(jh, sar, - gen_ext(jh, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), (gen_operation(jh, band, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false), (static_cast(traits::XLEN)- 1)) - )) + (gen_ext(jh, gen_operation(jh, sar, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + )) , 32, true)), 32, true)); } } @@ -2147,12 +2184,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nOR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("OR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 35); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2160,8 +2199,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, bor, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); } } @@ -2194,12 +2232,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nAND_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("AND_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 36); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2207,8 +2247,7 @@ private: else{ if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, band, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); } } @@ -2243,12 +2282,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nFENCE_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("FENCE_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 37); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_write_mem(jh, traits::FENCE, static_cast(traits::fence), (uint8_t)pred<< 4|succ, 4); auto returnValue = CONT; @@ -2276,12 +2317,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nECALL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("ECALL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 38); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 11); auto returnValue = TRAP; @@ -2309,12 +2352,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nEBREAK_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("EBREAK_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 39); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 3); auto returnValue = TRAP; @@ -2342,12 +2387,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nMRET_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("MRET_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 40); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_leave(jh, 3); auto returnValue = TRAP; @@ -2375,12 +2422,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nWFI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("WFI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 41); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_wait(jh, 1); auto returnValue = CONT; @@ -2412,12 +2461,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRW_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 42); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2463,12 +2514,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRS_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRS_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 43); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2477,8 +2530,7 @@ private: auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1); if(rs1!= 0){ - gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, - xrd, xrs1) + gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, xrd, xrs1) , 4); } if(rd!= 0){ @@ -2515,12 +2567,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRC_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRC_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 44); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2529,8 +2583,7 @@ private: auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1); if(rs1!= 0){ - gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, - xrd, gen_operation(jh, bnot, xrs1)) + gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, xrd, gen_operation(jh, bnot, xrs1)) , 4); } if(rd!= 0){ @@ -2567,12 +2620,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRWI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRWI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 45); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2614,12 +2669,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRSI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRSI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 46); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2627,8 +2684,7 @@ private: else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); if(zimm!= 0){ - gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, - xrd, (uint32_t)zimm) + gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, xrd, (uint32_t)zimm) , 4); } if(rd!= 0){ @@ -2665,12 +2721,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nCSRRCI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("CSRRCI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 47); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2678,8 +2736,7 @@ private: else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); if(zimm!= 0){ - gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, - xrd, ~ ((uint32_t)zimm)) + gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, xrd, ~ ((uint32_t)zimm)) , 4); } if(rd!= 0){ @@ -2716,12 +2773,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nFENCE_I_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("FENCE_I_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 48); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_write_mem(jh, traits::FENCE, static_cast(traits::fencei), imm, 4); auto returnValue = CONT; @@ -2753,24 +2812,25 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nMUL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("MUL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 49); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, - (gen_operation(jh, imul, - gen_ext(jh, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), 128, true), gen_ext(jh, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true), 128, true)) + (gen_operation(jh, imul, gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) ), 64, true); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), @@ -2807,30 +2867,30 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nMULH_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("MULH_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 50); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, - (gen_operation(jh, imul, - gen_ext(jh, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), 128, true), gen_ext(jh, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true), 128, true)) + (gen_operation(jh, imul, gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) ), 64, true); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, sar, - res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) + (gen_operation(jh, sar, res, static_cast(traits::XLEN)) ), 32, true)); } } @@ -2863,29 +2923,29 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nMULHSU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("MULHSU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 51); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, - (gen_operation(jh, imul, - gen_ext(jh, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), 128, true), gen_ext(jh, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 64, false), 128, false)) + (gen_operation(jh, imul, gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) ), 64, true); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, sar, - res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) + (gen_operation(jh, sar, res, static_cast(traits::XLEN)) ), 32, true)); } } @@ -2918,28 +2978,28 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nMULHU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("MULHU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 52); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, - (gen_operation(jh, mul, - gen_ext(jh, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 64, false), 128, false), gen_ext(jh, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 64, false), 128, false)) + (gen_operation(jh, mul, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) ), 64, false); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, shr, - res, gen_ext(jh, static_cast(traits::XLEN), 64, false)) + (gen_operation(jh, shr, res, static_cast(traits::XLEN)) ), 32, false)); } } @@ -2972,12 +3032,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nDIV_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("DIV_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 53); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -2989,20 +3051,16 @@ private: load_reg_from_mem(jh, traits::X0 + rs2), 32, false); if(rd!= 0){ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - divisor, gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, ne, divisor, 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); { auto MMIN = ((uint32_t)1)<<(static_cast(traits::XLEN)-1); auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, land, - gen_operation(jh, eq, - load_reg_from_mem(jh, traits::X0 + rs1), MMIN) - , gen_operation(jh, eq, - divisor, gen_ext(jh, - 1, 32, true)) - ) + cc.cmp(gen_operation(jh, land, gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN) + , gen_operation(jh, eq, divisor, - 1) + ) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3015,8 +3073,7 @@ private: { cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, idiv, - gen_ext(jh, dividend, 64, true), gen_ext(jh, divisor, 64, true)) + (gen_operation(jh, idiv, dividend, divisor) ), 32, true)); } cc.bind(label_merge); @@ -3059,20 +3116,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nDIVU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("DIVU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 54); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - load_reg_from_mem(jh, traits::X0 + rs2), gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3080,8 +3138,7 @@ private: if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, div, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + (gen_operation(jh, div, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ), 32, false)); } } @@ -3124,33 +3181,31 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nREM_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("REM_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 55); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - load_reg_from_mem(jh, traits::X0 + rs2), gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); { auto MMIN = (uint32_t)1<<(static_cast(traits::XLEN)-1); auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, land, - gen_operation(jh, eq, - load_reg_from_mem(jh, traits::X0 + rs1), MMIN) - , gen_operation(jh, eq, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, false), gen_ext(jh, - 1, 32, true)) - ) + cc.cmp(gen_operation(jh, land, gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1), MMIN) + , gen_operation(jh, eq, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, false), - 1) + ) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3167,10 +3222,9 @@ private: if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, srem, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) + (gen_operation(jh, srem, gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, false)) ), 32, true)); } } @@ -3215,28 +3269,28 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nREMU_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("REMU_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 56); - pc=pc+ 4; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+4; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - load_reg_from_mem(jh, traits::X0 + rs2), gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); { if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_operation(jh, urem, - load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) + gen_operation(jh, urem, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); } } @@ -3278,18 +3332,19 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__ADDI4SPN_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__ADDI4SPN_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 57); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(imm){ cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, imm, 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), imm) ), 32, false)); } else{ @@ -3324,16 +3379,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__LW_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__LW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 58); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto offs = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 64, false), gen_ext(jh, uimm, 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+ 8), uimm) ), 32, false); cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, @@ -3368,16 +3424,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SW_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SW_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 59); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto offs = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 64, false), gen_ext(jh, uimm, 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+ 8), uimm) ), 32, false); gen_write_mem(jh, traits::MEM, offs, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2+ 8), 32, false), 4); @@ -3409,12 +3466,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__ADDI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__ADDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 60); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -3423,8 +3482,7 @@ private: if(rs1!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rs1), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh, (int8_t)sext<6>(imm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int8_t)sext<6>(imm)) ), 32, true)); } } @@ -3454,12 +3512,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__NOP_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__NOP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 61); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto returnValue = CONT; @@ -3488,12 +3548,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__JAL_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__JAL_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 62); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ 1), (uint32_t)(PC+ 2)); @@ -3528,12 +3590,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__LI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__LI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 63); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -3572,12 +3636,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__LUI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__LUI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 64); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(imm== 0||rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -3613,18 +3679,19 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__ADDI16SP_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__ADDI16SP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 65); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(nzimm){ cc.mov(get_ptr_for(jh, traits::X0+ 2), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, (int16_t)sext<10>(nzimm), 64, true)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), (int16_t)sext<10>(nzimm)) ), 32, true)); } else{ @@ -3656,12 +3723,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\n__reserved_clui_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("__reserved_clui_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 66); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 2); auto returnValue = CONT; @@ -3692,16 +3761,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SRLI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SRLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 67); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), - gen_operation(jh, shr, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, shamt, 32, false)) + gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+ 8), shamt) ); auto returnValue = CONT; @@ -3731,28 +3801,28 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SRAI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SRAI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 68); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(shamt){ cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, - (gen_operation(jh, sar, - (gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), gen_ext(jh, shamt, 32, false)) + (gen_operation(jh, sar, (gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), shamt) ), 32, true)); } else{ if(static_cast(traits::XLEN)== 128){ cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, - (gen_operation(jh, sar, - (gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), gen_ext(jh, 64, 32, false)) + (gen_operation(jh, sar, (gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), 64) ), 32, true)); } } @@ -3784,17 +3854,18 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__ANDI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__ANDI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 69); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), gen_ext(jh, - (gen_operation(jh, band, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, (int8_t)sext<6>(imm), 32, true)) + (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+ 8), (int8_t)sext<6>(imm)) ), 32, true)); auto returnValue = CONT; @@ -3824,17 +3895,18 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SUB_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SUB_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 70); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), gen_ext(jh, - (gen_operation(jh, sub, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rd+ 8), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2+ 8), 64, false)) + (gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ), 32, true)); auto returnValue = CONT; @@ -3864,16 +3936,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__XOR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__XOR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 71); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, bxor, - load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); auto returnValue = CONT; @@ -3903,16 +3976,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__OR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__OR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 72); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, bor, - load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); auto returnValue = CONT; @@ -3942,16 +4016,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__AND_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__AND_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 73); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, band, - load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) ); auto returnValue = CONT; @@ -3980,12 +4055,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__J_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__J_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 74); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); cc.mov(jh.next_pc, PC_val_v); @@ -4018,16 +4095,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__BEQZ_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__BEQZ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 75); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, eq, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 0) ,0); cc.je(label_merge); { @@ -4064,16 +4142,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__BNEZ_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__BNEZ_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 76); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), gen_ext(jh, 0, 32, false)) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 0) ,0); cc.je(label_merge); { @@ -4110,12 +4189,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SLLI_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SLLI_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 77); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -4123,8 +4204,7 @@ private: else{ if(rs1!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rs1), - gen_operation(jh, shl, - load_reg_from_mem(jh, traits::X0 + rs1), gen_ext(jh, nzuimm, 32, false)) + gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), nzuimm) ); } } @@ -4156,20 +4236,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__LWSP_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__LWSP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 78); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rd== 0){ gen_raise(jh, 0, 2); } else{ auto offs = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, uimm, 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), uimm) ), 32, false); cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, @@ -4204,12 +4285,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__MV_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__MV_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 79); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -4247,16 +4330,17 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__JR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__JR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 80); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs1&&rs1(traits::RFS)){ - auto PC_val_v = gen_operation(jh, band, - load_reg_from_mem(jh, traits::X0 + rs1%static_cast(traits::RFS)), gen_ext(jh, ~ 0x1, 32, false)) + auto PC_val_v = gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1%static_cast(traits::RFS)), ~ 0x1) ; cc.mov(jh.next_pc, PC_val_v); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); @@ -4289,12 +4373,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\n__reserved_cmv_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("__reserved_cmv_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 81); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 2); auto returnValue = CONT; @@ -4325,12 +4411,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__ADD_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__ADD_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 82); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -4339,8 +4427,7 @@ private: if(rd!= 0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rd), 64, false), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rd), load_reg_from_mem(jh, traits::X0 + rs2)) ), 32, false)); } } @@ -4371,12 +4458,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__JALR_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__JALR_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 83); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); @@ -4385,8 +4474,7 @@ private: auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1); cc.mov(get_ptr_for(jh, traits::X0+ 1), (uint32_t)(PC+ 2)); - auto PC_val_v = gen_operation(jh, band, - new_pc, gen_ext(jh, ~ 0x1, 32, false)) + auto PC_val_v = gen_operation(jh, band, new_pc, ~ 0x1) ; cc.mov(jh.next_pc, PC_val_v); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); @@ -4416,12 +4504,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__EBREAK_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__EBREAK_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 84); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 3); auto returnValue = CONT; @@ -4452,20 +4542,21 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nC__SWSP_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("C__SWSP_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 85); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)){ gen_raise(jh, 0, 2); } else{ auto offs = gen_ext(jh, - (gen_operation(jh, add, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + 2), 64, false), gen_ext(jh, uimm, 64, false)) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), uimm) ), 32, false); gen_write_mem(jh, traits::MEM, offs, gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, false), 4); @@ -4495,12 +4586,14 @@ private: } x86::Compiler& cc = jh.cc; - cc.comment(fmt::format("\nDII_{:#x}:",pc.val).c_str()); + cc.comment(fmt::format("DII_{:#x}:",pc.val).c_str()); this->gen_sync(jh, PRE_SYNC, 86); - pc=pc+ 2; - - gen_instr_prologue(jh, pc.val); - cc.comment("\n//behavior:"); + cc.mov(jh.pc, pc.val); + pc = pc+2; + cc.mov(jh.next_pc, pc.val); + + gen_instr_prologue(jh); + cc.comment("//behavior:"); /*generate behavior*/ gen_raise(jh, 0, 2); auto returnValue = CONT; @@ -4603,36 +4696,30 @@ continuation_e vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned return (this->*f)(pc, instr, jh); } template -void vm_impl::gen_instr_prologue(jit_holder& jh, addr_t pc) { +void vm_impl::gen_instr_prologue(jit_holder& jh) { auto& cc = jh.cc; - cc.mov(jh.pc, pc); - cc.comment("\n//(*icount)++;"); + cc.comment("//(*icount)++;"); cc.inc(get_ptr_for(jh, traits::ICOUNT)); - cc.comment("\n//*pc=*next_pc;"); - cc.mov(get_ptr_for(jh, traits::PC), jh.next_pc); - - cc.comment("\n//*trap_state=*pending_trap;"); + cc.comment("//*trap_state=*pending_trap;"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state); - cc.comment("\n//increment *next_pc"); - cc.mov(jh.next_pc, pc); } template void vm_impl::gen_instr_epilogue(jit_holder& jh) { auto& cc = jh.cc; - cc.comment("\n//if(*trap_state!=0) goto trap_entry;"); + cc.comment("//if(*trap_state!=0) goto trap_entry;"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.cmp(current_trap_state, 0); cc.jne(jh.trap_entry); // TODO: Does not need to be done for every instruction, only when needed (by plugin) - cc.comment("\n//write back regs to mem"); + cc.comment("//write back regs to mem"); write_reg_to_mem(jh, jh.pc, traits::PC); write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); } @@ -4645,13 +4732,13 @@ void vm_impl::gen_block_prologue(jit_holder& jh){ template void vm_impl::gen_block_epilogue(jit_holder& jh){ x86::Compiler& cc = jh.cc; - cc.comment("\n//return *next_pc;"); + cc.comment("//return *next_pc;"); cc.ret(jh.next_pc); cc.bind(jh.trap_entry); - cc.comment("\n//Prepare for enter_trap;"); + cc.comment("//Prepare for enter_trap;"); // Make sure cached values are written back - cc.comment("\n//write back regs to mem"); + cc.comment("//write back regs to mem"); write_reg_to_mem(jh, jh.pc, traits::PC); write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); this->gen_sync(jh, POST_SYNC, -1); @@ -4664,7 +4751,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ x86::Gp instr = cc.newInt32("instr"); cc.mov(instr, 0); // this is not correct - cc.comment("\n//enter trap call;"); + cc.comment("//enter trap call;"); InvokeNode* call_enter_trap; cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); call_enter_trap->setArg(0, jh.arch_if_ptr); @@ -4676,9 +4763,9 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC)); cc.mov(jh.next_pc, current_next_pc); - cc.comment("\n//*last_branch = std::numeric_limits::max();"); + cc.comment("//*last_branch = std::numeric_limits::max();"); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits::max()); - cc.comment("\n//return *next_pc;"); + cc.comment("//return *next_pc;"); cc.ret(jh.next_pc); } template @@ -4688,13 +4775,9 @@ inline void vm_impl:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); cc.mov(tmp1, 0x80ULL << 24 | (cause << 16) | trap_id); cc.mov(get_ptr_for(jh, traits::TRAP_STATE), tmp1); - auto tmp2 = get_reg_for(jh, traits::NEXT_PC); - cc.mov(tmp2, std::numeric_limits::max()); - cc.mov(get_ptr_for(jh, traits::NEXT_PC), tmp2); + cc.mov(jh.next_pc, std::numeric_limits::max()); } - - } // namespace tgc5c template <> From 3422c7cd5ccb4440f0bbc5611deab243d5c174d5 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Wed, 8 May 2024 15:18:38 +0200 Subject: [PATCH 09/18] optimizes writebacks --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 10 +-------- src/vm/asmjit/vm_tgc5c.cpp | 24 +++++++-------------- 2 files changed, 9 insertions(+), 25 deletions(-) diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index cb0a2b5..981950c 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -284,11 +284,6 @@ void vm_impl::gen_instr_epilogue(jit_holder& jh) { cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.cmp(current_trap_state, 0); cc.jne(jh.trap_entry); - - // TODO: Does not need to be done for every instruction, only when needed (by plugin) - cc.comment("//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); } template void vm_impl::gen_block_prologue(jit_holder& jh){ @@ -304,10 +299,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.bind(jh.trap_entry); cc.comment("//Prepare for enter_trap;"); - // Make sure cached values are written back - cc.comment("//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); + this->write_back(jh); this->gen_sync(jh, POST_SYNC, -1); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 8e4f72b..5073c53 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -2826,12 +2826,12 @@ private: } else{ auto res = gen_ext(jh, - (gen_operation(jh, imul, gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh, - gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) - ), 64, true); + (gen_operation(jh, imul, + gen_ext(jh, + gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), + gen_ext(jh, + gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) + ), 64, true); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, @@ -4717,11 +4717,6 @@ void vm_impl::gen_instr_epilogue(jit_holder& jh) { cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.cmp(current_trap_state, 0); cc.jne(jh.trap_entry); - - // TODO: Does not need to be done for every instruction, only when needed (by plugin) - cc.comment("//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); } template void vm_impl::gen_block_prologue(jit_holder& jh){ @@ -4737,10 +4732,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.bind(jh.trap_entry); cc.comment("//Prepare for enter_trap;"); - // Make sure cached values are written back - cc.comment("//write back regs to mem"); - write_reg_to_mem(jh, jh.pc, traits::PC); - write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC); + this->write_back(jh); this->gen_sync(jh, POST_SYNC, -1); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); @@ -4750,7 +4742,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.mov(current_pc, get_ptr_for(jh, traits::PC)); x86::Gp instr = cc.newInt32("instr"); - cc.mov(instr, 0); // this is not correct + cc.mov(instr, 0); // FIXME:this is not correct cc.comment("//enter trap call;"); InvokeNode* call_enter_trap; cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); From f0a004be9d875049dfaa6850a7cfa3bb295ce5c8 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Thu, 9 May 2024 13:42:16 +0200 Subject: [PATCH 10/18] adds information for debugging --- src/iss/arch/tgc5c.h | 46 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/src/iss/arch/tgc5c.h b/src/iss/arch/tgc5c.h index cff086d..06d74de 100644 --- a/src/iss/arch/tgc5c.h +++ b/src/iss/arch/tgc5c.h @@ -76,7 +76,53 @@ template <> struct traits { static constexpr std::array reg_byte_offsets{ {0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60,64,68,72,76,80,84,88,92,96,100,104,108,112,116,120,124,128,132,136,137,141,145,149,157,165,173,177}}; +/* +For easy lookup: +X0 (zero): 0x0000 +X1 (ra) : 0x0004 +X2 (sp) : 0x0008 +X3 (gp) : 0x000c +X4 (tp) : 0x0010 +X5 (t0) : 0x0014 +X6 (t1) : 0x0018 +X7 (t2) : 0x001c +X8 (s0/fp): 0x0020 +X9 (s1) : 0x0024 +X10 (a0) : 0x0028 +X11 (a1) : 0x002c +X12 (a2) : 0x0030 +X13 (a3) : 0x0034 +X14 (a4) : 0x0038 +X15 (a5) : 0x003c +X16 (a6) : 0x0040 +X17 (a7) : 0x0044 +X18 (s2) : 0x0048 +X19 (s3) : 0x004c +X20 (s4) : 0x0050 +X21 (s5) : 0x0054 +X22 (s6) : 0x0058 +X23 (s7) : 0x005c +X24 (s8) : 0x0060 +X25 (s9) : 0x0064 +X26 (s10) : 0x0068 +X27 (s11) : 0x006c +X28 (t3) : 0x0070 +X29 (t4) : 0x0074 +X30 (t5) : 0x0078 +X31 (t6) : 0x007c +PC : 0x0080 +NEXT_PC : 0x0084 +PRIV : 0x0085 +DPC : 0x0089 +trap_state : 0x008d +pending_trap : 0x0091 +icount : 0x0095 +cycle : 0x009d +instret : 0x00a5 +instruction : 0x00ad +last_branch : 0x00b1 +*/ static const uint64_t addr_mask = (reg_t(1) << (XLEN - 1)) | ((reg_t(1) << (XLEN - 1)) - 1); enum sreg_flag_e { FLAGS }; From 2e27b025cc1a75a4a0ed5a0d911a65c422ecfe23 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Thu, 9 May 2024 13:47:36 +0200 Subject: [PATCH 11/18] improves dump-ir comments --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 12 ++++-------- src/vm/asmjit/vm_tgc5c.cpp | 10 +++------- 2 files changed, 7 insertions(+), 15 deletions(-) diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index 981950c..47167ed 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -266,10 +266,9 @@ template void vm_impl::gen_instr_prologue(jit_holder& jh) { auto& cc = jh.cc; - cc.comment("//(*icount)++;"); + cc.comment("//gen_instr_prologue"); cc.inc(get_ptr_for(jh, traits::ICOUNT)); - cc.comment("//*trap_state=*pending_trap;"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state); @@ -279,7 +278,7 @@ template void vm_impl::gen_instr_epilogue(jit_holder& jh) { auto& cc = jh.cc; - cc.comment("//if(*trap_state!=0) goto trap_entry;"); + cc.comment("//gen_instr_epilogue"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.cmp(current_trap_state, 0); @@ -294,11 +293,10 @@ void vm_impl::gen_block_prologue(jit_holder& jh){ template void vm_impl::gen_block_epilogue(jit_holder& jh){ x86::Compiler& cc = jh.cc; - cc.comment("//return *next_pc;"); + cc.comment("//gen_block_epilogue"); cc.ret(jh.next_pc); cc.bind(jh.trap_entry); - cc.comment("//Prepare for enter_trap;"); this->write_back(jh); this->gen_sync(jh, POST_SYNC, -1); @@ -309,7 +307,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.mov(current_pc, get_ptr_for(jh, traits::PC)); x86::Gp instr = cc.newInt32("instr"); - cc.mov(instr, 0); // this is not correct + cc.mov(instr, 0); // FIXME:this is not correct cc.comment("//enter trap call;"); InvokeNode* call_enter_trap; cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT()); @@ -322,9 +320,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC)); cc.mov(jh.next_pc, current_next_pc); - cc.comment("//*last_branch = std::numeric_limits::max();"); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits::max()); - cc.comment("//return *next_pc;"); cc.ret(jh.next_pc); } template diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 5073c53..5b35db0 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -4699,10 +4699,9 @@ template void vm_impl::gen_instr_prologue(jit_holder& jh) { auto& cc = jh.cc; - cc.comment("//(*icount)++;"); + cc.comment("//gen_instr_prologue"); cc.inc(get_ptr_for(jh, traits::ICOUNT)); - cc.comment("//*trap_state=*pending_trap;"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.mov(get_ptr_for(jh, traits::PENDING_TRAP), current_trap_state); @@ -4712,7 +4711,7 @@ template void vm_impl::gen_instr_epilogue(jit_holder& jh) { auto& cc = jh.cc; - cc.comment("//if(*trap_state!=0) goto trap_entry;"); + cc.comment("//gen_instr_epilogue"); x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE); cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE)); cc.cmp(current_trap_state, 0); @@ -4727,11 +4726,10 @@ void vm_impl::gen_block_prologue(jit_holder& jh){ template void vm_impl::gen_block_epilogue(jit_holder& jh){ x86::Compiler& cc = jh.cc; - cc.comment("//return *next_pc;"); + cc.comment("//gen_block_epilogue"); cc.ret(jh.next_pc); cc.bind(jh.trap_entry); - cc.comment("//Prepare for enter_trap;"); this->write_back(jh); this->gen_sync(jh, POST_SYNC, -1); @@ -4755,9 +4753,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.mov(current_next_pc, get_ptr_for(jh, traits::NEXT_PC)); cc.mov(jh.next_pc, current_next_pc); - cc.comment("//*last_branch = std::numeric_limits::max();"); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), std::numeric_limits::max()); - cc.comment("//return *next_pc;"); cc.ret(jh.next_pc); } template From ee6a11dae6ae62c9d7f71cc02c661d7b169c0e0b Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Thu, 9 May 2024 20:54:30 +0200 Subject: [PATCH 12/18] fixes typo --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 2 +- src/vm/asmjit/vm_tgc5c.cpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index 47167ed..081d9de 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -324,7 +324,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.ret(jh.next_pc); } template -inline void vm_impl:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { +inline void vm_impl::gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { auto& cc = jh.cc; cc.comment("//gen_raise"); auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 5b35db0..8955a24 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -80,7 +80,7 @@ public: protected: using super::get_ptr_for; -using super::get_reg; + using super::get_reg; using super::get_reg_for; using super::load_reg_from_mem; using super::write_reg_to_mem; @@ -4757,7 +4757,7 @@ void vm_impl::gen_block_epilogue(jit_holder& jh){ cc.ret(jh.next_pc); } template -inline void vm_impl:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { +inline void vm_impl::gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) { auto& cc = jh.cc; cc.comment("//gen_raise"); auto tmp1 = get_reg_for(jh, traits::TRAP_STATE); From 001c6349f78fd38c929562c942f30d002df8afb0 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Sat, 11 May 2024 15:16:46 +0200 Subject: [PATCH 13/18] removes tcc sim stop when writing to tohost --- src/iss/arch/riscv_hart_m_p.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 90a7d5f..f6d2222 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -1126,7 +1126,7 @@ iss::status riscv_hart_m_p::write_mem(phys_addr_t paddr, unsigned le this->reg.trap_state = std::numeric_limits::max(); this->interrupt_sim = hostvar; #ifndef WITH_TCC - throw(iss::simulation_stopped(hostvar)); + // throw(iss::simulation_stopped(hostvar)); #endif break; case 0x0101: { From b76c5bf0d65b0d3a93e24d4c71dbf8ed220c6366 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Sat, 11 May 2024 15:25:49 +0200 Subject: [PATCH 14/18] adds flush to fence_i --- src/vm/asmjit/vm_tgc5c.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index 8955a24..ac2681c 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -2783,7 +2783,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ gen_write_mem(jh, traits::FENCE, static_cast(traits::fencei), imm, 4); - auto returnValue = CONT; + auto returnValue = FLUSH; gen_instr_epilogue(jh); this->gen_sync(jh, POST_SYNC, 48); From fb330cddea6d780b50d0af02db92d88e45e0a137 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Sat, 18 May 2024 19:33:57 +0200 Subject: [PATCH 15/18] llvm passes act --- gen_input/templates/llvm/CORENAME.cpp.gtl | 35 +- src/vm/llvm/vm_tgc5c.cpp | 744 +++++++++++++--------- 2 files changed, 479 insertions(+), 300 deletions(-) diff --git a/gen_input/templates/llvm/CORENAME.cpp.gtl b/gen_input/templates/llvm/CORENAME.cpp.gtl index b6bef39..1b13101 100644 --- a/gen_input/templates/llvm/CORENAME.cpp.gtl +++ b/gen_input/templates/llvm/CORENAME.cpp.gtl @@ -99,16 +99,11 @@ protected: std::tuple gen_single_inst_behavior(virt_addr_t &, unsigned int &, BasicBlock *) override; void gen_leave_behavior(BasicBlock *leave_blk) override; - void gen_raise_trap(uint16_t trap_id, uint16_t cause); - void gen_leave_trap(unsigned lvl); - void gen_wait(unsigned type); - void gen_trap_behavior(BasicBlock *) override; - - void gen_trap_check(BasicBlock *bb); + void gen_instr_epilogue(BasicBlock *bb); inline Value *gen_reg_load(unsigned i, unsigned level = 0) { return this->builder.CreateLoad(this->get_typeptr(i), get_reg_ptr(i), false); @@ -162,20 +157,22 @@ private: /* instruction definitions */<%instructions.eachWithIndex{instr, idx -> %> /* instruction ${idx}: ${instr.name} */ std::tuple __${generator.functionName(instr.name)}(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("${instr.name}_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,${idx}); uint64_t PC = pc.val; <%instr.fields.eachLine{%>${it} <%}%>if(this->disass_enabled){ /* generate console output when executing the command */<%instr.disass.eachLine{%> ${it}<%}%> } + bb->setName(fmt::format("${instr.name}_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,${idx}); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ ${instr.length/8}; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ <%instr.behavior.eachLine{%>${it} <%}%> - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, ${idx}); this->builder.CreateBr(bb); return returnValue; @@ -195,7 +192,7 @@ private: pc = pc + ((instr & 3) == 3 ? 4 : 2); this->gen_raise_trap(0, 2); // illegal instruction trap this->gen_sync(iss::POST_SYNC, instr_descr.size()); - this->gen_trap_check(this->leave_blk); + this->gen_instr_epilogue(this->leave_blk); return std::make_tuple(BRANCH, nullptr); } //decoding functionality @@ -301,18 +298,21 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, return (this->*f)(pc, instr, this_block); } -template void vm_impl::gen_leave_behavior(BasicBlock *leave_blk) { +template +void vm_impl::gen_leave_behavior(BasicBlock *leave_blk) { this->builder.SetInsertPoint(leave_blk); this->builder.CreateRet(this->builder.CreateLoad(this->get_typeptr(traits::NEXT_PC),get_reg_ptr(traits::NEXT_PC), false)); } -template void vm_impl::gen_raise_trap(uint16_t trap_id, uint16_t cause) { +template +void vm_impl::gen_raise_trap(uint16_t trap_id, uint16_t cause) { auto *TRAP_val = this->gen_const(32, 0x80 << 24 | (cause << 16) | trap_id); this->builder.CreateStore(TRAP_val, get_reg_ptr(traits::TRAP_STATE), true); this->builder.CreateStore(this->gen_const(32U, std::numeric_limits::max()), get_reg_ptr(traits::LAST_BRANCH), false); } -template void vm_impl::gen_leave_trap(unsigned lvl) { +template +void vm_impl::gen_leave_trap(unsigned lvl) { std::vector args{ this->core_ptr, ConstantInt::get(getContext(), APInt(64, lvl)) }; this->builder.CreateCall(this->mod->getFunction("leave_trap"), args); auto *PC_val = this->gen_read_mem(traits::CSR, (lvl << 8) + 0x41, traits::XLEN / 8); @@ -320,12 +320,14 @@ template void vm_impl::gen_leave_trap(unsigned lvl) { this->builder.CreateStore(this->gen_const(32U, std::numeric_limits::max()), get_reg_ptr(traits::LAST_BRANCH), false); } -template void vm_impl::gen_wait(unsigned type) { +template +void vm_impl::gen_wait(unsigned type) { std::vector args{ this->core_ptr, ConstantInt::get(getContext(), APInt(64, type)) }; this->builder.CreateCall(this->mod->getFunction("wait"), args); } -template void vm_impl::gen_trap_behavior(BasicBlock *trap_blk) { +template +void vm_impl::gen_trap_behavior(BasicBlock *trap_blk) { this->builder.SetInsertPoint(trap_blk); this->gen_sync(POST_SYNC, -1); //TODO get right InstrId auto *trap_state_val = this->builder.CreateLoad(this->get_typeptr(traits::TRAP_STATE), get_reg_ptr(traits::TRAP_STATE), true); @@ -338,7 +340,8 @@ template void vm_impl::gen_trap_behavior(BasicBlock *trap_ this->builder.CreateRet(trap_addr_val); } -template inline void vm_impl::gen_trap_check(BasicBlock *bb) { +template +void vm_impl::gen_instr_epilogue(BasicBlock *bb) { auto* target_bb = BasicBlock::Create(this->mod->getContext(), "", this->func, bb); auto *v = this->builder.CreateLoad(this->get_typeptr(traits::TRAP_STATE), get_reg_ptr(traits::TRAP_STATE), true); this->gen_cond_branch(this->builder.CreateICmp( diff --git a/src/vm/llvm/vm_tgc5c.cpp b/src/vm/llvm/vm_tgc5c.cpp index fe03630..58e3c2c 100644 --- a/src/vm/llvm/vm_tgc5c.cpp +++ b/src/vm/llvm/vm_tgc5c.cpp @@ -99,16 +99,11 @@ protected: std::tuple gen_single_inst_behavior(virt_addr_t &, unsigned int &, BasicBlock *) override; void gen_leave_behavior(BasicBlock *leave_blk) override; - void gen_raise_trap(uint16_t trap_id, uint16_t cause); - void gen_leave_trap(unsigned lvl); - void gen_wait(unsigned type); - void gen_trap_behavior(BasicBlock *) override; - - void gen_trap_check(BasicBlock *bb); + void gen_instr_epilogue(BasicBlock *bb); inline Value *gen_reg_load(unsigned i, unsigned level = 0) { return this->builder.CreateLoad(this->get_typeptr(i), get_reg_ptr(i), false); @@ -334,8 +329,6 @@ private: /* instruction definitions */ /* instruction 0: LUI */ std::tuple __lui(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LUI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,0); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint32_t imm = ((bit_sub<12,20>(instr) << 12)); @@ -351,9 +344,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LUI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,0); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -367,7 +364,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 0); this->builder.CreateBr(bb); return returnValue; @@ -375,8 +372,6 @@ private: /* instruction 1: AUIPC */ std::tuple __auipc(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("AUIPC_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,1); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint32_t imm = ((bit_sub<12,20>(instr) << 12)); @@ -392,9 +387,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("AUIPC_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,1); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -408,7 +407,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 1); this->builder.CreateBr(bb); return returnValue; @@ -416,8 +415,6 @@ private: /* instruction 2: JAL */ std::tuple __jal(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("JAL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,2); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint32_t imm = ((bit_sub<12,8>(instr) << 12) | (bit_sub<20,1>(instr) << 11) | (bit_sub<21,10>(instr) << 1) | (bit_sub<31,1>(instr) << 20)); @@ -433,9 +430,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("JAL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,2); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -456,7 +457,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 2); this->builder.CreateBr(bb); return returnValue; @@ -464,8 +465,6 @@ private: /* instruction 3: JALR */ std::tuple __jalr(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("JALR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,3); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -482,9 +481,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("JALR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,3); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -528,7 +531,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 3); this->builder.CreateBr(bb); return returnValue; @@ -536,8 +539,6 @@ private: /* instruction 4: BEQ */ std::tuple __beq(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BEQ_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,4); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -554,9 +555,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BEQ_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,4); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -583,7 +588,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 4); this->builder.CreateBr(bb); return returnValue; @@ -591,8 +596,6 @@ private: /* instruction 5: BNE */ std::tuple __bne(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BNE_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,5); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -609,9 +612,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BNE_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,5); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -638,7 +645,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 5); this->builder.CreateBr(bb); return returnValue; @@ -646,8 +653,6 @@ private: /* instruction 6: BLT */ std::tuple __blt(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BLT_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,6); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -664,9 +669,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BLT_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,6); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -697,7 +706,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 6); this->builder.CreateBr(bb); return returnValue; @@ -705,8 +714,6 @@ private: /* instruction 7: BGE */ std::tuple __bge(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BGE_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,7); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -723,9 +730,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BGE_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,7); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -756,7 +767,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 7); this->builder.CreateBr(bb); return returnValue; @@ -764,8 +775,6 @@ private: /* instruction 8: BLTU */ std::tuple __bltu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BLTU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,8); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -782,9 +791,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BLTU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,8); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -811,7 +824,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 8); this->builder.CreateBr(bb); return returnValue; @@ -819,8 +832,6 @@ private: /* instruction 9: BGEU */ std::tuple __bgeu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("BGEU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,9); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,1>(instr) << 11) | (bit_sub<8,4>(instr) << 1) | (bit_sub<25,6>(instr) << 5) | (bit_sub<31,1>(instr) << 12)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -837,9 +848,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("BGEU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,9); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -866,7 +881,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 9); this->builder.CreateBr(bb); return returnValue; @@ -874,8 +889,6 @@ private: /* instruction 10: LB */ std::tuple __lb(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LB_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,10); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -892,9 +905,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LB_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,10); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -919,7 +936,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 10); this->builder.CreateBr(bb); return returnValue; @@ -927,8 +944,6 @@ private: /* instruction 11: LH */ std::tuple __lh(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LH_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,11); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -945,9 +960,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LH_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,11); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -972,7 +991,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 11); this->builder.CreateBr(bb); return returnValue; @@ -980,8 +999,6 @@ private: /* instruction 12: LW */ std::tuple __lw(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LW_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,12); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -998,9 +1015,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LW_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,12); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1025,7 +1046,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 12); this->builder.CreateBr(bb); return returnValue; @@ -1033,8 +1054,6 @@ private: /* instruction 13: LBU */ std::tuple __lbu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LBU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,13); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1051,9 +1070,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LBU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,13); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1076,7 +1099,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 13); this->builder.CreateBr(bb); return returnValue; @@ -1084,8 +1107,6 @@ private: /* instruction 14: LHU */ std::tuple __lhu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("LHU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,14); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1102,9 +1123,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("LHU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,14); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1127,7 +1152,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 14); this->builder.CreateBr(bb); return returnValue; @@ -1135,8 +1160,6 @@ private: /* instruction 15: SB */ std::tuple __sb(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SB_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,15); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1153,9 +1176,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SB_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,15); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1175,7 +1202,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 15); this->builder.CreateBr(bb); return returnValue; @@ -1183,8 +1210,6 @@ private: /* instruction 16: SH */ std::tuple __sh(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SH_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,16); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1201,9 +1226,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SH_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,16); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1223,7 +1252,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 16); this->builder.CreateBr(bb); return returnValue; @@ -1231,8 +1260,6 @@ private: /* instruction 17: SW */ std::tuple __sw(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SW_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,17); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<7,5>(instr)) | (bit_sub<25,7>(instr) << 5)); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1249,9 +1276,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SW_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,17); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1271,7 +1302,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 17); this->builder.CreateBr(bb); return returnValue; @@ -1279,8 +1310,6 @@ private: /* instruction 18: ADDI */ std::tuple __addi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("ADDI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,18); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1297,9 +1326,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("ADDI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,18); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1318,7 +1351,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 18); this->builder.CreateBr(bb); return returnValue; @@ -1326,8 +1359,6 @@ private: /* instruction 19: SLTI */ std::tuple __slti(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLTI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,19); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1344,9 +1375,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLTI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,19); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1367,7 +1402,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 19); this->builder.CreateBr(bb); return returnValue; @@ -1375,8 +1410,6 @@ private: /* instruction 20: SLTIU */ std::tuple __sltiu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLTIU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,20); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1393,9 +1426,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLTIU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,20); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1415,7 +1452,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 20); this->builder.CreateBr(bb); return returnValue; @@ -1423,8 +1460,6 @@ private: /* instruction 21: XORI */ std::tuple __xori(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("XORI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,21); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1441,9 +1476,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("XORI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,21); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1460,7 +1499,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 21); this->builder.CreateBr(bb); return returnValue; @@ -1468,8 +1507,6 @@ private: /* instruction 22: ORI */ std::tuple __ori(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("ORI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,22); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1486,9 +1523,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("ORI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,22); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1505,7 +1546,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 22); this->builder.CreateBr(bb); return returnValue; @@ -1513,8 +1554,6 @@ private: /* instruction 23: ANDI */ std::tuple __andi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("ANDI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,23); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1531,9 +1570,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("ANDI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,23); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1550,7 +1593,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 23); this->builder.CreateBr(bb); return returnValue; @@ -1558,8 +1601,6 @@ private: /* instruction 24: SLLI */ std::tuple __slli(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLLI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,24); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1576,9 +1617,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLLI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,24); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1595,7 +1640,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 24); this->builder.CreateBr(bb); return returnValue; @@ -1603,8 +1648,6 @@ private: /* instruction 25: SRLI */ std::tuple __srli(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SRLI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,25); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1621,9 +1664,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SRLI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,25); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1640,7 +1687,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 25); this->builder.CreateBr(bb); return returnValue; @@ -1648,8 +1695,6 @@ private: /* instruction 26: SRAI */ std::tuple __srai(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SRAI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,26); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1666,9 +1711,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SRAI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,26); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1688,7 +1737,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 26); this->builder.CreateBr(bb); return returnValue; @@ -1696,8 +1745,6 @@ private: /* instruction 27: ADD */ std::tuple __add(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("ADD_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,27); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1714,9 +1761,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("ADD_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,27); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1735,7 +1786,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 27); this->builder.CreateBr(bb); return returnValue; @@ -1743,8 +1794,6 @@ private: /* instruction 28: SUB */ std::tuple __sub(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SUB_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,28); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1761,9 +1810,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SUB_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,28); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1782,7 +1835,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 28); this->builder.CreateBr(bb); return returnValue; @@ -1790,8 +1843,6 @@ private: /* instruction 29: SLL */ std::tuple __sll(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,29); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1808,9 +1859,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,29); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1830,7 +1885,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 29); this->builder.CreateBr(bb); return returnValue; @@ -1838,8 +1893,6 @@ private: /* instruction 30: SLT */ std::tuple __slt(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLT_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,30); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1856,9 +1909,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLT_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,30); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1880,7 +1937,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 30); this->builder.CreateBr(bb); return returnValue; @@ -1888,8 +1945,6 @@ private: /* instruction 31: SLTU */ std::tuple __sltu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SLTU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,31); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1906,9 +1961,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SLTU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,31); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1928,7 +1987,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 31); this->builder.CreateBr(bb); return returnValue; @@ -1936,8 +1995,6 @@ private: /* instruction 32: XOR */ std::tuple __xor(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("XOR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,32); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1954,9 +2011,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("XOR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,32); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -1973,7 +2034,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 32); this->builder.CreateBr(bb); return returnValue; @@ -1981,8 +2042,6 @@ private: /* instruction 33: SRL */ std::tuple __srl(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SRL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,33); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -1999,9 +2058,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SRL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,33); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2021,7 +2084,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 33); this->builder.CreateBr(bb); return returnValue; @@ -2029,8 +2092,6 @@ private: /* instruction 34: SRA */ std::tuple __sra(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("SRA_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,34); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2047,9 +2108,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("SRA_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,34); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2072,7 +2137,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 34); this->builder.CreateBr(bb); return returnValue; @@ -2080,8 +2145,6 @@ private: /* instruction 35: OR */ std::tuple __or(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("OR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,35); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2098,9 +2161,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("OR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,35); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2117,7 +2184,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 35); this->builder.CreateBr(bb); return returnValue; @@ -2125,8 +2192,6 @@ private: /* instruction 36: AND */ std::tuple __and(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("AND_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,36); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2143,9 +2208,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("AND_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,36); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2162,7 +2231,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 36); this->builder.CreateBr(bb); return returnValue; @@ -2170,8 +2239,6 @@ private: /* instruction 37: FENCE */ std::tuple __fence(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("FENCE_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,37); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2190,16 +2257,20 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("FENCE_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,37); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_write_mem(traits::FENCE, static_cast(traits::fence), this->gen_const(8,(uint8_t)pred<< 4|succ)); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 37); this->builder.CreateBr(bb); return returnValue; @@ -2207,21 +2278,23 @@ private: /* instruction 38: ECALL */ std::tuple __ecall(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("ECALL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,38); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("ECALL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,38); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 11); bb = this->leave_blk; auto returnValue = std::make_tuple(TRAP,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 38); this->builder.CreateBr(bb); return returnValue; @@ -2229,21 +2302,23 @@ private: /* instruction 39: EBREAK */ std::tuple __ebreak(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("EBREAK_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,39); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("EBREAK_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,39); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 3); bb = this->leave_blk; auto returnValue = std::make_tuple(TRAP,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 39); this->builder.CreateBr(bb); return returnValue; @@ -2251,21 +2326,23 @@ private: /* instruction 40: MRET */ std::tuple __mret(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("MRET_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,40); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("MRET_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,40); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_leave_trap(3); bb = this->leave_blk; auto returnValue = std::make_tuple(TRAP,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 40); this->builder.CreateBr(bb); return returnValue; @@ -2273,21 +2350,23 @@ private: /* instruction 41: WFI */ std::tuple __wfi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("WFI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,41); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("WFI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,41); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_wait(1); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 41); this->builder.CreateBr(bb); return returnValue; @@ -2295,8 +2374,6 @@ private: /* instruction 42: CSRRW */ std::tuple __csrrw(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRW_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,42); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2313,9 +2390,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRW_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,42); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2338,7 +2419,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 42); this->builder.CreateBr(bb); return returnValue; @@ -2346,8 +2427,6 @@ private: /* instruction 43: CSRRS */ std::tuple __csrrs(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRS_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,43); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2364,9 +2443,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRS_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,43); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2390,7 +2473,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 43); this->builder.CreateBr(bb); return returnValue; @@ -2398,8 +2481,6 @@ private: /* instruction 44: CSRRC */ std::tuple __csrrc(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRC_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,44); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2416,9 +2497,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRC_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,44); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2442,7 +2527,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 44); this->builder.CreateBr(bb); return returnValue; @@ -2450,8 +2535,6 @@ private: /* instruction 45: CSRRWI */ std::tuple __csrrwi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRWI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,45); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); @@ -2468,9 +2551,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRWI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,45); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2488,7 +2575,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 45); this->builder.CreateBr(bb); return returnValue; @@ -2496,8 +2583,6 @@ private: /* instruction 46: CSRRSI */ std::tuple __csrrsi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRSI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,46); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); @@ -2514,9 +2599,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRSI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,46); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2539,7 +2628,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 46); this->builder.CreateBr(bb); return returnValue; @@ -2547,8 +2636,6 @@ private: /* instruction 47: CSRRCI */ std::tuple __csrrci(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("CSRRCI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,47); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); @@ -2565,9 +2652,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("CSRRCI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,47); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2590,7 +2681,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 47); this->builder.CreateBr(bb); return returnValue; @@ -2598,8 +2689,6 @@ private: /* instruction 48: FENCE_I */ std::tuple __fence_i(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("FENCE_I_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,48); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2616,16 +2705,20 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("FENCE_I_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,48); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_write_mem(traits::FENCE, static_cast(traits::fencei), this->gen_const(16,imm)); - bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); - auto returnValue = std::make_tuple(CONT,bb); + bb = this->leave_blk; + auto returnValue = std::make_tuple(FLUSH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 48); this->builder.CreateBr(bb); return returnValue; @@ -2633,8 +2726,6 @@ private: /* instruction 49: MUL */ std::tuple __mul(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("MUL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,49); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2651,9 +2742,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("MUL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,49); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2681,7 +2776,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 49); this->builder.CreateBr(bb); return returnValue; @@ -2689,8 +2784,6 @@ private: /* instruction 50: MULH */ std::tuple __mulh(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("MULH_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,50); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2707,9 +2800,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("MULH_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,50); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2740,7 +2837,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 50); this->builder.CreateBr(bb); return returnValue; @@ -2748,8 +2845,6 @@ private: /* instruction 51: MULHSU */ std::tuple __mulhsu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("MULHSU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,51); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2766,9 +2861,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("MULHSU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,51); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2798,7 +2897,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 51); this->builder.CreateBr(bb); return returnValue; @@ -2806,8 +2905,6 @@ private: /* instruction 52: MULHU */ std::tuple __mulhu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("MULHU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,52); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2824,9 +2921,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("MULHU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,52); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2855,7 +2956,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 52); this->builder.CreateBr(bb); return returnValue; @@ -2863,8 +2964,6 @@ private: /* instruction 53: DIV */ std::tuple __div(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("DIV_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,53); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2881,9 +2980,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("DIV_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,53); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -2952,7 +3055,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 53); this->builder.CreateBr(bb); return returnValue; @@ -2960,8 +3063,6 @@ private: /* instruction 54: DIVU */ std::tuple __divu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("DIVU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,54); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -2978,9 +3079,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("DIVU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,54); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3020,7 +3125,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 54); this->builder.CreateBr(bb); return returnValue; @@ -3028,8 +3133,6 @@ private: /* instruction 55: REM */ std::tuple __rem(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("REM_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,55); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -3046,9 +3149,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("REM_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,55); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3122,7 +3229,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 55); this->builder.CreateBr(bb); return returnValue; @@ -3130,8 +3237,6 @@ private: /* instruction 56: REMU */ std::tuple __remu(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("REMU_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,56); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); @@ -3148,9 +3253,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("REMU_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,56); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 4; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3188,7 +3297,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 56); this->builder.CreateBr(bb); return returnValue; @@ -3196,8 +3305,6 @@ private: /* instruction 57: C__ADDI4SPN */ std::tuple __c__addi4spn(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__ADDI4SPN_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,57); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<2,3>(instr))); uint16_t imm = ((bit_sub<5,1>(instr) << 3) | (bit_sub<6,1>(instr) << 2) | (bit_sub<7,4>(instr) << 6) | (bit_sub<11,2>(instr) << 4)); @@ -3213,9 +3320,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__ADDI4SPN_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,57); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(imm) { this->builder.CreateStore( this->gen_ext( @@ -3232,7 +3343,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 57); this->builder.CreateBr(bb); return returnValue; @@ -3240,8 +3351,6 @@ private: /* instruction 58: C__LW */ std::tuple __c__lw(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__LW_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,58); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<2,3>(instr))); uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3)); @@ -3258,9 +3367,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__LW_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,58); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ auto offs =this->gen_ext( (this->builder.CreateAdd( this->gen_ext(this->gen_reg_load(rs1+ 8+ traits::X0, 0), 64,false), @@ -3277,7 +3390,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 58); this->builder.CreateBr(bb); return returnValue; @@ -3285,8 +3398,6 @@ private: /* instruction 59: C__SW */ std::tuple __c__sw(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SW_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,59); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3)); @@ -3303,9 +3414,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SW_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,59); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ auto offs =this->gen_ext( (this->builder.CreateAdd( this->gen_ext(this->gen_reg_load(rs1+ 8+ traits::X0, 0), 64,false), @@ -3320,7 +3435,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 59); this->builder.CreateBr(bb); return returnValue; @@ -3328,8 +3443,6 @@ private: /* instruction 60: C__ADDI */ std::tuple __c__addi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__ADDI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,60); uint64_t PC = pc.val; uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rs1 = ((bit_sub<7,5>(instr))); @@ -3345,9 +3458,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__ADDI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,60); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3366,7 +3483,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 60); this->builder.CreateBr(bb); return returnValue; @@ -3374,21 +3491,23 @@ private: /* instruction 61: C__NOP */ std::tuple __c__nop(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__NOP_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,61); uint64_t PC = pc.val; uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("C__NOP_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,61); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 61); this->builder.CreateBr(bb); return returnValue; @@ -3396,8 +3515,6 @@ private: /* instruction 62: C__JAL */ std::tuple __c__jal(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__JAL_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,62); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ @@ -3412,9 +3529,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__JAL_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,62); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->gen_const(32,(uint32_t)(PC+ 2)), get_reg_ptr(1 + traits::X0), false); @@ -3424,7 +3545,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 62); this->builder.CreateBr(bb); return returnValue; @@ -3432,8 +3553,6 @@ private: /* instruction 63: C__LI */ std::tuple __c__li(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__LI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,63); uint64_t PC = pc.val; uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rd = ((bit_sub<7,5>(instr))); @@ -3449,9 +3568,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__LI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,63); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3465,7 +3588,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 63); this->builder.CreateBr(bb); return returnValue; @@ -3473,8 +3596,6 @@ private: /* instruction 64: C__LUI */ std::tuple __c__lui(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__LUI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,64); uint64_t PC = pc.val; uint32_t imm = ((bit_sub<2,5>(instr) << 12) | (bit_sub<12,1>(instr) << 17)); uint8_t rd = ((bit_sub<7,5>(instr))); @@ -3490,9 +3611,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__LUI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,64); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(imm== 0||rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -3504,7 +3629,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 64); this->builder.CreateBr(bb); return returnValue; @@ -3512,8 +3637,6 @@ private: /* instruction 65: C__ADDI16SP */ std::tuple __c__addi16sp(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__ADDI16SP_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,65); uint64_t PC = pc.val; uint16_t nzimm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 7) | (bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 4) | (bit_sub<12,1>(instr) << 9)); if(this->disass_enabled){ @@ -3528,9 +3651,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__ADDI16SP_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,65); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(nzimm) { this->builder.CreateStore( this->gen_ext( @@ -3547,7 +3674,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 65); this->builder.CreateBr(bb); return returnValue; @@ -3555,22 +3682,24 @@ private: /* instruction 66: __reserved_clui */ std::tuple ____reserved_clui(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("__reserved_clui_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,66); uint64_t PC = pc.val; uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("__reserved_clui_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,66); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 2); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 66); this->builder.CreateBr(bb); return returnValue; @@ -3578,8 +3707,6 @@ private: /* instruction 67: C__SRLI */ std::tuple __c__srli(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SRLI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,67); uint64_t PC = pc.val; uint8_t shamt = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -3595,9 +3722,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SRLI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,67); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->builder.CreateLShr( this->gen_reg_load(rs1+ 8+ traits::X0, 0), @@ -3607,7 +3738,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 67); this->builder.CreateBr(bb); return returnValue; @@ -3615,8 +3746,6 @@ private: /* instruction 68: C__SRAI */ std::tuple __c__srai(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SRAI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,68); uint64_t PC = pc.val; uint8_t shamt = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -3632,9 +3761,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SRAI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,68); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(shamt){ this->builder.CreateStore( this->gen_ext( (this->builder.CreateAShr( @@ -3662,7 +3795,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 68); this->builder.CreateBr(bb); return returnValue; @@ -3670,8 +3803,6 @@ private: /* instruction 69: C__ANDI */ std::tuple __c__andi(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__ANDI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,69); uint64_t PC = pc.val; uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -3687,9 +3818,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__ANDI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,69); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->gen_ext( (this->builder.CreateAnd( @@ -3701,7 +3836,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 69); this->builder.CreateBr(bb); return returnValue; @@ -3709,8 +3844,6 @@ private: /* instruction 70: C__SUB */ std::tuple __c__sub(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SUB_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,70); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); @@ -3726,9 +3859,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SUB_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,70); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->gen_ext( (this->builder.CreateSub( @@ -3740,7 +3877,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 70); this->builder.CreateBr(bb); return returnValue; @@ -3748,8 +3885,6 @@ private: /* instruction 71: C__XOR */ std::tuple __c__xor(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__XOR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,71); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); @@ -3765,9 +3900,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__XOR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,71); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->builder.CreateXor( this->gen_reg_load(rd+ 8+ traits::X0, 0), @@ -3777,7 +3916,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 71); this->builder.CreateBr(bb); return returnValue; @@ -3785,8 +3924,6 @@ private: /* instruction 72: C__OR */ std::tuple __c__or(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__OR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,72); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); @@ -3802,9 +3939,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__OR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,72); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->builder.CreateOr( this->gen_reg_load(rd+ 8+ traits::X0, 0), @@ -3814,7 +3955,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 72); this->builder.CreateBr(bb); return returnValue; @@ -3822,8 +3963,6 @@ private: /* instruction 73: C__AND */ std::tuple __c__and(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__AND_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,73); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); @@ -3839,9 +3978,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__AND_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,73); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->builder.CreateStore( this->builder.CreateAnd( this->gen_reg_load(rd+ 8+ traits::X0, 0), @@ -3851,7 +3994,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 73); this->builder.CreateBr(bb); return returnValue; @@ -3859,8 +4002,6 @@ private: /* instruction 74: C__J */ std::tuple __c__j(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__J_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,74); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ @@ -3875,16 +4016,20 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__J_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,74); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); this->builder.CreateStore(this->gen_const(32,PC_val_v), get_reg_ptr(traits::NEXT_PC), false); this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 74); this->builder.CreateBr(bb); return returnValue; @@ -3892,8 +4037,6 @@ private: /* instruction 75: C__BEQZ */ std::tuple __c__beqz(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__BEQZ_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,75); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8)); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -3909,9 +4052,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__BEQZ_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,75); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_EQ, @@ -3929,7 +4076,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 75); this->builder.CreateBr(bb); return returnValue; @@ -3937,8 +4084,6 @@ private: /* instruction 76: C__BNEZ */ std::tuple __c__bnez(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__BNEZ_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,76); uint64_t PC = pc.val; uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8)); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -3954,9 +4099,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__BNEZ_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,76); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, @@ -3974,7 +4123,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 76); this->builder.CreateBr(bb); return returnValue; @@ -3982,8 +4131,6 @@ private: /* instruction 77: C__SLLI */ std::tuple __c__slli(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SLLI_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,77); uint64_t PC = pc.val; uint8_t nzuimm = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,5>(instr))); @@ -3999,9 +4146,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SLLI_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,77); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -4018,7 +4169,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 77); this->builder.CreateBr(bb); return returnValue; @@ -4026,8 +4177,6 @@ private: /* instruction 78: C__LWSP */ std::tuple __c__lwsp(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__LWSP_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,78); uint64_t PC = pc.val; uint8_t uimm = ((bit_sub<2,2>(instr) << 6) | (bit_sub<4,3>(instr) << 2) | (bit_sub<12,1>(instr) << 5)); uint8_t rd = ((bit_sub<7,5>(instr))); @@ -4043,9 +4192,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__LWSP_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,78); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rd== 0) { this->gen_raise_trap(0, 2); } @@ -4067,7 +4220,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 78); this->builder.CreateBr(bb); return returnValue; @@ -4075,8 +4228,6 @@ private: /* instruction 79: C__MV */ std::tuple __c__mv(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__MV_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,79); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t rd = ((bit_sub<7,5>(instr))); @@ -4092,9 +4243,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__MV_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,79); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -4108,7 +4263,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 79); this->builder.CreateBr(bb); return returnValue; @@ -4116,8 +4271,6 @@ private: /* instruction 80: C__JR */ std::tuple __c__jr(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__JR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,80); uint64_t PC = pc.val; uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -4132,16 +4285,20 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__JR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,80); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); - if(rs1&&rs1(traits::RFS)) { - auto PC_val_v = this->builder.CreateAnd( - this->gen_reg_load(rs1%static_cast(traits::RFS)+ traits::X0, 0), - this->gen_ext(this->gen_const(8,~ 0x1), 32,false)) - ; - this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false); - this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); + + /*generate behavior*/ + if(rs1&&rs1(traits::RFS)){ auto addr_mask =this->gen_const(32,(uint32_t)- 2); + auto PC_val_v = this->builder.CreateAnd( + this->gen_reg_load(rs1%static_cast(traits::RFS)+ traits::X0, 0), + addr_mask) + ; + this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false); + this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); } else{ this->gen_raise_trap(0, 2); @@ -4149,7 +4306,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 80); this->builder.CreateBr(bb); return returnValue; @@ -4157,21 +4314,23 @@ private: /* instruction 81: __reserved_cmv */ std::tuple ____reserved_cmv(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("__reserved_cmv_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,81); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("__reserved_cmv_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,81); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 2); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 81); this->builder.CreateBr(bb); return returnValue; @@ -4179,8 +4338,6 @@ private: /* instruction 82: C__ADD */ std::tuple __c__add(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__ADD_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,82); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t rd = ((bit_sub<7,5>(instr))); @@ -4196,9 +4353,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__ADD_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,82); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -4217,7 +4378,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 82); this->builder.CreateBr(bb); return returnValue; @@ -4225,8 +4386,6 @@ private: /* instruction 83: C__JALR */ std::tuple __c__jalr(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__JALR_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,83); uint64_t PC = pc.val; uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -4241,20 +4400,25 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__JALR_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,83); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } else{ + auto addr_mask =this->gen_const(32,(uint32_t)- 2); auto new_pc =this->gen_reg_load(rs1+ traits::X0, 0); this->builder.CreateStore( this->gen_const(32,(uint32_t)(PC+ 2)), get_reg_ptr(1 + traits::X0), false); auto PC_val_v = this->builder.CreateAnd( new_pc, - this->gen_ext(this->gen_const(8,~ 0x1), 32,false)) + addr_mask) ; this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false); this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); @@ -4262,7 +4426,7 @@ private: bb = this->leave_blk; auto returnValue = std::make_tuple(BRANCH,nullptr); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 83); this->builder.CreateBr(bb); return returnValue; @@ -4270,21 +4434,23 @@ private: /* instruction 84: C__EBREAK */ std::tuple __c__ebreak(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__EBREAK_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,84); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("C__EBREAK_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,84); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 3); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 84); this->builder.CreateBr(bb); return returnValue; @@ -4292,8 +4458,6 @@ private: /* instruction 85: C__SWSP */ std::tuple __c__swsp(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("C__SWSP_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,85); uint64_t PC = pc.val; uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t uimm = ((bit_sub<7,2>(instr) << 6) | (bit_sub<9,4>(instr) << 2)); @@ -4309,9 +4473,13 @@ private: }; this->builder.CreateCall(this->mod->getFunction("print_disass"), args); } + bb->setName(fmt::format("C__SWSP_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,85); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ if(rs2>=static_cast(traits::RFS)) { this->gen_raise_trap(0, 2); } @@ -4331,7 +4499,7 @@ private: bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 85); this->builder.CreateBr(bb); return returnValue; @@ -4339,21 +4507,23 @@ private: /* instruction 86: DII */ std::tuple __dii(virt_addr_t& pc, code_word_t instr, BasicBlock* bb){ - bb->setName(fmt::format("DII_0x{:X}",pc.val)); - this->gen_sync(PRE_SYNC,86); uint64_t PC = pc.val; if(this->disass_enabled){ /* generate console output when executing the command */ //This disass is not yet implemented } + bb->setName(fmt::format("DII_0x{:X}",pc.val)); + this->gen_sync(PRE_SYNC,86); auto cur_pc_val = this->gen_const(32,pc.val); pc=pc+ 2; this->gen_set_pc(pc, traits::NEXT_PC); + + /*generate behavior*/ this->gen_raise_trap(0, 2); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); - this->gen_trap_check(bb); + this->gen_instr_epilogue(bb); this->gen_sync(POST_SYNC, 86); this->builder.CreateBr(bb); return returnValue; @@ -4373,7 +4543,7 @@ private: pc = pc + ((instr & 3) == 3 ? 4 : 2); this->gen_raise_trap(0, 2); // illegal instruction trap this->gen_sync(iss::POST_SYNC, instr_descr.size()); - this->gen_trap_check(this->leave_blk); + this->gen_instr_epilogue(this->leave_blk); return std::make_tuple(BRANCH, nullptr); } //decoding functionality @@ -4479,18 +4649,21 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, return (this->*f)(pc, instr, this_block); } -template void vm_impl::gen_leave_behavior(BasicBlock *leave_blk) { +template +void vm_impl::gen_leave_behavior(BasicBlock *leave_blk) { this->builder.SetInsertPoint(leave_blk); this->builder.CreateRet(this->builder.CreateLoad(this->get_typeptr(traits::NEXT_PC),get_reg_ptr(traits::NEXT_PC), false)); } -template void vm_impl::gen_raise_trap(uint16_t trap_id, uint16_t cause) { +template +void vm_impl::gen_raise_trap(uint16_t trap_id, uint16_t cause) { auto *TRAP_val = this->gen_const(32, 0x80 << 24 | (cause << 16) | trap_id); this->builder.CreateStore(TRAP_val, get_reg_ptr(traits::TRAP_STATE), true); this->builder.CreateStore(this->gen_const(32U, std::numeric_limits::max()), get_reg_ptr(traits::LAST_BRANCH), false); } -template void vm_impl::gen_leave_trap(unsigned lvl) { +template +void vm_impl::gen_leave_trap(unsigned lvl) { std::vector args{ this->core_ptr, ConstantInt::get(getContext(), APInt(64, lvl)) }; this->builder.CreateCall(this->mod->getFunction("leave_trap"), args); auto *PC_val = this->gen_read_mem(traits::CSR, (lvl << 8) + 0x41, traits::XLEN / 8); @@ -4498,12 +4671,14 @@ template void vm_impl::gen_leave_trap(unsigned lvl) { this->builder.CreateStore(this->gen_const(32U, std::numeric_limits::max()), get_reg_ptr(traits::LAST_BRANCH), false); } -template void vm_impl::gen_wait(unsigned type) { +template +void vm_impl::gen_wait(unsigned type) { std::vector args{ this->core_ptr, ConstantInt::get(getContext(), APInt(64, type)) }; this->builder.CreateCall(this->mod->getFunction("wait"), args); } -template void vm_impl::gen_trap_behavior(BasicBlock *trap_blk) { +template +void vm_impl::gen_trap_behavior(BasicBlock *trap_blk) { this->builder.SetInsertPoint(trap_blk); this->gen_sync(POST_SYNC, -1); //TODO get right InstrId auto *trap_state_val = this->builder.CreateLoad(this->get_typeptr(traits::TRAP_STATE), get_reg_ptr(traits::TRAP_STATE), true); @@ -4516,7 +4691,8 @@ template void vm_impl::gen_trap_behavior(BasicBlock *trap_ this->builder.CreateRet(trap_addr_val); } -template inline void vm_impl::gen_trap_check(BasicBlock *bb) { +template +void vm_impl::gen_instr_epilogue(BasicBlock *bb) { auto* target_bb = BasicBlock::Create(this->mod->getContext(), "", this->func, bb); auto *v = this->builder.CreateLoad(this->get_typeptr(traits::TRAP_STATE), get_reg_ptr(traits::TRAP_STATE), true); this->gen_cond_branch(this->builder.CreateICmp( From a27850f841ad139484664f8e5a8530ac5104673f Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Sat, 18 May 2024 21:00:21 +0200 Subject: [PATCH 16/18] adds verilog literal and illegal_instr to asmjit --- gen_input/templates/asmjit/CORENAME.cpp.gtl | 12 +- src/vm/asmjit/vm_tgc5c.cpp | 361 ++++++++++---------- 2 files changed, 194 insertions(+), 179 deletions(-) diff --git a/gen_input/templates/asmjit/CORENAME.cpp.gtl b/gen_input/templates/asmjit/CORENAME.cpp.gtl index 081d9de..b671123 100644 --- a/gen_input/templates/asmjit/CORENAME.cpp.gtl +++ b/gen_input/templates/asmjit/CORENAME.cpp.gtl @@ -174,9 +174,17 @@ private: * end opcode definitions ****************************************************************************/ continuation_e illegal_intruction(virt_addr_t &pc, code_word_t instr, jit_holder& jh ) { - + x86::Compiler& cc = jh.cc; + cc.comment(fmt::format("illegal_intruction{:#x}:",pc.val).c_str()); + this->gen_sync(jh, PRE_SYNC, instr_descr.size()); + pc = pc + ((instr & 3) == 3 ? 4 : 2); + gen_instr_prologue(jh); + cc.comment("//behavior:"); + gen_instr_epilogue(jh); + this->gen_sync(jh, POST_SYNC, instr_descr.size()); return BRANCH; - } + } + //decoding functionality void populate_decoding_tree(decoding_tree_node* root){ diff --git a/src/vm/asmjit/vm_tgc5c.cpp b/src/vm/asmjit/vm_tgc5c.cpp index ac2681c..7d72232 100644 --- a/src/vm/asmjit/vm_tgc5c.cpp +++ b/src/vm/asmjit/vm_tgc5c.cpp @@ -80,7 +80,7 @@ public: protected: using super::get_ptr_for; - using super::get_reg; +using super::get_reg; using super::get_reg_for; using super::load_reg_from_mem; using super::write_reg_to_mem; @@ -339,10 +339,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int32_t)imm)); } @@ -385,10 +385,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)(PC+(int32_t)imm)); } @@ -431,16 +431,16 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - (uint32_t)(PC+ 4)); + (uint32_t)(PC+4)); } auto PC_val_v = (uint32_t)(PC+(int32_t)sext<21>(imm)); cc.mov(jh.next_pc, PC_val_v); @@ -486,7 +486,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto addr_mask = (uint32_t)- 2; @@ -500,14 +500,14 @@ private: auto label_else = cc.newLabel(); cc.je(label_else); { - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } cc.jmp(label_merge); cc.bind(label_else); { - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - (uint32_t)(PC+ 4)); + (uint32_t)(PC+4)); } auto PC_val_v = new_pc; cc.mov(jh.next_pc, PC_val_v); @@ -554,7 +554,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -563,7 +563,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -612,7 +612,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -621,7 +621,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -670,7 +670,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -681,7 +681,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -730,7 +730,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -741,7 +741,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -790,7 +790,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -799,7 +799,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -848,7 +848,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); @@ -857,7 +857,7 @@ private: cc.je(label_merge); { if(imm%static_cast(traits::INSTR_ALIGNMENT)){ - gen_raise(jh, 0, 0); + gen_raise(jh, 0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -906,7 +906,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, @@ -914,7 +914,7 @@ private: ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 1), 8, false); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); @@ -959,7 +959,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, @@ -967,7 +967,7 @@ private: ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 2), 16, false); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); @@ -1012,7 +1012,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, @@ -1020,7 +1020,7 @@ private: ), 32, true); auto res = gen_ext(jh, gen_read_mem(jh, traits::MEM, load_address, 4), 32, false); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, true)); @@ -1065,14 +1065,14 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 1); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, false)); @@ -1117,14 +1117,14 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto load_address = gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) ), 32, true); auto res = gen_read_mem(jh, traits::MEM, load_address, 2); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, res, 32, false)); @@ -1169,7 +1169,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, @@ -1217,7 +1217,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, @@ -1265,7 +1265,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto store_address = gen_ext(jh, @@ -1313,10 +1313,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm)) @@ -1362,10 +1362,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ { auto label_then = cc.newLabel(); auto label_merge = cc.newLabel(); @@ -1373,10 +1373,10 @@ private: cc.cmp(gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (int16_t)sext<12>(imm)); cc.jl(label_then); - cc.mov(tmp_reg, 0); + cc.mov(tmp_reg,0); cc.jmp(label_merge); cc.bind(label_then); - cc.mov(tmp_reg, 1); + cc.mov(tmp_reg,1); cc.bind(label_merge); cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg @@ -1424,20 +1424,20 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ { auto label_then = cc.newLabel(); auto label_merge = cc.newLabel(); auto tmp_reg = get_reg_for(jh, 1); cc.cmp(load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))); cc.jb(label_then); - cc.mov(tmp_reg, 0); + cc.mov(tmp_reg,0); cc.jmp(label_merge); cc.bind(label_then); - cc.mov(tmp_reg, 1); + cc.mov(tmp_reg,1); cc.bind(label_merge); cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg @@ -1485,10 +1485,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1533,10 +1533,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1581,10 +1581,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm))) ); @@ -1629,10 +1629,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), shamt) ); @@ -1677,10 +1677,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), shamt) ); @@ -1725,10 +1725,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sar, gen_ext(jh, @@ -1775,10 +1775,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) @@ -1824,10 +1824,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) @@ -1873,12 +1873,12 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_ext(jh, gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + gen_ext(jh, gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)-1)) )) , 32, false)); } @@ -1922,10 +1922,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ { auto label_then = cc.newLabel(); auto label_merge = cc.newLabel(); @@ -1934,10 +1934,10 @@ private: load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, true)); cc.jl(label_then); - cc.mov(tmp_reg, 0); + cc.mov(tmp_reg,0); cc.jmp(label_merge); cc.bind(label_then); - cc.mov(tmp_reg, 1); + cc.mov(tmp_reg,1); cc.bind(label_merge); cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg @@ -1985,20 +1985,20 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ { auto label_then = cc.newLabel(); auto label_merge = cc.newLabel(); auto tmp_reg = get_reg_for(jh, 1); cc.cmp(load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)); cc.jb(label_then); - cc.mov(tmp_reg, 0); + cc.mov(tmp_reg,0); cc.jmp(label_merge); cc.bind(label_then); - cc.mov(tmp_reg, 1); + cc.mov(tmp_reg,1); cc.bind(label_merge); cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, tmp_reg @@ -2046,10 +2046,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2094,12 +2094,12 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_ext(jh, gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + gen_ext(jh, gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)-1)) )) , 32, false)); } @@ -2143,14 +2143,14 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_ext(jh, gen_operation(jh, sar, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)- 1)) + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast(traits::XLEN)-1)) )) , 32, true)), 32, true)); } @@ -2194,10 +2194,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2242,10 +2242,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2)) ); @@ -2291,7 +2291,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_write_mem(jh, traits::FENCE, static_cast(traits::fence), (uint8_t)pred<< 4|succ, 4); + gen_write_mem(jh, traits::FENCE, static_cast(traits::fence), (uint8_t)pred<<4|succ, 4); auto returnValue = CONT; gen_instr_epilogue(jh); @@ -2326,7 +2326,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_raise(jh, 0, 11); + gen_raise(jh, 0, 11); auto returnValue = TRAP; gen_instr_epilogue(jh); @@ -2361,7 +2361,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_raise(jh, 0, 3); + gen_raise(jh, 0, 3); auto returnValue = TRAP; gen_instr_epilogue(jh); @@ -2471,11 +2471,11 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1); - if(rd!= 0){ + if(rd!=0){ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); gen_write_mem(jh, traits::CSR, csr, xrs1, 4); cc.mov(get_ptr_for(jh, traits::X0+ rd), @@ -2524,16 +2524,16 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1); - if(rs1!= 0){ + if(rs1!=0){ gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, xrd, xrs1) , 4); } - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } @@ -2577,16 +2577,16 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1); - if(rs1!= 0){ + if(rs1!=0){ gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, xrd, gen_operation(jh, bnot, xrs1)) , 4); } - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } @@ -2630,12 +2630,12 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); gen_write_mem(jh, traits::CSR, csr, (uint32_t)zimm, 4); - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } @@ -2679,15 +2679,15 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); - if(zimm!= 0){ + if(zimm!=0){ gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, bor, xrd, (uint32_t)zimm) , 4); } - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } @@ -2731,15 +2731,15 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto xrd = gen_read_mem(jh, traits::CSR, csr, 4); - if(zimm!= 0){ + if(zimm!=0){ gen_write_mem(jh, traits::CSR, csr, gen_operation(jh, band, xrd, ~ ((uint32_t)zimm)) , 4); } - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), xrd); } @@ -2822,16 +2822,16 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, - (gen_operation(jh, imul, - gen_ext(jh, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), - gen_ext(jh, - gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) - ), 64, true); + (gen_operation(jh, imul, gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh, + gen_ext(jh, + load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true)) + ), 64, true); if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, @@ -2877,7 +2877,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, @@ -2933,7 +2933,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, @@ -2988,7 +2988,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto res = gen_ext(jh, @@ -3042,16 +3042,16 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto dividend = gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 32, false); auto divisor = gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, false); - if(rd!= 0){ + if(rd!=0){ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, divisor, 0) + cc.cmp(gen_operation(jh, ne, divisor, 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3126,11 +3126,11 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3191,11 +3191,11 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3212,7 +3212,7 @@ private: { if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), - gen_ext(jh, 0, 32, false) + gen_ext(jh, 0, 32, false) ); } } @@ -3279,11 +3279,11 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs2), 0) ,0); auto label_else = cc.newLabel(); cc.je(label_else); @@ -3342,13 +3342,13 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(imm){ - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), imm) ), 32, false)); } else{ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } auto returnValue = CONT; @@ -3389,9 +3389,9 @@ private: cc.comment("//behavior:"); /*generate behavior*/ auto offs = gen_ext(jh, - (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+ 8), uimm) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+8), uimm) ), 32, false); - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), gen_ext(jh, gen_ext(jh, gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true)); @@ -3434,10 +3434,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ auto offs = gen_ext(jh, - (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+ 8), uimm) + (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+8), uimm) ), 32, false); gen_write_mem(jh, traits::MEM, offs, gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs2+ 8), 32, false), 4); + load_reg_from_mem(jh, traits::X0 + rs2+8), 32, false), 4); auto returnValue = CONT; gen_instr_epilogue(jh); @@ -3476,10 +3476,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rs1!= 0){ + if(rs1!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rs1), gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int8_t)sext<6>(imm)) @@ -3558,7 +3558,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ cc.mov(get_ptr_for(jh, traits::X0+ 1), - (uint32_t)(PC+ 2)); + (uint32_t)(PC+2)); auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); cc.mov(jh.next_pc, PC_val_v); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); @@ -3600,10 +3600,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int8_t)sext<6>(imm))); } @@ -3645,10 +3645,10 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - if(imm== 0||rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + if(imm==0||rd>=static_cast(traits::RFS)){ + gen_raise(jh, 0, 2); } - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), (uint32_t)((int32_t)sext<18>(imm))); } @@ -3695,7 +3695,7 @@ private: ), 32, true)); } else{ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } auto returnValue = CONT; @@ -3732,7 +3732,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); auto returnValue = CONT; gen_instr_epilogue(jh); @@ -3770,8 +3770,8 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), - gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+ 8), shamt) + cc.mov(get_ptr_for(jh, traits::X0+ rs1+8), + gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+8), shamt) ); auto returnValue = CONT; @@ -3811,18 +3811,18 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(shamt){ - cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+8), gen_ext(jh, (gen_operation(jh, sar, (gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), shamt) + load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), shamt) ), 32, true)); } else{ - if(static_cast(traits::XLEN)== 128){ - cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), + if(static_cast(traits::XLEN)==128){ + cc.mov(get_ptr_for(jh, traits::X0+ rs1+8), gen_ext(jh, (gen_operation(jh, sar, (gen_ext(jh, - load_reg_from_mem(jh, traits::X0 + rs1+ 8), 32, false)), 64) + load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), 64) ), 32, true)); } } @@ -3863,9 +3863,9 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rs1+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rs1+8), gen_ext(jh, - (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+ 8), (int8_t)sext<6>(imm)) + (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+8), (int8_t)sext<6>(imm)) ), 32, true)); auto returnValue = CONT; @@ -3904,9 +3904,9 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), gen_ext(jh, - (gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + (gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8)) ), 32, true)); auto returnValue = CONT; @@ -3945,8 +3945,8 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), + gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8)) ); auto returnValue = CONT; @@ -3985,8 +3985,8 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), + gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8)) ); auto returnValue = CONT; @@ -4025,8 +4025,8 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - cc.mov(get_ptr_for(jh, traits::X0+ rd+ 8), - gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+ 8), load_reg_from_mem(jh, traits::X0 + rs2+ 8)) + cc.mov(get_ptr_for(jh, traits::X0+ rd+8), + gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8)) ); auto returnValue = CONT; @@ -4105,7 +4105,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 0) + cc.cmp(gen_operation(jh, eq, load_reg_from_mem(jh, traits::X0 + rs1+8), 0) ,0); cc.je(label_merge); { @@ -4152,7 +4152,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ auto label_merge = cc.newLabel(); - cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs1+ 8), 0) + cc.cmp(gen_operation(jh, ne, load_reg_from_mem(jh, traits::X0 + rs1+8), 0) ,0); cc.je(label_merge); { @@ -4199,10 +4199,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rs1!= 0){ + if(rs1!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rs1), gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), nzuimm) ); @@ -4245,8 +4245,8 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - if(rd>=static_cast(traits::RFS)||rd== 0){ - gen_raise(jh, 0, 2); + if(rd>=static_cast(traits::RFS)||rd==0){ + gen_raise(jh, 0, 2); } else{ auto offs = gen_ext(jh, @@ -4295,10 +4295,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), load_reg_from_mem(jh, traits::X0 + rs2)); } @@ -4340,7 +4340,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs1&&rs1(traits::RFS)){ - auto PC_val_v = gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1%static_cast(traits::RFS)), ~ 0x1) + auto PC_val_v = gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1%static_cast(traits::RFS)), ~ 1) ; cc.mov(jh.next_pc, PC_val_v); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); @@ -4421,10 +4421,10 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rd>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ - if(rd!= 0){ + if(rd!=0){ cc.mov(get_ptr_for(jh, traits::X0+ rd), gen_ext(jh, (gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rd), load_reg_from_mem(jh, traits::X0 + rs2)) @@ -4468,13 +4468,13 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs1>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1); cc.mov(get_ptr_for(jh, traits::X0+ 1), - (uint32_t)(PC+ 2)); - auto PC_val_v = gen_operation(jh, band, new_pc, ~ 0x1) + (uint32_t)(PC+2)); + auto PC_val_v = gen_operation(jh, band, new_pc, ~ 1) ; cc.mov(jh.next_pc, PC_val_v); cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U); @@ -4513,7 +4513,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_raise(jh, 0, 3); + gen_raise(jh, 0, 3); auto returnValue = CONT; gen_instr_epilogue(jh); @@ -4552,7 +4552,7 @@ private: cc.comment("//behavior:"); /*generate behavior*/ if(rs2>=static_cast(traits::RFS)){ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); } else{ auto offs = gen_ext(jh, @@ -4595,7 +4595,7 @@ private: gen_instr_prologue(jh); cc.comment("//behavior:"); /*generate behavior*/ - gen_raise(jh, 0, 2); + gen_raise(jh, 0, 2); auto returnValue = CONT; gen_instr_epilogue(jh); @@ -4607,7 +4607,14 @@ private: * end opcode definitions ****************************************************************************/ continuation_e illegal_intruction(virt_addr_t &pc, code_word_t instr, jit_holder& jh ) { - + x86::Compiler& cc = jh.cc; + cc.comment(fmt::format("illegal_intruction{:#x}:",pc.val).c_str()); + this->gen_sync(jh, PRE_SYNC, instr_descr.size()); + pc = pc + ((instr & 3) == 3 ? 4 : 2); + gen_instr_prologue(jh); + cc.comment("//behavior:"); + gen_instr_epilogue(jh); + this->gen_sync(jh, POST_SYNC, instr_descr.size()); return BRANCH; } //decoding functionality From 3cc8bd085469219d9fbcd77948a3ffc062d9dc43 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Sat, 18 May 2024 21:00:54 +0200 Subject: [PATCH 17/18] adds reformat bc of verilog literals --- src/vm/llvm/vm_tgc5c.cpp | 356 +++++++++++++++++++-------------------- src/vm/tcc/vm_tgc5c.cpp | 353 +++++++++++++++++++------------------- 2 files changed, 353 insertions(+), 356 deletions(-) diff --git a/src/vm/llvm/vm_tgc5c.cpp b/src/vm/llvm/vm_tgc5c.cpp index 58e3c2c..1212037 100644 --- a/src/vm/llvm/vm_tgc5c.cpp +++ b/src/vm/llvm/vm_tgc5c.cpp @@ -352,10 +352,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_const(32,(uint32_t)((int32_t)imm)), get_reg_ptr(rd + traits::X0), false); @@ -395,10 +395,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_const(32,(uint32_t)(PC+(int32_t)imm)), get_reg_ptr(rd + traits::X0), false); @@ -438,15 +438,15 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( - this->gen_const(32,(uint32_t)(PC+ 4)), + this->gen_const(32,(uint32_t)(PC+4)), get_reg_ptr(rd + traits::X0), false); } auto PC_val_v = (uint32_t)(PC+(int32_t)sext<21>(imm)); @@ -489,7 +489,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto addr_mask =this->gen_const(32,(uint32_t)- 2); @@ -511,14 +511,14 @@ private: , 1), bb_then, bb_else); this->builder.SetInsertPoint(bb_then); { - this->gen_raise_trap(0, 0); + this->gen_raise_trap(0, 0); } this->builder.CreateBr(bb_merge); this->builder.SetInsertPoint(bb_else); { - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( - this->gen_const(32,(uint32_t)(PC+ 4)), + this->gen_const(32,(uint32_t)(PC+4)), get_reg_ptr(rd + traits::X0), false); } auto PC_val_v = new_pc; @@ -563,7 +563,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -574,7 +574,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -620,7 +620,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -631,7 +631,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -677,7 +677,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -692,7 +692,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -738,7 +738,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -753,7 +753,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -799,7 +799,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -810,7 +810,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -856,7 +856,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -867,7 +867,7 @@ private: , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { - if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); + if(imm%static_cast(traits::INSTR_ALIGNMENT)){ this->gen_raise_trap(0, 0); } else{ auto PC_val_v = (uint32_t)(PC+(int16_t)sext<13>(imm)); @@ -913,7 +913,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto load_address =this->gen_ext( @@ -925,7 +925,7 @@ private: auto res =this->gen_ext( this->gen_read_mem(traits::MEM, load_address, 1), 8, false); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( res, @@ -968,7 +968,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto load_address =this->gen_ext( @@ -980,7 +980,7 @@ private: auto res =this->gen_ext( this->gen_read_mem(traits::MEM, load_address, 2), 16, false); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( res, @@ -1023,7 +1023,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto load_address =this->gen_ext( @@ -1035,7 +1035,7 @@ private: auto res =this->gen_ext( this->gen_read_mem(traits::MEM, load_address, 4), 32, false); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( res, @@ -1078,7 +1078,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto load_address =this->gen_ext( @@ -1088,7 +1088,7 @@ private: ), 32, true); auto res =this->gen_read_mem(traits::MEM, load_address, 1); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( res, @@ -1131,7 +1131,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto load_address =this->gen_ext( @@ -1141,7 +1141,7 @@ private: ), 32, true); auto res =this->gen_read_mem(traits::MEM, load_address, 2); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( res, @@ -1184,7 +1184,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto store_address =this->gen_ext( @@ -1234,7 +1234,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto store_address =this->gen_ext( @@ -1284,7 +1284,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto store_address =this->gen_ext( @@ -1334,10 +1334,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateAdd( @@ -1383,18 +1383,18 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->gen_choose((this->builder.CreateICmp(ICmpInst::ICMP_SLT, this->gen_ext( this->gen_reg_load(rs1+ traits::X0, 0), 32,true), this->gen_ext(this->gen_const(16,(int16_t)sext<12>(imm)), 32,true)) ), - this->gen_const(8, 1), - this->gen_const(8, 0), + this->gen_const(8,1), + this->gen_const(8,0), 1), 32), get_reg_ptr(rd + traits::X0), false); } @@ -1434,17 +1434,17 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->gen_choose((this->builder.CreateICmp(ICmpInst::ICMP_ULT, this->gen_reg_load(rs1+ traits::X0, 0), this->gen_const(32,(uint32_t)((int16_t)sext<12>(imm)))) ), - this->gen_const(8, 1), - this->gen_const(8, 0), + this->gen_const(8,1), + this->gen_const(8,0), 1), 32), get_reg_ptr(rd + traits::X0), false); } @@ -1484,10 +1484,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateXor( this->gen_reg_load(rs1+ traits::X0, 0), @@ -1531,10 +1531,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateOr( this->gen_reg_load(rs1+ traits::X0, 0), @@ -1578,10 +1578,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateAnd( this->gen_reg_load(rs1+ traits::X0, 0), @@ -1625,10 +1625,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateShl( this->gen_reg_load(rs1+ traits::X0, 0), @@ -1672,10 +1672,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateLShr( this->gen_reg_load(rs1+ traits::X0, 0), @@ -1719,10 +1719,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateAShr( @@ -1769,10 +1769,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateAdd( @@ -1818,10 +1818,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateSub( @@ -1867,16 +1867,16 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->builder.CreateShl( this->gen_ext(this->gen_reg_load(rs1+ traits::X0, 0), 64,false), (this->builder.CreateAnd( this->gen_ext(this->gen_reg_load(rs2+ traits::X0, 0), 64,false), - this->gen_const(64,(static_cast(traits::XLEN)- 1))) + this->gen_const(64,(static_cast(traits::XLEN)-1))) )) , 32, false), get_reg_ptr(rd + traits::X0), false); @@ -1917,10 +1917,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->gen_choose(this->builder.CreateICmp(ICmpInst::ICMP_SLT, this->gen_ext( @@ -1928,8 +1928,8 @@ private: this->gen_ext( this->gen_reg_load(rs2+ traits::X0, 0), 32,true)) , - this->gen_const(8, 1), - this->gen_const(8, 0), + this->gen_const(8,1), + this->gen_const(8,0), 1), 32), get_reg_ptr(rd + traits::X0), false); } @@ -1969,17 +1969,17 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->gen_choose(this->builder.CreateICmp(ICmpInst::ICMP_ULT, this->gen_reg_load(rs1+ traits::X0, 0), this->gen_reg_load(rs2+ traits::X0, 0)) , - this->gen_const(8, 1), - this->gen_const(8, 0), + this->gen_const(8,1), + this->gen_const(8,0), 1), 32), get_reg_ptr(rd + traits::X0), false); } @@ -2019,10 +2019,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateXor( this->gen_reg_load(rs1+ traits::X0, 0), @@ -2066,16 +2066,16 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext(this->builder.CreateLShr( this->gen_ext(this->gen_reg_load(rs1+ traits::X0, 0), 64,false), (this->builder.CreateAnd( this->gen_ext(this->gen_reg_load(rs2+ traits::X0, 0), 64,false), - this->gen_const(64,(static_cast(traits::XLEN)- 1))) + this->gen_const(64,(static_cast(traits::XLEN)-1))) )) , 32, false), get_reg_ptr(rd + traits::X0), false); @@ -2116,10 +2116,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->gen_ext(this->builder.CreateAShr( @@ -2127,7 +2127,7 @@ private: this->gen_reg_load(rs1+ traits::X0, 0), 32,true), 64,true), (this->builder.CreateAnd( this->gen_ext(this->gen_reg_load(rs2+ traits::X0, 0), 64,false), - this->gen_const(64,(static_cast(traits::XLEN)- 1))) + this->gen_const(64,(static_cast(traits::XLEN)-1))) )) , 32, true)), 32, true), @@ -2169,10 +2169,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateOr( this->gen_reg_load(rs1+ traits::X0, 0), @@ -2216,10 +2216,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->builder.CreateAnd( this->gen_reg_load(rs1+ traits::X0, 0), @@ -2266,7 +2266,7 @@ private: /*generate behavior*/ this->gen_write_mem(traits::FENCE, static_cast(traits::fence), - this->gen_const(8,(uint8_t)pred<< 4|succ)); + this->gen_const(8,(uint8_t)pred<<4|succ)); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -2290,7 +2290,7 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - this->gen_raise_trap(0, 11); + this->gen_raise_trap(0, 11); bb = this->leave_blk; auto returnValue = std::make_tuple(TRAP,nullptr); @@ -2314,7 +2314,7 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - this->gen_raise_trap(0, 3); + this->gen_raise_trap(0, 3); bb = this->leave_blk; auto returnValue = std::make_tuple(TRAP,nullptr); @@ -2398,11 +2398,11 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrs1 =this->gen_reg_load(rs1+ traits::X0, 0); - if(rd!= 0){ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); + if(rd!=0){ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); this->gen_write_mem(traits::CSR, csr, xrs1); @@ -2451,12 +2451,12 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); auto xrs1 =this->gen_reg_load(rs1+ traits::X0, 0); - if(rs1!= 0) { + if(rs1!=0) { this->gen_write_mem(traits::CSR, csr, this->builder.CreateOr( @@ -2464,7 +2464,7 @@ private: xrs1) ); } - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( xrd, get_reg_ptr(rd + traits::X0), false); @@ -2505,12 +2505,12 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); auto xrs1 =this->gen_reg_load(rs1+ traits::X0, 0); - if(rs1!= 0) { + if(rs1!=0) { this->gen_write_mem(traits::CSR, csr, this->builder.CreateAnd( @@ -2518,7 +2518,7 @@ private: this->builder.CreateNeg(xrs1)) ); } - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( xrd, get_reg_ptr(rd + traits::X0), false); @@ -2559,14 +2559,14 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); this->gen_write_mem(traits::CSR, csr, this->gen_const(32,(uint32_t)zimm)); - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( xrd, get_reg_ptr(rd + traits::X0), false); @@ -2607,11 +2607,11 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); - if(zimm!= 0) { + if(zimm!=0) { this->gen_write_mem(traits::CSR, csr, this->builder.CreateOr( @@ -2619,7 +2619,7 @@ private: this->gen_const(32,(uint32_t)zimm)) ); } - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( xrd, get_reg_ptr(rd + traits::X0), false); @@ -2660,11 +2660,11 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto xrd =this->gen_read_mem(traits::CSR, csr, 4); - if(zimm!= 0) { + if(zimm!=0) { this->gen_write_mem(traits::CSR, csr, this->builder.CreateAnd( @@ -2672,7 +2672,7 @@ private: this->gen_const(32,~ ((uint32_t)zimm))) ); } - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( xrd, get_reg_ptr(rd + traits::X0), false); @@ -2750,7 +2750,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto res =this->gen_ext( @@ -2808,7 +2808,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto res =this->gen_ext( @@ -2869,7 +2869,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto res =this->gen_ext( @@ -2929,7 +2929,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto res =this->gen_ext( @@ -2988,7 +2988,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto dividend =this->gen_ext( @@ -2997,12 +2997,12 @@ private: auto divisor =this->gen_ext( this->gen_reg_load(rs2+ traits::X0, 0), 32, false); - if(rd!= 0){ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); + if(rd!=0){ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge); auto bb_else = BasicBlock::Create(this->mod->getContext(), "bb_else", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, divisor, - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_else); this->builder.SetInsertPoint(bb_then); { @@ -3087,7 +3087,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -3095,7 +3095,7 @@ private: auto bb_else = BasicBlock::Create(this->mod->getContext(), "bb_else", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, this->gen_reg_load(rs2+ traits::X0, 0), - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_else); this->builder.SetInsertPoint(bb_then); { @@ -3157,7 +3157,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -3165,7 +3165,7 @@ private: auto bb_else = BasicBlock::Create(this->mod->getContext(), "bb_else", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, this->gen_reg_load(rs2+ traits::X0, 0), - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_else); this->builder.SetInsertPoint(bb_then); { @@ -3189,7 +3189,7 @@ private: { if(rd!=0) { this->builder.CreateStore( - this->gen_ext(this->gen_const(8, 0), 32), + this->gen_ext(this->gen_const(8,0), 32), get_reg_ptr(rd + traits::X0), false); } } @@ -3261,7 +3261,7 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)||rs1>=static_cast(traits::RFS)||rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); @@ -3269,7 +3269,7 @@ private: auto bb_else = BasicBlock::Create(this->mod->getContext(), "bb_else", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, this->gen_reg_load(rs2+ traits::X0, 0), - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_else); this->builder.SetInsertPoint(bb_then); { @@ -3335,10 +3335,10 @@ private: this->gen_ext(this->gen_const(16,imm), 64,false)) ), 32, false), - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); } else{ - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3376,7 +3376,7 @@ private: /*generate behavior*/ auto offs =this->gen_ext( (this->builder.CreateAdd( - this->gen_ext(this->gen_reg_load(rs1+ 8+ traits::X0, 0), 64,false), + this->gen_ext(this->gen_reg_load(rs1+8+ traits::X0, 0), 64,false), this->gen_ext(this->gen_const(8,uimm), 64,false)) ), 32, false); @@ -3386,7 +3386,7 @@ private: this->gen_read_mem(traits::MEM, offs, 4), 32, false), 32, true), - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3423,14 +3423,14 @@ private: /*generate behavior*/ auto offs =this->gen_ext( (this->builder.CreateAdd( - this->gen_ext(this->gen_reg_load(rs1+ 8+ traits::X0, 0), 64,false), + this->gen_ext(this->gen_reg_load(rs1+8+ traits::X0, 0), 64,false), this->gen_ext(this->gen_const(8,uimm), 64,false)) ), 32, false); this->gen_write_mem(traits::MEM, offs, this->gen_ext( - this->gen_reg_load(rs2+ 8+ traits::X0, 0), + this->gen_reg_load(rs2+8+ traits::X0, 0), 32, false)); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3466,10 +3466,10 @@ private: /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rs1!= 0) { + if(rs1!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateAdd( @@ -3537,7 +3537,7 @@ private: /*generate behavior*/ this->builder.CreateStore( - this->gen_const(32,(uint32_t)(PC+ 2)), + this->gen_const(32,(uint32_t)(PC+2)), get_reg_ptr(1 + traits::X0), false); auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm)); this->builder.CreateStore(this->gen_const(32,PC_val_v), get_reg_ptr(traits::NEXT_PC), false); @@ -3576,10 +3576,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_const(32,(uint32_t)((int8_t)sext<6>(imm))), get_reg_ptr(rd + traits::X0), false); @@ -3618,10 +3618,10 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - if(imm== 0||rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + if(imm==0||rd>=static_cast(traits::RFS)) { + this->gen_raise_trap(0, 2); } - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_const(32,(uint32_t)((int32_t)sext<18>(imm))), get_reg_ptr(rd + traits::X0), false); @@ -3669,7 +3669,7 @@ private: get_reg_ptr(2 + traits::X0), false); } else{ - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3695,7 +3695,7 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3731,10 +3731,10 @@ private: /*generate behavior*/ this->builder.CreateStore( this->builder.CreateLShr( - this->gen_reg_load(rs1+ 8+ traits::X0, 0), + this->gen_reg_load(rs1+8+ traits::X0, 0), this->gen_ext(this->gen_const(8,shamt), 32,false)) , - get_reg_ptr(rs1+ 8 + traits::X0), false); + get_reg_ptr(rs1+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3772,24 +3772,24 @@ private: this->gen_ext( (this->builder.CreateAShr( (this->gen_ext( - this->gen_reg_load(rs1+ 8+ traits::X0, 0), + this->gen_reg_load(rs1+8+ traits::X0, 0), 32, false)), this->gen_ext(this->gen_const(8,shamt), 32,false)) ), 32, true), - get_reg_ptr(rs1+ 8 + traits::X0), false); + get_reg_ptr(rs1+8 + traits::X0), false); } else{ - if(static_cast(traits::XLEN)== 128){ this->builder.CreateStore( + if(static_cast(traits::XLEN)==128){ this->builder.CreateStore( this->gen_ext( (this->builder.CreateAShr( (this->gen_ext( - this->gen_reg_load(rs1+ 8+ traits::X0, 0), + this->gen_reg_load(rs1+8+ traits::X0, 0), 32, false)), - this->gen_ext(this->gen_const(8, 64), 32,false)) + this->gen_ext(this->gen_const(8,64), 32,false)) ), 32, true), - get_reg_ptr(rs1+ 8 + traits::X0), false); + get_reg_ptr(rs1+8 + traits::X0), false); } } bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); @@ -3828,11 +3828,11 @@ private: this->builder.CreateStore( this->gen_ext( (this->builder.CreateAnd( - this->gen_reg_load(rs1+ 8+ traits::X0, 0), + this->gen_reg_load(rs1+8+ traits::X0, 0), this->gen_ext(this->gen_const(8,(int8_t)sext<6>(imm)), 32,true)) ), 32, true), - get_reg_ptr(rs1+ 8 + traits::X0), false); + get_reg_ptr(rs1+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3869,11 +3869,11 @@ private: this->builder.CreateStore( this->gen_ext( (this->builder.CreateSub( - this->gen_ext(this->gen_reg_load(rd+ 8+ traits::X0, 0), 64,false), - this->gen_ext(this->gen_reg_load(rs2+ 8+ traits::X0, 0), 64,false)) + this->gen_ext(this->gen_reg_load(rd+8+ traits::X0, 0), 64,false), + this->gen_ext(this->gen_reg_load(rs2+8+ traits::X0, 0), 64,false)) ), 32, true), - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3909,10 +3909,10 @@ private: /*generate behavior*/ this->builder.CreateStore( this->builder.CreateXor( - this->gen_reg_load(rd+ 8+ traits::X0, 0), - this->gen_reg_load(rs2+ 8+ traits::X0, 0)) + this->gen_reg_load(rd+8+ traits::X0, 0), + this->gen_reg_load(rs2+8+ traits::X0, 0)) , - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3948,10 +3948,10 @@ private: /*generate behavior*/ this->builder.CreateStore( this->builder.CreateOr( - this->gen_reg_load(rd+ 8+ traits::X0, 0), - this->gen_reg_load(rs2+ 8+ traits::X0, 0)) + this->gen_reg_load(rd+8+ traits::X0, 0), + this->gen_reg_load(rs2+8+ traits::X0, 0)) , - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -3987,10 +3987,10 @@ private: /*generate behavior*/ this->builder.CreateStore( this->builder.CreateAnd( - this->gen_reg_load(rd+ 8+ traits::X0, 0), - this->gen_reg_load(rs2+ 8+ traits::X0, 0)) + this->gen_reg_load(rd+8+ traits::X0, 0), + this->gen_reg_load(rs2+8+ traits::X0, 0)) , - get_reg_ptr(rd+ 8 + traits::X0), false); + get_reg_ptr(rd+8 + traits::X0), false); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -4062,8 +4062,8 @@ private: auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_EQ, - this->gen_reg_load(rs1+ 8+ traits::X0, 0), - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_reg_load(rs1+8+ traits::X0, 0), + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { @@ -4109,8 +4109,8 @@ private: auto bb_merge = BasicBlock::Create(this->mod->getContext(), "bb_merge", this->func, this->leave_blk); auto bb_then = BasicBlock::Create(this->mod->getContext(), "bb_then", this->func, bb_merge); this->builder.CreateCondBr(this->gen_ext(this->builder.CreateICmp(ICmpInst::ICMP_NE, - this->gen_reg_load(rs1+ 8+ traits::X0, 0), - this->gen_ext(this->gen_const(8, 0), 32,false)) + this->gen_reg_load(rs1+8+ traits::X0, 0), + this->gen_ext(this->gen_const(8,0), 32,false)) , 1), bb_then, bb_merge); this->builder.SetInsertPoint(bb_then); { @@ -4154,10 +4154,10 @@ private: /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rs1!= 0) { + if(rs1!=0) { this->builder.CreateStore( this->builder.CreateShl( this->gen_reg_load(rs1+ traits::X0, 0), @@ -4199,8 +4199,8 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - if(rd>=static_cast(traits::RFS)||rd== 0) { - this->gen_raise_trap(0, 2); + if(rd>=static_cast(traits::RFS)||rd==0) { + this->gen_raise_trap(0, 2); } else{ auto offs =this->gen_ext( @@ -4251,10 +4251,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_reg_load(rs2+ traits::X0, 0), get_reg_ptr(rd + traits::X0), false); @@ -4292,10 +4292,9 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - if(rs1&&rs1(traits::RFS)){ auto addr_mask =this->gen_const(32,(uint32_t)- 2); - auto PC_val_v = this->builder.CreateAnd( + if(rs1&&rs1(traits::RFS)){ auto PC_val_v = this->builder.CreateAnd( this->gen_reg_load(rs1%static_cast(traits::RFS)+ traits::X0, 0), - addr_mask) + this->gen_const(32,~ 1)) ; this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false); this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); @@ -4361,10 +4360,10 @@ private: /*generate behavior*/ if(rd>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { this->builder.CreateStore( this->gen_ext( (this->builder.CreateAdd( @@ -4408,17 +4407,16 @@ private: /*generate behavior*/ if(rs1>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ - auto addr_mask =this->gen_const(32,(uint32_t)- 2); auto new_pc =this->gen_reg_load(rs1+ traits::X0, 0); this->builder.CreateStore( - this->gen_const(32,(uint32_t)(PC+ 2)), + this->gen_const(32,(uint32_t)(PC+2)), get_reg_ptr(1 + traits::X0), false); auto PC_val_v = this->builder.CreateAnd( new_pc, - addr_mask) + this->gen_const(32,~ 1)) ; this->builder.CreateStore(PC_val_v, get_reg_ptr(traits::NEXT_PC), false); this->builder.CreateStore(this->gen_const(32,2U), get_reg_ptr(traits::LAST_BRANCH), false); @@ -4446,7 +4444,7 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - this->gen_raise_trap(0, 3); + this->gen_raise_trap(0, 3); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); @@ -4481,7 +4479,7 @@ private: /*generate behavior*/ if(rs2>=static_cast(traits::RFS)) { - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); } else{ auto offs =this->gen_ext( @@ -4519,7 +4517,7 @@ private: this->gen_set_pc(pc, traits::NEXT_PC); /*generate behavior*/ - this->gen_raise_trap(0, 2); + this->gen_raise_trap(0, 2); bb = BasicBlock::Create(this->mod->getContext(), "entry", this->func, this->leave_blk); auto returnValue = std::make_tuple(CONT,bb); diff --git a/src/vm/tcc/vm_tgc5c.cpp b/src/vm/tcc/vm_tgc5c.cpp index 9015757..88c7e9d 100644 --- a/src/vm/tcc/vm_tgc5c.cpp +++ b/src/vm/tcc/vm_tgc5c.cpp @@ -346,10 +346,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.constant((uint32_t)((int32_t)imm),32)); } @@ -381,10 +381,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.constant((uint32_t)(PC+(int32_t)imm),32)); } @@ -416,15 +416,15 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, - tu.constant((uint32_t)(PC+ 4),32)); + tu.constant((uint32_t)(PC+4),32)); } auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int32_t)sext<21>(imm)),32); tu.store(traits::NEXT_PC, PC_val_v); @@ -459,7 +459,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32); @@ -471,11 +471,11 @@ private: tu.open_if(tu.urem( new_pc, tu.constant(static_cast(traits:: INSTR_ALIGNMENT),32))); - this->gen_raise_trap(tu, 0, 0); + this->gen_raise_trap(tu, 0, 0); tu.open_else(); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, - tu.constant((uint32_t)(PC+ 4),32)); + tu.constant((uint32_t)(PC+4),32)); } auto PC_val_v = tu.assignment("PC_val", new_pc,32); tu.store(traits::NEXT_PC, PC_val_v); @@ -510,13 +510,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_EQ, tu.load(rs1+ traits::X0, 0), tu.load(rs2+ traits::X0, 0))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -553,13 +553,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, tu.load(rs1+ traits::X0, 0), tu.load(rs2+ traits::X0, 0))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -596,13 +596,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_SLT, tu.ext(tu.load(rs1+ traits::X0, 0),32,true), tu.ext(tu.load(rs2+ traits::X0, 0),32,true))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -639,13 +639,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_SGE, tu.ext(tu.load(rs1+ traits::X0, 0),32,true), tu.ext(tu.load(rs2+ traits::X0, 0),32,true))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -682,13 +682,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_ULT, tu.load(rs1+ traits::X0, 0), tu.load(rs2+ traits::X0, 0))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -725,13 +725,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_UGE, tu.load(rs1+ traits::X0, 0), tu.load(rs2+ traits::X0, 0))); - if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); + if(imm%static_cast(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0, 0); } else{ auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<13>(imm)),32); @@ -768,14 +768,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto load_address = tu.assignment(tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), tu.constant((int16_t)sext<12>(imm),16))),32,false),32); auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 8),8,true),8); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext(res,32,false)); } @@ -808,14 +808,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto load_address = tu.assignment(tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), tu.constant((int16_t)sext<12>(imm),16))),32,false),32); auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 16),16,true),16); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext(res,32,false)); } @@ -848,14 +848,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto load_address = tu.assignment(tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), tu.constant((int16_t)sext<12>(imm),16))),32,false),32); auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 32),32,true),32); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext(res,32,false)); } @@ -888,14 +888,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto load_address = tu.assignment(tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), tu.constant((int16_t)sext<12>(imm),16))),32,false),32); auto res = tu.assignment(tu.read_mem(traits::MEM, load_address, 8),8); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext(res,32,false)); } @@ -928,14 +928,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto load_address = tu.assignment(tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), tu.constant((int16_t)sext<12>(imm),16))),32,false),32); auto res = tu.assignment(tu.read_mem(traits::MEM, load_address, 16),16); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext(res,32,false)); } @@ -968,7 +968,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto store_address = tu.assignment(tu.ext((tu.add( @@ -1004,7 +1004,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto store_address = tu.assignment(tu.ext((tu.add( @@ -1040,7 +1040,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto store_address = tu.assignment(tu.ext((tu.add( @@ -1076,10 +1076,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), @@ -1114,14 +1114,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_SLT, tu.ext(tu.load(rs1+ traits::X0, 0),32,true), - tu.constant((int16_t)sext<12>(imm),16))), tu.constant( 1,8),tu.constant( 0,8))); + tu.constant((int16_t)sext<12>(imm),16))), tu.constant(1,8),tu.constant(0,8))); } } auto returnValue = std::make_tuple(CONT); @@ -1152,14 +1152,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_ULT, tu.load(rs1+ traits::X0, 0), - tu.constant((uint32_t)((int16_t)sext<12>(imm)),32))), tu.constant( 1,8),tu.constant( 0,8))); + tu.constant((uint32_t)((int16_t)sext<12>(imm)),32))), tu.constant(1,8),tu.constant(0,8))); } } auto returnValue = std::make_tuple(CONT); @@ -1190,10 +1190,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_xor( tu.load(rs1+ traits::X0, 0), @@ -1228,10 +1228,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_or( tu.load(rs1+ traits::X0, 0), @@ -1266,10 +1266,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_and( tu.load(rs1+ traits::X0, 0), @@ -1304,10 +1304,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.shl( tu.load(rs1+ traits::X0, 0), @@ -1342,10 +1342,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.lshr( tu.load(rs1+ traits::X0, 0), @@ -1380,10 +1380,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.ashr( tu.ext(tu.load(rs1+ traits::X0, 0),32,true), @@ -1418,10 +1418,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), @@ -1456,10 +1456,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.sub( tu.load(rs1+ traits::X0, 0), @@ -1494,16 +1494,16 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.shl( tu.load(rs1+ traits::X0, 0), (tu.bitwise_and( tu.load(rs2+ traits::X0, 0), - tu.constant((static_cast(traits:: XLEN)- 1),64))))); + tu.constant((static_cast(traits:: XLEN)-1),64))))); } } auto returnValue = std::make_tuple(CONT); @@ -1534,14 +1534,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_SLT, tu.ext(tu.load(rs1+ traits::X0, 0),32,true), - tu.ext(tu.load(rs2+ traits::X0, 0),32,true)), tu.constant( 1,8),tu.constant( 0,8))); + tu.ext(tu.load(rs2+ traits::X0, 0),32,true)), tu.constant(1,8),tu.constant(0,8))); } } auto returnValue = std::make_tuple(CONT); @@ -1572,14 +1572,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_ULT, tu.load(rs1+ traits::X0, 0), - tu.load(rs2+ traits::X0, 0)), tu.constant( 1,8),tu.constant( 0,8))); + tu.load(rs2+ traits::X0, 0)), tu.constant(1,8),tu.constant(0,8))); } } auto returnValue = std::make_tuple(CONT); @@ -1610,10 +1610,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_xor( tu.load(rs1+ traits::X0, 0), @@ -1648,16 +1648,16 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.lshr( tu.load(rs1+ traits::X0, 0), (tu.bitwise_and( tu.load(rs2+ traits::X0, 0), - tu.constant((static_cast(traits:: XLEN)- 1),64))))); + tu.constant((static_cast(traits:: XLEN)-1),64))))); } } auto returnValue = std::make_tuple(CONT); @@ -1688,16 +1688,16 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.ashr( tu.ext(tu.load(rs1+ traits::X0, 0),32,true), (tu.bitwise_and( tu.load(rs2+ traits::X0, 0), - tu.constant((static_cast(traits:: XLEN)- 1),64))))),32,false)); + tu.constant((static_cast(traits:: XLEN)-1),64))))),32,false)); } } auto returnValue = std::make_tuple(CONT); @@ -1728,10 +1728,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_or( tu.load(rs1+ traits::X0, 0), @@ -1766,10 +1766,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.bitwise_and( tu.load(rs1+ traits::X0, 0), @@ -1805,7 +1805,7 @@ private: pc=pc+ 4; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.write_mem(traits::FENCE, static_cast(traits:: fence), tu.constant((uint8_t)pred<< 4|succ,8)); + tu.write_mem(traits::FENCE, static_cast(traits:: fence), tu.constant((uint8_t)pred<<4|succ,8)); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -1827,7 +1827,7 @@ private: pc=pc+ 4; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - this->gen_raise_trap(tu, 0, 11); + this->gen_raise_trap(tu, 0, 11); auto returnValue = std::make_tuple(TRAP); tu.close_scope(); @@ -1849,7 +1849,7 @@ private: pc=pc+ 4; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - this->gen_raise_trap(tu, 0, 3); + this->gen_raise_trap(tu, 0, 3); auto returnValue = std::make_tuple(TRAP); tu.close_scope(); @@ -1922,11 +1922,11 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32); - if(rd!= 0){ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); + if(rd!=0){ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); tu.write_mem(traits::CSR, csr, xrs1); tu.store(rd + traits::X0, xrd); @@ -1963,17 +1963,17 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32); - if(rs1!= 0) { + if(rs1!=0) { tu.write_mem(traits::CSR, csr, tu.bitwise_or( xrd, xrs1)); } - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, xrd); } @@ -2006,17 +2006,17 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32); - if(rs1!= 0) { + if(rs1!=0) { tu.write_mem(traits::CSR, csr, tu.bitwise_and( xrd, tu.logical_neg(xrs1))); } - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, xrd); } @@ -2049,12 +2049,12 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); tu.write_mem(traits::CSR, csr, tu.constant((uint32_t)zimm,32)); - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, xrd); } @@ -2087,16 +2087,16 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); - if(zimm!= 0) { + if(zimm!=0) { tu.write_mem(traits::CSR, csr, tu.bitwise_or( xrd, tu.constant((uint32_t)zimm,32))); } - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, xrd); } @@ -2129,16 +2129,16 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32); - if(zimm!= 0) { + if(zimm!=0) { tu.write_mem(traits::CSR, csr, tu.bitwise_and( xrd, tu.constant(~ ((uint32_t)zimm),32))); } - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, xrd); } @@ -2171,7 +2171,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); tu.write_mem(traits::FENCE, static_cast(traits:: fencei), tu.constant(imm,16)); - auto returnValue = std::make_tuple(CONT); + auto returnValue = std::make_tuple(FLUSH); tu.close_scope(); gen_trap_check(tu); @@ -2199,7 +2199,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto res = tu.assignment(tu.ext((tu.mul( @@ -2238,7 +2238,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto res = tu.assignment(tu.ext((tu.mul( @@ -2279,7 +2279,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto res = tu.assignment(tu.ext((tu.mul( @@ -2320,7 +2320,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto res = tu.assignment(tu.ext((tu.mul( @@ -2361,14 +2361,14 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto dividend = tu.assignment(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),32); auto divisor = tu.assignment(tu.ext(tu.load(rs2+ traits::X0, 0),32,true),32); - if(rd!= 0){ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, + if(rd!=0){ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, divisor, - tu.constant( 0,8))); + tu.constant(0,8))); auto MMIN = tu.assignment(tu.constant(((uint32_t)1)<<(static_cast(traits:: XLEN)-1),32),32); tu.open_if(tu.logical_and( tu.icmp(ICmpInst::ICMP_EQ, @@ -2419,12 +2419,12 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, tu.load(rs2+ traits::X0, 0), - tu.constant( 0,8))); + tu.constant(0,8))); if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.udiv( @@ -2466,12 +2466,12 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, tu.load(rs2+ traits::X0, 0), - tu.constant( 0,8))); + tu.constant(0,8))); auto MMIN = tu.assignment(tu.constant((uint32_t)1<<(static_cast(traits:: XLEN)-1),32),32); tu.open_if(tu.logical_and( tu.icmp(ICmpInst::ICMP_EQ, @@ -2482,7 +2482,7 @@ private: tu.constant(- 1,8)))); if(rd!=0) { tu.store(rd + traits::X0, - tu.constant( 0,8)); + tu.constant(0,8)); } tu.open_else(); if(rd!=0) { @@ -2527,12 +2527,12 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)||rs1>=static_cast(traits:: RFS)||rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ tu.open_if(tu.icmp(ICmpInst::ICMP_NE, tu.load(rs2+ traits::X0, 0), - tu.constant( 0,8))); + tu.constant(0,8))); if(rd!=0) { tu.store(rd + traits::X0, tu.urem( @@ -2573,13 +2573,13 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(imm) { - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.ext((tu.add( tu.load(2+ traits::X0, 0), tu.constant(imm,16))),32,false)); } else{ - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } auto returnValue = std::make_tuple(CONT); @@ -2609,9 +2609,9 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); auto offs = tu.assignment(tu.ext((tu.add( - tu.load(rs1+ 8+ traits::X0, 0), + tu.load(rs1+8+ traits::X0, 0), tu.constant(uimm,8))),32,false),32); - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.ext(tu.ext(tu.read_mem(traits::MEM, offs, 32),32,true),32,false)); auto returnValue = std::make_tuple(CONT); @@ -2641,9 +2641,9 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); auto offs = tu.assignment(tu.ext((tu.add( - tu.load(rs1+ 8+ traits::X0, 0), + tu.load(rs1+8+ traits::X0, 0), tu.constant(uimm,8))),32,false),32); - tu.write_mem(traits::MEM, offs, tu.ext(tu.load(rs2+ 8+ traits::X0, 0),32,false)); + tu.write_mem(traits::MEM, offs, tu.ext(tu.load(rs2+8+ traits::X0, 0),32,false)); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -2671,10 +2671,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rs1!= 0) { + if(rs1!=0) { tu.store(rs1 + traits::X0, tu.ext((tu.add( tu.load(rs1+ traits::X0, 0), @@ -2729,7 +2729,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); tu.store(1 + traits::X0, - tu.constant((uint32_t)(PC+ 2),32)); + tu.constant((uint32_t)(PC+2),32)); auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<12>(imm)),32); tu.store(traits::NEXT_PC, PC_val_v); tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); @@ -2760,10 +2760,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.constant((uint32_t)((int8_t)sext<6>(imm)),32)); } @@ -2794,10 +2794,10 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - if(imm== 0||rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + if(imm==0||rd>=static_cast(traits:: RFS)) { + this->gen_raise_trap(tu, 0, 2); } - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.constant((uint32_t)((int32_t)sext<18>(imm)),32)); } @@ -2833,7 +2833,7 @@ private: tu.constant((int16_t)sext<10>(nzimm),16))),32,false)); } else{ - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } auto returnValue = std::make_tuple(CONT); @@ -2857,7 +2857,7 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -2884,9 +2884,9 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rs1+ 8 + traits::X0, + tu.store(rs1+8 + traits::X0, tu.lshr( - tu.load(rs1+ 8+ traits::X0, 0), + tu.load(rs1+8+ traits::X0, 0), tu.constant(shamt,8))); auto returnValue = std::make_tuple(CONT); @@ -2914,16 +2914,16 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - if(shamt){ tu.store(rs1+ 8 + traits::X0, + if(shamt){ tu.store(rs1+8 + traits::X0, tu.ext((tu.ashr( - (tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,true)), + (tu.ext(tu.load(rs1+8+ traits::X0, 0),32,true)), tu.constant(shamt,8))),32,false)); } else{ - if(static_cast(traits:: XLEN)== 128){ tu.store(rs1+ 8 + traits::X0, + if(static_cast(traits:: XLEN)==128){ tu.store(rs1+8 + traits::X0, tu.ext((tu.ashr( - (tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,true)), - tu.constant( 64,8))),32,false)); + (tu.ext(tu.load(rs1+8+ traits::X0, 0),32,true)), + tu.constant(64,8))),32,false)); } } auto returnValue = std::make_tuple(CONT); @@ -2952,9 +2952,9 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rs1+ 8 + traits::X0, + tu.store(rs1+8 + traits::X0, tu.ext((tu.bitwise_and( - tu.load(rs1+ 8+ traits::X0, 0), + tu.load(rs1+8+ traits::X0, 0), tu.constant((int8_t)sext<6>(imm),8))),32,false)); auto returnValue = std::make_tuple(CONT); @@ -2982,10 +2982,10 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.ext((tu.sub( - tu.load(rd+ 8+ traits::X0, 0), - tu.load(rs2+ 8+ traits::X0, 0))),32,false)); + tu.load(rd+8+ traits::X0, 0), + tu.load(rs2+8+ traits::X0, 0))),32,false)); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -3012,10 +3012,10 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.bitwise_xor( - tu.load(rd+ 8+ traits::X0, 0), - tu.load(rs2+ 8+ traits::X0, 0))); + tu.load(rd+8+ traits::X0, 0), + tu.load(rs2+8+ traits::X0, 0))); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -3042,10 +3042,10 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.bitwise_or( - tu.load(rd+ 8+ traits::X0, 0), - tu.load(rs2+ 8+ traits::X0, 0))); + tu.load(rd+8+ traits::X0, 0), + tu.load(rs2+8+ traits::X0, 0))); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -3072,10 +3072,10 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - tu.store(rd+ 8 + traits::X0, + tu.store(rd+8 + traits::X0, tu.bitwise_and( - tu.load(rd+ 8+ traits::X0, 0), - tu.load(rs2+ 8+ traits::X0, 0))); + tu.load(rd+8+ traits::X0, 0), + tu.load(rs2+8+ traits::X0, 0))); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -3131,8 +3131,8 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); tu.open_if(tu.icmp(ICmpInst::ICMP_EQ, - tu.load(rs1+ 8+ traits::X0, 0), - tu.constant( 0,8))); + tu.load(rs1+8+ traits::X0, 0), + tu.constant(0,8))); auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<9>(imm)),32); tu.store(traits::NEXT_PC, PC_val_v); tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); @@ -3164,8 +3164,8 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); tu.open_if(tu.icmp(ICmpInst::ICMP_NE, - tu.load(rs1+ 8+ traits::X0, 0), - tu.constant( 0,8))); + tu.load(rs1+8+ traits::X0, 0), + tu.constant(0,8))); auto PC_val_v = tu.assignment("PC_val", (uint32_t)(PC+(int16_t)sext<9>(imm)),32); tu.store(traits::NEXT_PC, PC_val_v); tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); @@ -3197,10 +3197,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rs1!= 0) { + if(rs1!=0) { tu.store(rs1 + traits::X0, tu.shl( tu.load(rs1+ traits::X0, 0), @@ -3233,8 +3233,8 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - if(rd>=static_cast(traits:: RFS)||rd== 0) { - this->gen_raise_trap(tu, 0, 2); + if(rd>=static_cast(traits:: RFS)||rd==0) { + this->gen_raise_trap(tu, 0, 2); } else{ auto offs = tu.assignment(tu.ext((tu.add( @@ -3270,10 +3270,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.load(rs2+ traits::X0, 0)); } @@ -3303,12 +3303,11 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - if(rs1&&rs1(traits:: RFS)) { - auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and( - tu.load(rs1%static_cast(traits:: RFS)+ traits::X0, 0), - tu.constant(~ 0x1,8)),32); - tu.store(traits::NEXT_PC, PC_val_v); - tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); + if(rs1&&rs1(traits:: RFS)){ auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and( + tu.load(rs1%static_cast(traits:: RFS)+ traits::X0, 0), + tu.constant(~ 1,32)),32); + tu.store(traits::NEXT_PC, PC_val_v); + tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); } else{ this->gen_raise_trap(tu, 0, 2); @@ -3362,10 +3361,10 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rd>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ - if(rd!= 0) { + if(rd!=0) { tu.store(rd + traits::X0, tu.ext((tu.add( tu.load(rd+ traits::X0, 0), @@ -3398,15 +3397,15 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs1>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto new_pc = tu.assignment(tu.load(rs1+ traits::X0, 0),32); tu.store(1 + traits::X0, - tu.constant((uint32_t)(PC+ 2),32)); + tu.constant((uint32_t)(PC+2),32)); auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and( new_pc, - tu.constant(~ 0x1,8)),32); + tu.constant(~ 1,32)),32); tu.store(traits::NEXT_PC, PC_val_v); tu.store(traits::LAST_BRANCH, tu.constant(2U, 2)); } @@ -3431,7 +3430,7 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - this->gen_raise_trap(tu, 0, 3); + this->gen_raise_trap(tu, 0, 3); auto returnValue = std::make_tuple(CONT); tu.close_scope(); @@ -3459,7 +3458,7 @@ private: gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); if(rs2>=static_cast(traits:: RFS)) { - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); } else{ auto offs = tu.assignment(tu.ext((tu.add( @@ -3488,7 +3487,7 @@ private: pc=pc+ 2; gen_set_pc(tu, pc, traits::NEXT_PC); tu.open_scope(); - this->gen_raise_trap(tu, 0, 2); + this->gen_raise_trap(tu, 0, 2); auto returnValue = std::make_tuple(CONT); tu.close_scope(); From 58fb815f329b92fc8cb71ebaa9ccbc0db8e23620 Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Mon, 20 May 2024 10:34:23 +0200 Subject: [PATCH 18/18] fixes gen_raise in tcc --- gen_input/templates/tcc/CORENAME.cpp.gtl | 2 +- src/vm/tcc/vm_tgc5c.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gen_input/templates/tcc/CORENAME.cpp.gtl b/gen_input/templates/tcc/CORENAME.cpp.gtl index e378bb6..f9ee677 100644 --- a/gen_input/templates/tcc/CORENAME.cpp.gtl +++ b/gen_input/templates/tcc/CORENAME.cpp.gtl @@ -292,7 +292,7 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, template void vm_impl::gen_raise_trap(tu_builder& tu, uint16_t trap_id, uint16_t cause) { tu(" *trap_state = {:#x};", 0x80 << 24 | (cause << 16) | trap_id); - tu.store(traits::LAST_BRANCH, tu.constant(std::numeric_limits::max(), 32)); + tu.store(traits::NEXT_PC, tu.constant(std::numeric_limits::max(), 32)); } template void vm_impl::gen_leave_trap(tu_builder& tu, unsigned lvl) { diff --git a/src/vm/tcc/vm_tgc5c.cpp b/src/vm/tcc/vm_tgc5c.cpp index 88c7e9d..77033cd 100644 --- a/src/vm/tcc/vm_tgc5c.cpp +++ b/src/vm/tcc/vm_tgc5c.cpp @@ -3611,7 +3611,7 @@ vm_impl::gen_single_inst_behavior(virt_addr_t &pc, unsigned int &inst_cnt, template void vm_impl::gen_raise_trap(tu_builder& tu, uint16_t trap_id, uint16_t cause) { tu(" *trap_state = {:#x};", 0x80 << 24 | (cause << 16) | trap_id); - tu.store(traits::LAST_BRANCH, tu.constant(std::numeric_limits::max(), 32)); + tu.store(traits::NEXT_PC, tu.constant(std::numeric_limits::max(), 32)); } template void vm_impl::gen_leave_trap(tu_builder& tu, unsigned lvl) {