diff --git a/contrib/.gitignore b/contrib/.gitignore
index 72f2821..d534727 100644
--- a/contrib/.gitignore
+++ b/contrib/.gitignore
@@ -1,2 +1,3 @@
 /results
 /cwr
+/*.xml
diff --git a/contrib/minres.png b/contrib/minres.png
new file mode 100755
index 0000000..babf0e1
Binary files /dev/null and b/contrib/minres.png differ
diff --git a/contrib/tgc_import.tcl b/contrib/tgc_import.tcl
index 99a5026..4372e3b 100644
--- a/contrib/tgc_import.tcl
+++ b/contrib/tgc_import.tcl
@@ -44,6 +44,7 @@ set block SYSTEM_LIBRARY:${top_design_name}
 ::pct::set_background_color_rgb $block 255 255 255 255
 ::pct::create_instance SYSTEM_LIBRARY:${top_design_name}  ${hardware} ${model_prefix}${top_design_name}${model_postfix} ${encap_name} ${encap_name}() 
 ::pct::set_bounds i_${top_design_name} 200 300 100 400
+::pct::set_image i_${top_design_name} "$scriptDir/minres.png" center center false true
 
 # export the result as component
 ::pct::export_system_library ${top_design_name}  ${top_design_name}.xml
diff --git a/contrib/tgc_import_tb.tcl b/contrib/tgc_import_tb.tcl
index 8d3a899..f2c87b7 100644
--- a/contrib/tgc_import_tb.tcl
+++ b/contrib/tgc_import_tb.tcl
@@ -37,8 +37,8 @@ puts "connecting reset/clock"
 ::pct::add_ports_to_connection C_rst i_Bus/Rst
 
 puts "setting parameters for DBT-RISE-TGC/Bus and memory components"
-::pct::set_param_value $hardware/i_core_complex {Scml Properties} elf_file ${FW_name}
-::pct::set_address i_core_complex/initiator:i_Memory_Generic/MEM 0x0
+::pct::set_param_value $hardware/i_${top_design_name} {Scml Properties} elf_file ${FW_name}
+::pct::set_address $hardware/i_${top_design_name}/initiator:i_Memory_Generic/MEM 0x0
 
 ::pct::set_main_configuration Default {{#include <scc/report.h>} {::scc::init_logging(::scc::LogConfig().logLevel(::scc::log::INFO).coloredOutput(false).logAsync(false));} {} {} {}}
 ::pct::set_main_configuration Debug {{#include <scc/report.h>} {::scc::init_logging(::scc::LogConfig().logLevel(::scc::log::DEBUG).coloredOutput(false).logAsync(false));} {} {} {}}